ARM VLDR/VSTR instructions don't need a size suffix.
authorJim Grosbach <grosbach@apple.com>
Mon, 14 Nov 2011 23:03:21 +0000 (23:03 +0000)
committerJim Grosbach <grosbach@apple.com>
Mon, 14 Nov 2011 23:03:21 +0000 (23:03 +0000)
commitffc658b056b7cc0b3f6a2626694b6a4216ed728d
treeebe680a03750316ed3c572177cd1306a4c0fd173
parent88990248d3bfb2f265fcf27f8a032ac0eb14d09f
ARM VLDR/VSTR instructions don't need a size suffix.

Canonicallize on the non-suffixed form, but continue to accept assembly that
has any correctly sized type suffix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144583 91177308-0d34-0410-b5e6-96231b3b80d8
24 files changed:
lib/Target/ARM/ARMInstrFormats.td
lib/Target/ARM/ARMInstrVFP.td
test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll
test/CodeGen/ARM/2009-09-24-spill-align.ll
test/CodeGen/ARM/2010-05-21-BuildVector.ll
test/CodeGen/ARM/2011-10-26-memset-with-neon.ll
test/CodeGen/ARM/fast-isel-cmp-imm.ll
test/CodeGen/ARM/fp.ll
test/CodeGen/ARM/fpcmp-opt.ll
test/CodeGen/ARM/fpmem.ll
test/CodeGen/ARM/lsr-on-unrolled-loops.ll
test/CodeGen/ARM/neon_ld1.ll
test/CodeGen/ARM/reg_sequence.ll
test/CodeGen/ARM/subreg-remat.ll
test/CodeGen/ARM/vbsl-constant.ll
test/CodeGen/ARM/vdup.ll
test/CodeGen/ARM/vector-DAGCombine.ll
test/CodeGen/ARM/vext.ll
test/CodeGen/ARM/widen-vmovs.ll
test/CodeGen/Thumb2/2009-12-01-LoopIVUsers.ll
test/CodeGen/Thumb2/2010-06-14-NEONCoalescer.ll
test/MC/ARM/simple-fp-encoding.s
test/MC/Disassembler/ARM/arm-tests.txt
test/MC/Disassembler/ARM/fp-encoding.txt