+void rk_clock_common_uart_init(struct clk *cpll_clk,struct clk *gpll_clk)
+{
+ struct clk *p_clk;
+ unsigned long rate;
+ if(!(gpll_clk->rate%(48*MHZ)))
+ {
+ p_clk=gpll_clk;
+ rate=48*MHZ;
+ }
+ else if(!(cpll_clk->rate%(48*MHZ)))
+ {
+ p_clk=cpll_clk;
+ rate=48*MHZ;
+ }
+ else if(!(gpll_clk->rate%(49500*KHZ)))
+ {
+ p_clk=gpll_clk;
+ rate=(49500*KHZ);
+ }
+ else if(!(cpll_clk->rate%(49500*KHZ)))
+ {
+ p_clk=cpll_clk;
+ rate=(49500*KHZ);
+ }
+ else
+ {
+ if(cpll_clk->rate>gpll_clk->rate)
+ {
+ p_clk=cpll_clk;
+ }
+ else
+ {
+ p_clk=gpll_clk;
+ }
+ rate=50*MHZ;
+ }
+ clk_set_parent_nolock(&clk_uart_pll, p_clk);
+ clk_set_rate_nolock(&clk_uart0_div,rate);
+ clk_set_rate_nolock(&clk_uart1_div,rate);
+ clk_set_rate_nolock(&clk_uart2_div,rate);
+ clk_set_rate_nolock(&clk_uart3_div,rate);
+ clk_set_rate_nolock(&clk_uart1,rate);
+}