add rtc and update i2s
authorlhh <lhh@rock-chips.com>
Sat, 4 Dec 2010 03:54:21 +0000 (11:54 +0800)
committerlhh <lhh@rock-chips.com>
Sat, 4 Dec 2010 03:54:21 +0000 (11:54 +0800)
arch/arm/mach-rk29/board-rk29sdk.c
drivers/i2c/busses/i2c-rk29.c
drivers/rtc/Kconfig
sound/soc/rk29/rk29_i2s.c
sound/soc/rk29/rk29_i2s.h

index 608df99963cfc8160d0adfdf96240d88b066f583..6390ec601a46646b8ddf31c40fb4ea0dcaa908a1 100755 (executable)
@@ -309,6 +309,13 @@ static struct i2c_board_info __initdata board_i2c0_devices[] = {
                .flags                  = 0,\r
        },\r
 #endif\r
                .flags                  = 0,\r
        },\r
 #endif\r
+#if defined (CONFIG_SND_SOC_WM8900)\r
+       {\r
+               .type                   = "wm8900",\r
+               .addr           = 0x1A,\r
+               .flags                  = 0,\r
+       },\r
+#endif\r
 #if defined (CONFIG_BATTERY_STC3100)\r
        {\r
                .type                   = "stc3100-battery",\r
 #if defined (CONFIG_BATTERY_STC3100)\r
        {\r
                .type                   = "stc3100-battery",\r
@@ -323,6 +330,14 @@ static struct i2c_board_info __initdata board_i2c0_devices[] = {
                .flags                  = 0,\r
        },\r
 #endif\r
                .flags                  = 0,\r
        },\r
 #endif\r
+#if defined (CONFIG_RTC_HYM8563)\r
+       {\r
+               .type                   = "rtc_hym8563",\r
+               .addr           = 0x51,\r
+               .flags                  = 0,\r
+               ///.irq            = RK2818_PIN_PA4,\r
+       },\r
+#endif\r
 };\r
 #endif\r
 \r
 };\r
 #endif\r
 \r
index b1916ec06c91f6a890e6543aa5875eac0467c709..45f4afb0e1fe28aa70f6b5762d8e2f8bc960f203 100755 (executable)
@@ -35,7 +35,7 @@
 #define RK2818_I2C_TIMEOUT             (msecs_to_jiffies(500))
 #define RK2818_DELAY_TIME              2
 
 #define RK2818_I2C_TIMEOUT             (msecs_to_jiffies(500))
 #define RK2818_DELAY_TIME              2
 
-#if 1
+#if 0
 #define i2c_dbg(dev, format, arg...)           \
        dev_printk(KERN_INFO , dev , format , ## arg)
 #else
 #define i2c_dbg(dev, format, arg...)           \
        dev_printk(KERN_INFO , dev , format , ## arg)
 #else
index 7e4ee792ee5ca900305d4b692f88b22554301e7d..9a1495575e224375a2e389824818a5ef7822869e 100755 (executable)
@@ -147,8 +147,8 @@ comment "I2C RTC drivers"
 if I2C
 
 config RTC_HYM8563
 if I2C
 
 config RTC_HYM8563
-        tristate "RK2818 extern HYM8563 RTC"
-       depends on I2C_RK2818
+        tristate "RK2818 or RK29 extern HYM8563 RTC"
+       depends on I2C_RK2818 || I2C_RK29
         help
           If you say yes here you will get support for the
           HYM8563 I2C RTC chip.
         help
           If you say yes here you will get support for the
           HYM8563 I2C RTC chip.
index 4dc352fc76889c097e9f9afb915892dceed511b2..510fd7094b1770c77001d90304e1c9e5405171a5 100755 (executable)
@@ -128,12 +128,10 @@ static void rockchip_snd_txctrl(struct rk29_i2s_info *i2s, int on)
         u32 opr,xfer,fifosts;
     
         I2S_DBG("Enter %s, %d >>>>>>>>>>>\n", __func__, __LINE__);
         u32 opr,xfer,fifosts;
     
         I2S_DBG("Enter %s, %d >>>>>>>>>>>\n", __func__, __LINE__);
-        
-        opr  = readl(pheadi2s->I2S_DMACR);
-        xfer = readl(pheadi2s->I2S_XFER);
-        
+        opr  = readl(&(pheadi2s->I2S_DMACR));
+        xfer = readl(&(pheadi2s->I2S_XFER));
         opr  &= ~I2S_TRAN_DMA_ENABLE;
         opr  &= ~I2S_TRAN_DMA_ENABLE;
-        xfer &= ~I2S_TX_TRAN_START;        
+        xfer &= ~I2S_TX_TRAN_START;       
         if (on) 
         {                
                 writel(opr, &(pheadi2s->I2S_DMACR));
         if (on) 
         {                
                 writel(opr, &(pheadi2s->I2S_DMACR));
@@ -149,7 +147,7 @@ static void rockchip_snd_txctrl(struct rk29_i2s_info *i2s, int on)
         {
                 writel(opr, &(pheadi2s->I2S_DMACR));
                 writel(xfer, &(pheadi2s->I2S_XFER));
         {
                 writel(opr, &(pheadi2s->I2S_DMACR));
                 writel(xfer, &(pheadi2s->I2S_XFER));
-        }  
+        } 
 }
 
 static void rockchip_snd_rxctrl(struct rk29_i2s_info *i2s, int on)
 }
 
 static void rockchip_snd_rxctrl(struct rk29_i2s_info *i2s, int on)
@@ -158,8 +156,8 @@ static void rockchip_snd_rxctrl(struct rk29_i2s_info *i2s, int on)
           
         I2S_DBG("Enter %s, %d >>>>>>>>>>>\n", __func__, __LINE__);
 
           
         I2S_DBG("Enter %s, %d >>>>>>>>>>>\n", __func__, __LINE__);
 
-        opr  = readl(pheadi2s->I2S_DMACR);
-        xfer = readl(pheadi2s->I2S_XFER);
+        opr  = readl(&(pheadi2s->I2S_DMACR));
+        xfer = readl(&(pheadi2s->I2S_XFER));
         
         opr  &= ~I2S_RECE_DMA_ENABLE;
         xfer &= ~I2S_RX_TRAN_START;
         
         opr  &= ~I2S_RECE_DMA_ENABLE;
         xfer &= ~I2S_RX_TRAN_START;
@@ -450,7 +448,7 @@ static int rk29_i2s_probe(struct platform_device *pdev,
                base = res->start;
        }
 
                base = res->start;
        }
 
-       i2s->regs = ioremap(base, resource_size(res));
+       i2s->regs = ioremap(base, (res->end - res->start) + 1); ////res));
        if (i2s->regs == NULL) {
                dev_err(dev, "cannot ioremap registers\n");
                return -ENXIO;
        if (i2s->regs == NULL) {
                dev_err(dev, "cannot ioremap registers\n");
                return -ENXIO;
index 8b7e8fc3b67d623b217a6ea1cc9e97e10de9c97b..dba88944e977116c745d9d7b72f90555c150129c 100755 (executable)
 #define I2S_TX_LRCK_OUT_I2S             (0<<5)
 #define I2S_TX_LRCK_OUT_PCM             (1<<5)
 
 #define I2S_TX_LRCK_OUT_I2S             (0<<5)
 #define I2S_TX_LRCK_OUT_PCM             (1<<5)
 
-#define I2S_DATA_WIDTH(w)               ((&0x1F)<<0)
+#define I2S_DATA_WIDTH(w)               ((w&0x1F)<<0)
 
 /* */
 
 
 /* */