iio: adc: rockchip_saradc: reset saradc controller before programming it

commit 543852af8e5902aee8f7c72c89e1513663e0f696 upstream.

SARADC controller needs to be reset before programming it, otherwise
it will not function properly.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Jonathan Cameron <jic23@kernel.org>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-iio@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
index a9a5fe19ff2a037db14de181280196cce7745d3d..ec9d6568270261707c0fdd26f83daed2c734d11c 100644 (file)
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.txt
@@ -12,6 +12,11 @@ Required properties:
 - vref-supply: The regulator supply ADC reference voltage.
 - #io-channel-cells: Should be 1, see ../iio-bindings.txt
 
 - vref-supply: The regulator supply ADC reference voltage.
 - #io-channel-cells: Should be 1, see ../iio-bindings.txt
 

+Optional properties:
+- resets: Must contain an entry for each entry in reset-names if need support
+         this option. See ../reset/reset.txt for details.
+- reset-names: Must include the name "saradc-apb".
+

 Example:
        saradc: saradc@2006c000 {
                compatible = "rockchip,saradc";
 Example:
        saradc: saradc@2006c000 {
                compatible = "rockchip,saradc";


@@ -19,6 +24,8 @@ Example:
                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
                clock-names = "saradc", "apb_pclk";
                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
                clock-names = "saradc", "apb_pclk";

+               resets = <&cru SRST_SARADC>;
+               reset-names = "saradc-apb";

                #io-channel-cells = <1>;
                vref-supply = <&vcc18>;
        };
                #io-channel-cells = <1>;
                vref-supply = <&vcc18>;
        };

diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 1e7aded53117c28e6900f32eee33f9a728515f3d..bda6bbe4479cbec62aff1dd4202bdff80b5ec072 100644 (file)
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -306,6 +306,7 @@ config QCOM_SPMI_VADC
 config ROCKCHIP_SARADC
        tristate "Rockchip SARADC driver"
        depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST)
 config ROCKCHIP_SARADC
        tristate "Rockchip SARADC driver"
        depends on ARCH_ROCKCHIP || (ARM && COMPILE_TEST)

+       depends on RESET_CONTROLLER

        help
          Say yes here to build support for the SARADC found in SoCs from
          Rockchip.
        help
          Say yes here to build support for the SARADC found in SoCs from
          Rockchip.

diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
index 9c311c1e1ac7f89cef190a3445507025fdb8f131..dffff64b598938f336995cbf2a1cac08eef558f8 100644 (file)
--- a/drivers/iio/adc/rockchip_saradc.c
+++ b/drivers/iio/adc/rockchip_saradc.c
@@ -21,6 +21,8 @@
 #include <linux/of_device.h>
 #include <linux/clk.h>
 #include <linux/completion.h>
 #include <linux/of_device.h>
 #include <linux/clk.h>
 #include <linux/completion.h>

+#include <linux/delay.h>
+#include <linux/reset.h>

 #include <linux/regulator/consumer.h>
 #include <linux/iio/iio.h>
 
 #include <linux/regulator/consumer.h>
 #include <linux/iio/iio.h>
 


@@ -53,6 +55,7 @@ struct rockchip_saradc {
        struct clk              *clk;
        struct completion       completion;
        struct regulator        *vref;
        struct clk              *clk;
        struct completion       completion;
        struct regulator        *vref;

+       struct reset_control    *reset;

        const struct rockchip_saradc_data *data;
        u16                     last_val;
 };
        const struct rockchip_saradc_data *data;
        u16                     last_val;
 };


@@ -171,6 +174,16 @@ static const struct of_device_id rockchip_saradc_match[] = {
 };
 MODULE_DEVICE_TABLE(of, rockchip_saradc_match);
 
 };
 MODULE_DEVICE_TABLE(of, rockchip_saradc_match);
 

+/**
+ * Reset SARADC Controller.
+ */
+static void rockchip_saradc_reset_controller(struct reset_control *reset)
+{
+       reset_control_assert(reset);
+       usleep_range(10, 20);
+       reset_control_deassert(reset);
+}
+

 static int rockchip_saradc_probe(struct platform_device *pdev)
 {
        struct rockchip_saradc *info = NULL;
 static int rockchip_saradc_probe(struct platform_device *pdev)
 {
        struct rockchip_saradc *info = NULL;


@@ -199,6 +212,20 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
        if (IS_ERR(info->regs))
                return PTR_ERR(info->regs);
 
        if (IS_ERR(info->regs))
                return PTR_ERR(info->regs);
 

+       /*
+        * The reset should be an optional property, as it should work
+        * with old devicetrees as well
+        */
+       info->reset = devm_reset_control_get(&pdev->dev, "saradc-apb");
+       if (IS_ERR(info->reset)) {
+               ret = PTR_ERR(info->reset);
+               if (ret != -ENOENT)
+                       return ret;
+
+               dev_dbg(&pdev->dev, "no reset control found\n");
+               info->reset = NULL;
+       }
+

        init_completion(&info->completion);
 
        irq = platform_get_irq(pdev, 0);
        init_completion(&info->completion);
 
        irq = platform_get_irq(pdev, 0);


@@ -233,6 +260,9 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
                return PTR_ERR(info->vref);
        }
 
                return PTR_ERR(info->vref);
        }
 

+       if (info->reset)
+               rockchip_saradc_reset_controller(info->reset);
+

        /*
         * Use a default value for the converter clock.
         * This may become user-configurable in the future.
        /*
         * Use a default value for the converter clock.
         * This may become user-configurable in the future.