This makes the early printk support somewhat more flexible,
moving the port definition to a config option, and making the
port initialization configurable for sh-ipl+g users.
At the same time, this allows us to trivially wire up the
SH7780 SCIF0, so that's thrown in too more or less for free.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
config EARLY_SCIF_CONSOLE
bool "Use early SCIF console"
config EARLY_SCIF_CONSOLE
bool "Use early SCIF console"
- depends on CPU_SH4 || CPU_SH2A && !SH_STANDARD_BIOS
+ help
+ This enables an early console using a fixed SCIF port. This can
+ be used by platforms that are either not running the SH
+ standard BIOS, or do not wish to use the BIOS callbacks for the
+ serial I/O.
+
+config EARLY_SCIF_CONSOLE_PORT
+ hex "SCIF port for early console"
+ depends on EARLY_SCIF_CONSOLE
+ default "0xffe00000" if CPU_SUBTYPE_SH7780
+ default "0xfffe9800" if CPU_SUBTYPE_SH72060
+ default "0xffe80000" if CPU_SH4
config EARLY_PRINTK
bool "Early printk support"
config EARLY_PRINTK
bool "Early printk support"
when the kernel may crash or hang before the serial console is
initialised. If unsure, say N.
when the kernel may crash or hang before the serial console is
initialised. If unsure, say N.
+ On devices that are running SH-IPL and want to keep the port
+ initialization consistent while not using the BIOS callbacks,
+ select both the EARLY_SCIF_CONSOLE and SH_STANDARD_BIOS, using
+ the kernel command line option to toggle back and forth.
+
config DEBUG_STACKOVERFLOW
bool "Check for stack overflows"
depends on DEBUG_KERNEL
config DEBUG_STACKOVERFLOW
bool "Check for stack overflows"
depends on DEBUG_KERNEL
#include <linux/console.h>
#include <linux/tty.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/tty.h>
#include <linux/init.h>
#ifdef CONFIG_SH_STANDARD_BIOS
#include <asm/sh_bios.h>
#ifdef CONFIG_SH_STANDARD_BIOS
#include <asm/sh_bios.h>
#include <linux/serial_core.h>
#include "../../../drivers/serial/sh-sci.h"
#include <linux/serial_core.h>
#include "../../../drivers/serial/sh-sci.h"
-#ifdef CONFIG_CPU_SH4
-#define SCIF_REG 0xffe80000
-#elif defined(CONFIG_CPU_SUBTYPE_SH72060)
-#define SCIF_REG 0xfffe9800
-#else
-#error "Undefined SCIF for this subtype"
-#endif
-
static struct uart_port scif_port = {
static struct uart_port scif_port = {
- .mapbase = SCIF_REG,
- .membase = (char __iomem *)SCIF_REG,
+ .mapbase = CONFIG_EARLY_SCIF_CONSOLE_PORT,
+ .membase = (char __iomem *)CONFIG_EARLY_SCIF_CONSOLE_PORT,
};
static void scif_sercon_putc(int c)
};
static void scif_sercon_putc(int c)
+#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_STANDARD_BIOS)
+/*
+ * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4
+ * devices that aren't using sh-ipl+g.
+ */
static void scif_sercon_init(int baud)
{
static void scif_sercon_init(int baud)
{
- ctrl_outw(0, SCIF_REG + 8);
- ctrl_outw(0, SCIF_REG);
+ ctrl_outw(0, scif_port.mapbase + 8);
+ ctrl_outw(0, scif_port.mapbase);
/* Set baud rate */
ctrl_outb((CONFIG_SH_PCLK_FREQ + 16 * baud) /
/* Set baud rate */
ctrl_outb((CONFIG_SH_PCLK_FREQ + 16 * baud) /
- (32 * baud) - 1, SCIF_REG + 4);
-
- ctrl_outw(12, SCIF_REG + 24);
- ctrl_outw(8, SCIF_REG + 24);
- ctrl_outw(0, SCIF_REG + 32);
- ctrl_outw(0x60, SCIF_REG + 16);
- ctrl_outw(0, SCIF_REG + 36);
- ctrl_outw(0x30, SCIF_REG + 8);
+ (32 * baud) - 1, scif_port.mapbase + 4);
+
+ ctrl_outw(12, scif_port.mapbase + 24);
+ ctrl_outw(8, scif_port.mapbase + 24);
+ ctrl_outw(0, scif_port.mapbase + 32);
+ ctrl_outw(0x60, scif_port.mapbase + 16);
+ ctrl_outw(0, scif_port.mapbase + 36);
+ ctrl_outw(0x30, scif_port.mapbase + 8);
+#endif /* CONFIG_CPU_SH4 && !CONFIG_SH_STANDARD_BIOS */
+#endif /* CONFIG_EARLY_SCIF_CONSOLE */
/*
* Setup a default console, if more than one is compiled in, rely on the
/*
* Setup a default console, if more than one is compiled in, rely on the
if (!strncmp(buf, "serial", 6)) {
early_console = &scif_console;
if (!strncmp(buf, "serial", 6)) {
early_console = &scif_console;
+#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_STANDARD_BIOS)
scif_sercon_init(115200);
#endif
}
scif_sercon_init(115200);
#endif
}
SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8)
SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16)
#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8)
SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16)
#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
+SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16)
SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16)
SCIF_FNS(SCSPTR, 0, 0, 0x24, 16)
SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16)
SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16)
SCIF_FNS(SCSPTR, 0, 0, 0x24, 16)