Change-Id: Ic7becefeb7e7a1000b259c21fedda76794b7115c
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
+
+&pvtm {
+ status = "okay";
+};
+
+&pmu_pvtm {
+ status = "okay";
+};
+
+&pvtm {
+ status = "okay";
+};
+
+&pmu_pvtm {
+ status = "okay";
+};
+&pvtm {
+ status = "okay";
+};
+
+&pmu_pvtm {
+ status = "okay";
+};
+
/* PINCTRL: always below everything else */
&pinctrl {
/* PINCTRL: always below everything else */
&pinctrl {
&edp_rk_fb {
status = "okay";
};
&edp_rk_fb {
status = "okay";
};
+
+&pvtm {
+ status = "okay";
+};
+
+&pmu_pvtm {
+ status = "okay";
+};
+
+&pvtm {
+ status = "okay";
+};
+
+&pmu_pvtm {
+ status = "okay";
+};
mode-recovery = <BOOT_RECOVERY>;
mode-ums = <BOOT_UMS>;
};
mode-recovery = <BOOT_RECOVERY>;
mode-ums = <BOOT_UMS>;
};
+
+ pmu_pvtm: pmu-pvtm {
+ compatible = "rockchip,rk3399-pmu-pvtm";
+ clocks = <&pmucru SCLK_PVTM_PMU>;
+ clock-names = "pmu";
+ status = "disabled";
+ };
status = "disabled";
};
};
status = "disabled";
};
};
+
+ pvtm: pvtm {
+ compatible = "rockchip,rk3399-pvtm";
+ clocks = <&cru SCLK_PVTM_CORE_L>,
+ <&cru SCLK_PVTM_CORE_B>,
+ <&cru SCLK_PVTM_GPU>,
+ <&cru SCLK_PVTM_DDR>;
+ clock-names = "core_l", "core_b", "gpu", "ddr";
+ status = "disabled";
+ };
};
tcphy0: phy@ff7c0000 {
};
tcphy0: phy@ff7c0000 {