- def T2_64 : Mips64GPRReg< 10, "10", [T2]>, DwarfRegNum<[10]>;
- def T3_64 : Mips64GPRReg< 11, "11", [T3]>, DwarfRegNum<[11]>;
- def T4_64 : Mips64GPRReg< 12, "12", [T4]>, DwarfRegNum<[12]>;
- def T5_64 : Mips64GPRReg< 13, "13", [T5]>, DwarfRegNum<[13]>;
- def T6_64 : Mips64GPRReg< 14, "14", [T6]>, DwarfRegNum<[14]>;
- def T7_64 : Mips64GPRReg< 15, "15", [T7]>, DwarfRegNum<[15]>;
- def S0_64 : Mips64GPRReg< 16, "16", [S0]>, DwarfRegNum<[16]>;
- def S1_64 : Mips64GPRReg< 17, "17", [S1]>, DwarfRegNum<[17]>;
- def S2_64 : Mips64GPRReg< 18, "18", [S2]>, DwarfRegNum<[18]>;
- def S3_64 : Mips64GPRReg< 19, "19", [S3]>, DwarfRegNum<[19]>;
- def S4_64 : Mips64GPRReg< 20, "20", [S4]>, DwarfRegNum<[20]>;
- def S5_64 : Mips64GPRReg< 21, "21", [S5]>, DwarfRegNum<[21]>;
- def S6_64 : Mips64GPRReg< 22, "22", [S6]>, DwarfRegNum<[22]>;
+ def T2_64 : Mips64GPRReg< 10, "10", [T2]>, DwarfRegNum<[10]>;
+ def T3_64 : Mips64GPRReg< 11, "11", [T3]>, DwarfRegNum<[11]>;
+ def T4_64 : Mips64GPRReg< 12, "12", [T4]>, DwarfRegNum<[12]>;
+ def T5_64 : Mips64GPRReg< 13, "13", [T5]>, DwarfRegNum<[13]>;
+ def T6_64 : Mips64GPRReg< 14, "14", [T6]>, DwarfRegNum<[14]>;
+ def T7_64 : Mips64GPRReg< 15, "15", [T7]>, DwarfRegNum<[15]>;
+ def S0_64 : Mips64GPRReg< 16, "16", [S0]>, DwarfRegNum<[16]>;
+ def S1_64 : Mips64GPRReg< 17, "17", [S1]>, DwarfRegNum<[17]>;
+ def S2_64 : Mips64GPRReg< 18, "18", [S2]>, DwarfRegNum<[18]>;
+ def S3_64 : Mips64GPRReg< 19, "19", [S3]>, DwarfRegNum<[19]>;
+ def S4_64 : Mips64GPRReg< 20, "20", [S4]>, DwarfRegNum<[20]>;
+ def S5_64 : Mips64GPRReg< 21, "21", [S5]>, DwarfRegNum<[21]>;
+ def S6_64 : Mips64GPRReg< 22, "22", [S6]>, DwarfRegNum<[22]>;