Set single-ended source termination resistance
to 100ohm for HDMI1.4 and 50ohm for HDMI2.0.
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
v_MPLL_GMP_CNTRL(
phy_mpll->gmp_cntrl));
}
v_MPLL_GMP_CNTRL(
phy_mpll->gmp_cntrl));
}
- rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_TERM_RESIS,
- v_TX_TERM(R50_OHMS));
rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_CLKSYMCTRL,
v_OVERRIDE(1) | v_SLOPEBOOST(0) |
v_TX_SYMON(1) | v_TX_TRAON(0) |
v_TX_TRBON(0) | v_CLK_SYMON(1));
rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_CLKSYMCTRL,
v_OVERRIDE(1) | v_SLOPEBOOST(0) |
v_TX_SYMON(1) | v_TX_TRAON(0) |
v_TX_TRBON(0) | v_CLK_SYMON(1));
- if (hdmi_dev->tmdsclk > 340000000)
- rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
- v_SUP_TXLVL(9) | v_SUP_CLKLVL(17));
- else if (hdmi_dev->tmdsclk > 165000000)
- rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
- v_SUP_TXLVL(14) | v_SUP_CLKLVL(17));
- else
+ if (hdmi_dev->tmdsclk > 340000000) {
+ rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_TERM_RESIS,
+ v_TX_TERM(R50_OHMS));
rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
- v_SUP_TXLVL(18) | v_SUP_CLKLVL(17));
-
- rockchip_hdmiv2_write_phy(hdmi_dev, 0x05, 0x8000);
+ v_SUP_TXLVL(9) |
+ v_SUP_CLKLVL(17));
+ } else {
+ rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_TERM_RESIS,
+ v_TX_TERM(R100_OHMS));
+ if (hdmi_dev->tmdsclk > 165000000)
+ rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
+ v_SUP_TXLVL(14) |
+ v_SUP_CLKLVL(17));
+ else
+ rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
+ v_SUP_TXLVL(18) |
+ v_SUP_CLKLVL(17));
+ }
+ /* rockchip_hdmiv2_write_phy(hdmi_dev, 0x05, 0x8000); */
if (hdmi_dev->tmdsclk_ratio_change)
msleep(100);
/* power on PHY */
if (hdmi_dev->tmdsclk_ratio_change)
msleep(100);
/* power on PHY */