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clk: rockchip: rk3328: add SCLK_HDMI_SFC id
author
Elaine Zhang
<zhangqing@rock-chips.com>
Fri, 17 Feb 2017 08:36:44 +0000
(16:36 +0800)
committer
Huang, Tao
<huangtao@rock-chips.com>
Fri, 17 Feb 2017 10:32:09 +0000
(18:32 +0800)
Change-Id: Ic876175272cba40093e555ee815e9261bb39d510
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
drivers/clk/rockchip/clk-rk3328.c
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diff --git
a/drivers/clk/rockchip/clk-rk3328.c
b/drivers/clk/rockchip/clk-rk3328.c
index 10b0e8ffc1c799737911e1e631c408e5a3ed52f4..8ee7730dcea3e0c87ce324afd3271ef693a6a28a 100644
(file)
--- a/
drivers/clk/rockchip/clk-rk3328.c
+++ b/
drivers/clk/rockchip/clk-rk3328.c
@@
-589,7
+589,7
@@
static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = {
COMPOSITE(ACLK_VOP_PRE, "aclk_vop_pre", mux_4plls_p, 0,
RK3328_CLKSEL_CON(39), 6, 2, MFLAGS, 0, 5, DFLAGS,
RK3328_CLKGATE_CON(5), 5, GFLAGS),
- GATE(
0
, "clk_hdmi_sfc", "xin24m", 0,
+ GATE(
SCLK_HDMI_SFC
, "clk_hdmi_sfc", "xin24m", 0,
RK3328_CLKGATE_CON(5), 4, GFLAGS),
COMPOSITE_NODIV(0, "clk_cif_src", mux_2plls_p, 0,