#define USBGRF_UOC1_CON0 (GRF_REG_BASE+0x11C)\r
#define USBGRF_UOC1_CON2 (GRF_REG_BASE+0x124)\r
#define USBGRF_UOC1_CON3 (GRF_REG_BASE+0x128)\r
+#define USBGRF_UOC3_CON0 (GRF_REG_BASE+0x138)\r
\r
#define USBGRF_UOC2_CON0 (GRF_REG_BASE+0x12C)\r
#if defined(CONFIG_SOC_RK3066B) || defined(CONFIG_SOC_RK3108) \r
unsigned int * phy_con0 = (unsigned int*)(USBGRF_UOC2_CON0);\r
unsigned int * phy_con1 = (unsigned int*)(USBGRF_UOC1_CON0);\r
unsigned int * phy_con2 = (unsigned int*)(USBGRF_UOC0_CON0);\r
+ unsigned int * phy_con3 = (unsigned int*)(USBGRF_UOC3_CON0);\r
// usb phy config init\r
// hsic phy config init, set hsicphy_txsrtune\r
*phy_con0 = ((0xf<<6)<<16)|(0xf<<6);\r
#else\r
*phy_con2 = (1<<16)|0;\r
#endif\r
+ /* change INCR to INCR16 or INCR8(beats less than 16)\r
+ * or INCR4(beats less than 8) or SINGLE(beats less than 4)\r
+ */\r
+ *phy_con3 = 0x00ff00bc;\r
}\r
\r
void rkehci_clock_init(void* pdata)\r