-//===-- AlphaAsmPrinter.cpp - Alpha LLVM assembly writer --------------===//
+//===-- AlphaAsmPrinter.cpp - Alpha LLVM assembly writer ------------------===//
//
// The LLVM Compiler Infrastructure
//
#include "Alpha.h"
#include "AlphaInstrInfo.h"
-#include "llvm/Constants.h"
-#include "llvm/DerivedTypes.h"
#include "llvm/Module.h"
#include "llvm/Assembly/Writer.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineConstantPool.h"
-#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/Target/MRegisterInfo.h"
-#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Mangler.h"
#include "llvm/ADT/Statistic.h"
-#include "llvm/ADT/StringExtras.h"
-#include "llvm/Support/CommandLine.h"
-#include <cctype>
+
using namespace llvm;
namespace {
const MachineOperand &MO = MI->getOperand(opNum);
if (MO.getType() == MachineOperand::MO_MachineRegister) {
assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
- O << LowercaseString(TM.getRegisterInfo()->get(MO.getReg()).Name);
+ O << TM.getRegisterInfo()->get(MO.getReg()).Name;
} else if (MO.isImmediate()) {
O << MO.getImmedValue();
} else {
// FALLTHROUGH
case MachineOperand::MO_MachineRegister:
case MachineOperand::MO_CCRegister:
- O << LowercaseString(RI.get(MO.getReg()).Name);
+ O << RI.get(MO.getReg()).Name;
return;
case MachineOperand::MO_SignExtendedImmed:
return;
case MachineOperand::MO_PCRelativeDisp:
- std::cerr << "Shouldn't use addPCDisp() when building PPC MachineInstrs";
+ std::cerr << "Shouldn't use addPCDisp() when building Alpha MachineInstrs";
abort();
return;
return;
case MachineOperand::MO_GlobalAddress:
- //std::cerr << "Global Addresses? Are you kidding?\n"
- //abort();
O << Mang->getValueName(MO.getGlobal());
return;