ahci_xgene: Use correct OOB tunning parameters for APM X-Gene SoC AHCI SATA Host...
authorSuman Tripathi <stripathi@apm.com>
Tue, 29 Jul 2014 06:54:51 +0000 (12:24 +0530)
committerTejun Heo <tj@kernel.org>
Tue, 29 Jul 2014 14:25:58 +0000 (10:25 -0400)
APM X-Gene SoC AHCI SATA Host controller driver requires
some correction of Phy Control OOB timing for the
COMINIT/COMWAKE parameters to correctly interoperate with
different kinds of disks.

Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Suman Tripathi <stripathi@apm.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
drivers/ata/ahci_xgene.c

index 3db8eaae15767a394a2169126d0ddca9863c3bd2..997b4178249a42f4a731dd1913601b204ce67ce4 100644 (file)
@@ -163,11 +163,11 @@ static void xgene_ahci_set_phy_cfg(struct xgene_ahci_context *ctx, int channel)
        /* Disable fix rate */
        writel(0x0001fffe, mmio + PORTPHY1CFG);
        readl(mmio + PORTPHY1CFG); /* Force a barrier */
-       writel(0x5018461c, mmio + PORTPHY2CFG);
+       writel(0x28183219, mmio + PORTPHY2CFG);
        readl(mmio + PORTPHY2CFG); /* Force a barrier */
-       writel(0x1c081907, mmio + PORTPHY3CFG);
+       writel(0x13081008, mmio + PORTPHY3CFG);
        readl(mmio + PORTPHY3CFG); /* Force a barrier */
-       writel(0x1c080815, mmio + PORTPHY4CFG);
+       writel(0x00480815, mmio + PORTPHY4CFG);
        readl(mmio + PORTPHY4CFG); /* Force a barrier */
        /* Set window negotiation */
        val = readl(mmio + PORTPHY5CFG);