/* scaler Timing */\r
//1920*1080*60\r
\r
-#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4\r
-#define S_H_PW 10\r
-#define S_H_BP 10\r
+#define S_OUT_CLK SCALE_RATE(148500000,74250000) //m=16 n=9 no=4\r
+#define S_H_PW 48\r
+#define S_H_BP 98\r
#define S_H_VD 1280\r
-#define S_H_FP 20\r
+#define S_H_FP 59\r
\r
-#define S_V_PW 10\r
-#define S_V_BP 10\r
+#define S_V_PW 6\r
+#define S_V_BP 25\r
#define S_V_VD 800\r
-#define S_V_FP 13\r
+#define S_V_FP 2\r
\r
-#define S_H_ST 440\r
-#define S_V_ST 13\r
+#define S_H_ST 495\r
+#define S_V_ST 2\r
\r
//1920*1080*50\r
#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4 \r
\r
//1280*720*50\r
\r
-#define S3_OUT_CLK SCALE_RATE(74250000,57375000) // m=34 n=11 no=4\r
-#define S3_H_PW 10\r
-#define S3_H_BP 10\r
+#define S3_OUT_CLK SCALE_RATE(74250000,67500000) // m=34 n=11 no=4\r
+#define S3_H_PW 48\r
+#define S3_H_BP 233\r
#define S3_H_VD 1280\r
-#define S3_H_FP 77\r
+#define S3_H_FP 59\r
\r
-#define S3_V_PW 2\r
-#define S3_V_BP 8\r
+#define S3_V_PW 6\r
+#define S3_V_BP 25\r
#define S3_V_VD 800\r
-#define S3_V_FP 6\r
+#define S3_V_FP 2\r
\r
-#define S3_H_ST 459\r
-#define S3_V_ST 13\r
+#define S3_H_ST 540\r
+#define S3_V_ST 3\r
\r
//720*576*50\r
-#define S4_OUT_CLK SCALE_RATE(27000000,63281250) //m=75 n=4 no=8\r
-#define S4_H_PW 10\r
-#define S4_H_BP 10\r
+#define S4_OUT_CLK SCALE_RATE(27000000,70312500) //m=75 n=4 no=8\r
+#define S4_H_PW 48\r
+#define S4_H_BP 233\r
#define S4_H_VD 1280\r
-#define S4_H_FP 185\r
+#define S4_H_FP 59\r
\r
-#define S4_V_PW 10\r
-#define S4_V_BP 10\r
+#define S4_V_PW 9\r
+#define S4_V_BP 57\r
#define S4_V_VD 800\r
-#define S4_V_FP 48\r
+#define S4_V_FP 2\r
\r
-#define S4_H_ST 81\r
-#define S4_V_ST 48\r
+#define S4_H_ST 90\r
+#define S4_V_ST 2\r
\r
//720*480*60\r
#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4\r
-#define S5_H_PW 10\r
-#define S5_H_BP 10\r
+#define S5_H_PW 48\r
+#define S5_H_BP 86\r
#define S5_H_VD 1280\r
-#define S5_H_FP 130\r
+#define S5_H_FP 16\r
\r
-#define S5_V_PW 10\r
-#define S5_V_BP 10\r
+#define S5_V_PW 9\r
+#define S5_V_BP 35\r
#define S5_V_VD 800\r
-#define S5_V_FP 54\r
+#define S5_V_FP 30\r
\r
#define S5_H_ST 476\r
-#define S5_V_ST 48\r
+#define S5_V_ST 12\r
\r
#define S_DCLK_POL 1\r
\r
switch(hdmi_resolution){\r
case HDMI_1920x1080p_60Hz:\r
/* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S_OUT_CLK;\r
- screen->s_hsync_len = S_H_PW;\r
- screen->s_left_margin = S_H_BP;\r
- screen->s_right_margin = S_H_FP;\r
- screen->s_hsync_len = S_H_PW;\r
- screen->s_upper_margin = S_V_BP;\r
- screen->s_lower_margin = S_V_FP;\r
- screen->s_vsync_len = S_V_PW;\r
- screen->s_hsync_st = S_H_ST;\r
- screen->s_vsync_st = S_V_ST;\r
- break;\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S_OUT_CLK;\r
+ screen->s_hsync_len = S_H_PW;\r
+ screen->s_left_margin = S_H_BP;\r
+ screen->s_right_margin = S_H_FP;\r
+ screen->s_hsync_len = S_H_PW;\r
+ screen->s_upper_margin = S_V_BP;\r
+ screen->s_lower_margin = S_V_FP;\r
+ screen->s_vsync_len = S_V_PW;\r
+ screen->s_hsync_st = S_H_ST;\r
+ screen->s_vsync_st = S_V_ST;\r
+ break;\r
case HDMI_1920x1080p_50Hz:\r
/* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S1_OUT_CLK;\r
- screen->s_hsync_len = S1_H_PW;\r
- screen->s_left_margin = S1_H_BP;\r
- screen->s_right_margin = S1_H_FP;\r
- screen->s_hsync_len = S1_H_PW;\r
- screen->s_upper_margin = S1_V_BP;\r
- screen->s_lower_margin = S1_V_FP;\r
- screen->s_vsync_len = S1_V_PW;\r
- screen->s_hsync_st = S1_H_ST;\r
- screen->s_vsync_st = S1_V_ST;\r
- break;\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S1_OUT_CLK;\r
+ screen->s_hsync_len = S1_H_PW;\r
+ screen->s_left_margin = S1_H_BP;\r
+ screen->s_right_margin = S1_H_FP;\r
+ screen->s_hsync_len = S1_H_PW;\r
+ screen->s_upper_margin = S1_V_BP;\r
+ screen->s_lower_margin = S1_V_FP;\r
+ screen->s_vsync_len = S1_V_PW;\r
+ screen->s_hsync_st = S1_H_ST;\r
+ screen->s_vsync_st = S1_V_ST;\r
+ break;\r
case HDMI_1280x720p_60Hz:\r
/* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S2_OUT_CLK;\r
- screen->s_hsync_len = S2_H_PW;\r
- screen->s_left_margin = S2_H_BP;\r
- screen->s_right_margin = S2_H_FP;\r
- screen->s_hsync_len = S2_H_PW;\r
- screen->s_upper_margin = S2_V_BP;\r
- screen->s_lower_margin = S2_V_FP;\r
- screen->s_vsync_len = S2_V_PW;\r
- screen->s_hsync_st = S2_H_ST;\r
- screen->s_vsync_st = S2_V_ST;\r
- break;\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S2_OUT_CLK;\r
+ screen->s_hsync_len = S2_H_PW;\r
+ screen->s_left_margin = S2_H_BP;\r
+ screen->s_right_margin = S2_H_FP;\r
+ screen->s_hsync_len = S2_H_PW;\r
+ screen->s_upper_margin = S2_V_BP;\r
+ screen->s_lower_margin = S2_V_FP;\r
+ screen->s_vsync_len = S2_V_PW;\r
+ screen->s_hsync_st = S2_H_ST;\r
+ screen->s_vsync_st = S2_V_ST;\r
+ break;\r
case HDMI_1280x720p_50Hz:\r
/* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S3_OUT_CLK;\r
- screen->s_hsync_len = S3_H_PW;\r
- screen->s_left_margin = S3_H_BP;\r
- screen->s_right_margin = S3_H_FP;\r
- screen->s_hsync_len = S3_H_PW;\r
- screen->s_upper_margin = S3_V_BP;\r
- screen->s_lower_margin = S3_V_FP;\r
- screen->s_vsync_len = S3_V_PW;\r
- screen->s_hsync_st = S3_H_ST;\r
- screen->s_vsync_st = S3_V_ST;\r
- break;\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S3_OUT_CLK;\r
+ screen->s_hsync_len = S3_H_PW;\r
+ screen->s_left_margin = S3_H_BP;\r
+ screen->s_right_margin = S3_H_FP;\r
+ screen->s_hsync_len = S3_H_PW;\r
+ screen->s_upper_margin = S3_V_BP;\r
+ screen->s_lower_margin = S3_V_FP;\r
+ screen->s_vsync_len = S3_V_PW;\r
+ screen->s_hsync_st = S3_H_ST;\r
+ screen->s_vsync_st = S3_V_ST;\r
+ break;\r
case HDMI_720x576p_50Hz_4_3:\r
case HDMI_720x576p_50Hz_16_9:\r
/* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S4_OUT_CLK;\r
- screen->s_hsync_len = S4_H_PW;\r
- screen->s_left_margin = S4_H_BP;\r
- screen->s_right_margin = S4_H_FP;\r
- screen->s_hsync_len = S4_H_PW;\r
- screen->s_upper_margin = S4_V_BP;\r
- screen->s_lower_margin = S4_V_FP;\r
- screen->s_vsync_len = S4_V_PW;\r
- screen->s_hsync_st = S4_H_ST;\r
- screen->s_vsync_st = S4_V_ST;\r
- break;\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S4_OUT_CLK;\r
+ screen->s_hsync_len = S4_H_PW;\r
+ screen->s_left_margin = S4_H_BP;\r
+ screen->s_right_margin = S4_H_FP;\r
+ screen->s_hsync_len = S4_H_PW;\r
+ screen->s_upper_margin = S4_V_BP;\r
+ screen->s_lower_margin = S4_V_FP;\r
+ screen->s_vsync_len = S4_V_PW;\r
+ screen->s_hsync_st = S4_H_ST;\r
+ screen->s_vsync_st = S4_V_ST;\r
+ break;\r
case HDMI_720x480p_60Hz_16_9:\r
case HDMI_720x480p_60Hz_4_3:\r
/* Scaler Timing */\r
- screen->hdmi_resolution = hdmi_resolution;\r
- screen->s_pixclock = S5_OUT_CLK;\r
- screen->s_hsync_len = S5_H_PW;\r
- screen->s_left_margin = S5_H_BP;\r
- screen->s_right_margin = S5_H_FP;\r
- screen->s_hsync_len = S5_H_PW;\r
- screen->s_upper_margin = S5_V_BP;\r
- screen->s_lower_margin = S5_V_FP;\r
- screen->s_vsync_len = S5_V_PW;\r
- screen->s_hsync_st = S5_H_ST;\r
- screen->s_vsync_st = S5_V_ST;\r
- break;\r
+ screen->hdmi_resolution = hdmi_resolution;\r
+ screen->s_pixclock = S5_OUT_CLK;\r
+ screen->s_hsync_len = S5_H_PW;\r
+ screen->s_left_margin = S5_H_BP;\r
+ screen->s_right_margin = S5_H_FP;\r
+ screen->s_hsync_len = S5_H_PW;\r
+ screen->s_upper_margin = S5_V_BP;\r
+ screen->s_lower_margin = S5_V_FP;\r
+ screen->s_vsync_len = S5_V_PW;\r
+ screen->s_hsync_st = S5_H_ST;\r
+ screen->s_vsync_st = S5_V_ST;\r
+ break;\r
default :\r
printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);\r
return -1;\r