Z5 Support In 3.0

diff --git a/arch/arm/configs/rk29_z5_defconfig b/arch/arm/configs/rk29_z5_defconfig
new file mode 100644 (file)
index 0000000..28db031
--- /dev/null
+++ b/arch/arm/configs/rk29_z5_defconfig
@@ -0,0 +1,2303 @@
+#
+# Automatically generated make config: don't edit
+# Linux/arm 3.0.8 Kernel Configuration
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_HAVE_SCHED_CLOCK=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_KTIME_SCALAR=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_VECTORS_BASE=0xffff0000
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+# CONFIG_KERNEL_GZIP is not set
+# CONFIG_KERNEL_LZMA is not set
+CONFIG_KERNEL_LZO=y
+CONFIG_DEFAULT_HOSTNAME="(none)"
+# CONFIG_SWAP is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_HAVE_SPARSE_IRQ=y
+CONFIG_GENERIC_IRQ_SHOW=y
+# CONFIG_SPARSE_IRQ is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_PREEMPT_RCU=y
+# CONFIG_TINY_RCU is not set
+# CONFIG_TINY_PREEMPT_RCU is not set
+CONFIG_PREEMPT_RCU=y
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_RCU_BOOST is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+# CONFIG_CGROUP_DEVICE is not set
+# CONFIG_CPUSETS is not set
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+# CONFIG_CGROUP_MEM_RES_CTLR is not set
+CONFIG_CGROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+# CONFIG_BLK_CGROUP is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_XZ is not set
+# CONFIG_RD_LZO is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_PANIC_TIMEOUT=5
+CONFIG_EXPERT=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+# CONFIG_ELF_CORE is not set
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_ASHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CNS3XXX is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_MXS is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P64X0 is not set
+# CONFIG_ARCH_S5PC100 is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_EXYNOS4 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_TCC_926 is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+CONFIG_ARCH_RK29=y
+# CONFIG_PLAT_SPEAR is not set
+# CONFIG_ARCH_VT8500 is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_KEYBOARD_GPIO_POLLED is not set
+# CONFIG_MACH_RK29SDK is not set
+# CONFIG_MACH_RK29SDK_DDR3 is not set
+# CONFIG_MACH_RK29WINACCORD is not set
+# CONFIG_MACH_RK29_K97 is not set
+# CONFIG_MACH_RK29FIH is not set
+# CONFIG_MACH_RK29_MALATA is not set
+# CONFIG_MACH_RK29_PHONESDK is not set
+# CONFIG_MACH_RK29_A22 is not set
+# CONFIG_MACH_RK29_TD8801_V2 is not set
+# CONFIG_MACH_RK29_PHONEPADSDK is not set
+# CONFIG_MACH_RK29_newton is not set
+CONFIG_MACH_RK29_PHONE_Z5=y
+# CONFIG_MACH_RK29_P91 is not set
+# CONFIG_DDR_TYPE_DDRII is not set
+CONFIG_DDR_TYPE_LPDDR=y
+# CONFIG_DDR_TYPE_DDR3_800D is not set
+# CONFIG_DDR_TYPE_DDR3_800E is not set
+# CONFIG_DDR_TYPE_DDR3_1066E is not set
+# CONFIG_DDR_TYPE_DDR3_1066F is not set
+# CONFIG_DDR_TYPE_DDR3_1066G is not set
+# CONFIG_DDR_TYPE_DDR3_1333F is not set
+# CONFIG_DDR_TYPE_DDR3_1333G is not set
+# CONFIG_DDR_TYPE_DDR3_1333H is not set
+# CONFIG_DDR_TYPE_DDR3_1333J is not set
+# CONFIG_DDR_TYPE_DDR3_1600G is not set
+# CONFIG_DDR_TYPE_DDR3_1600H is not set
+# CONFIG_DDR_TYPE_DDR3_1600J is not set
+# CONFIG_DDR_TYPE_DDR3_1600K is not set
+# CONFIG_DDR_TYPE_DDR3_1866J is not set
+# CONFIG_DDR_TYPE_DDR3_1866K is not set
+# CONFIG_DDR_TYPE_DDR3_1866L is not set
+# CONFIG_DDR_TYPE_DDR3_1866M is not set
+# CONFIG_DDR_TYPE_DDR3_2133K is not set
+# CONFIG_DDR_TYPE_DDR3_2133L is not set
+# CONFIG_DDR_TYPE_DDR3_2133M is not set
+# CONFIG_DDR_TYPE_DDR3_2133N is not set
+# CONFIG_DDR_TYPE_DDR3_DEFAULT is not set
+CONFIG_RK29_MEM_SIZE_M=512
+CONFIG_DDR_SDRAM_FREQ=192
+CONFIG_DDR_FREQ=y
+# CONFIG_DDR_RECONFIG is not set
+CONFIG_WIFI_CONTROL_FUNC=y
+
+#
+# RK29 VPU (Video Processing Unit) support
+#
+CONFIG_RK29_VPU=y
+# CONFIG_RK29_VPU_DEBUG is not set
+# CONFIG_RK29_JTAG is not set
+CONFIG_RK29_LAST_LOG=y
+
+#
+# support for RK29 power manage 
+#
+CONFIG_RK29_WORKING_POWER_MANAGEMENT=y
+CONFIG_RK29_CLK_SWITCH_TO_32K=y
+CONFIG_RK29_GPIO_SUSPEND=y
+# CONFIG_RK29_NEON_POWERDOMAIN_SET is not set
+CONFIG_RK29_SPI_INSRAM=y
+
+#
+# System MMU
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+CONFIG_ARM_THUMBEE=y
+# CONFIG_SWP_EMULATE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT_6=y
+CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_ARM_DMA_MEM_BUFFERABLE=y
+CONFIG_CPU_HAS_PMU=y
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+# CONFIG_ARM_ERRATA_743622 is not set
+# CONFIG_ARM_ERRATA_754322 is not set
+CONFIG_ARM_GIC=y
+CONFIG_PL330=y
+# CONFIG_FIQ_DEBUGGER is not set
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HIGHMEM=y
+# CONFIG_HIGHPTE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_COMPACTION is not set
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_NEED_PER_CPU_KM=y
+# CONFIG_CLEANCACHE is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_CC_STACKPROTECTOR is not set
+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
+# CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART is not set
+
+#
+# Boot options
+#
+# CONFIG_USE_OF is not set
+CONFIG_ZBOOT_ROM_TEXT=0
+CONFIG_ZBOOT_ROM_BSS=0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_AUTO_ZRELADDR is not set
+
+#
+# CPU Power Management
+#
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_STAT_DETAILS=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+# CONFIG_CPU_FREQ_GOV_INTERACTIVE is not set
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_HAS_WAKELOCK=y
+CONFIG_HAS_EARLYSUSPEND=y
+CONFIG_WAKELOCK=y
+CONFIG_WAKELOCK_STAT=y
+CONFIG_USER_WAKELOCK=y
+CONFIG_EARLYSUSPEND=y
+# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set
+# CONFIG_CONSOLE_EARLYSUSPEND is not set
+CONFIG_FB_EARLYSUSPEND=y
+CONFIG_PM_SLEEP=y
+# CONFIG_PM_RUNTIME is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_APM_EMULATION is not set
+# CONFIG_SUSPEND_TIME is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_XFRM_IPCOMP=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+CONFIG_IPV6_PRIVACY=y
+CONFIG_IPV6_ROUTER_PREF=y
+# CONFIG_IPV6_ROUTE_INFO is not set
+CONFIG_IPV6_OPTIMISTIC_DAD=y
+CONFIG_INET6_AH=y
+CONFIG_INET6_ESP=y
+CONFIG_INET6_IPCOMP=y
+CONFIG_IPV6_MIP6=y
+CONFIG_INET6_XFRM_TUNNEL=y
+CONFIG_INET6_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=y
+CONFIG_IPV6_MULTIPLE_TABLES=y
+# CONFIG_IPV6_SUBTREES is not set
+# CONFIG_IPV6_MROUTE is not set
+CONFIG_ANDROID_PARANOID_NETWORK=y
+CONFIG_NET_ACTIVITY_STATS=y
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+# CONFIG_BATMAN_ADV is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=y
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+# CONFIG_BT_BNEP is not set
+
+#
+# Bluetooth device drivers
+#
+# CONFIG_BT_HCIBTSDIO is not set
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+# CONFIG_BT_HCIUART_BCSP is not set
+# CONFIG_BT_HCIUART_ATH3K is not set
+# CONFIG_BT_HCIUART_LL is not set
+# CONFIG_BT_HCIVHCI is not set
+# CONFIG_BT_MRVL is not set
+CONFIG_BT_HCIBCM4325=y
+# CONFIG_IDBLOCK is not set
+CONFIG_WIFI_MAC=y
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_PRIV=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+# CONFIG_WIMAX is not set
+CONFIG_RFKILL=y
+# CONFIG_RFKILL_PM is not set
+# CONFIG_RFKILL_INPUT is not set
+# CONFIG_RFKILL_REGULATOR is not set
+# CONFIG_RFKILL_GPIO is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND is not set
+CONFIG_MTD_RKNAND=y
+CONFIG_MTD_NAND_RK29XX=y
+CONFIG_MTD_RKNAND_BUFFER=y
+# CONFIG_MTD_EMMC_CLK_POWER_SAVE is not set
+# CONFIG_MTD_NAND_RK29XX_DEBUG is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+
+#
+# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
+#
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
+CONFIG_ANDROID_PMEM=y
+# CONFIG_INTEL_MID_PTI is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_SENSORS_AK8975 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_TI_DAC7512 is not set
+CONFIG_UID_STAT=y
+# CONFIG_BMP085 is not set
+# CONFIG_WL127X_RFKILL is not set
+CONFIG_APANIC=y
+CONFIG_APANIC_PLABEL="kpanic"
+# CONFIG_STE is not set
+CONFIG_MTK23D=y
+# CONFIG_FM580X is not set
+# CONFIG_MU509 is not set
+# CONFIG_MW100 is not set
+# CONFIG_RK29_NEWTON is not set
+# CONFIG_RK29_SC8800 is not set
+# CONFIG_TDSC8800 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_RK29_SUPPORT_MODEM is not set
+CONFIG_RK29_GPS=y
+# CONFIG_GPS_GNS7560 is not set
+
+#
+# Motion Sensors Support
+#
+# CONFIG_MPU_NONE is not set
+CONFIG_MPU_SENSORS_MPU3050=y
+# CONFIG_MPU_SENSORS_MPU6000 is not set
+# CONFIG_MPU_SENSORS_ACCELEROMETER_NONE is not set
+# CONFIG_MPU_SENSORS_ADXL346 is not set
+# CONFIG_MPU_SENSORS_BMA150 is not set
+# CONFIG_MPU_SENSORS_BMA222 is not set
+# CONFIG_MPU_SENSORS_KXSD9 is not set
+# CONFIG_MPU_SENSORS_KXTF9 is not set
+# CONFIG_MPU_SENSORS_LIS331DLH is not set
+# CONFIG_MPU_SENSORS_LIS3DH is not set
+# CONFIG_MPU_SENSORS_LSM303DLHA is not set
+# CONFIG_MPU_SENSORS_MMA8450 is not set
+CONFIG_MPU_SENSORS_MMA845X=y
+# CONFIG_MPU_SENSORS_COMPASS_NONE is not set
+CONFIG_MPU_SENSORS_AK8975=y
+# CONFIG_MPU_SENSORS_MMC314X is not set
+# CONFIG_MPU_SENSORS_AMI30X is not set
+# CONFIG_MPU_SENSORS_AMI306 is not set
+# CONFIG_MPU_SENSORS_HMC5883 is not set
+# CONFIG_MPU_SENSORS_LSM303DLHM is not set
+# CONFIG_MPU_SENSORS_YAS529 is not set
+# CONFIG_MPU_SENSORS_YAS530 is not set
+# CONFIG_MPU_SENSORS_HSCDTD002B is not set
+# CONFIG_MPU_SENSORS_HSCDTD004A is not set
+CONFIG_MPU_SENSORS_PRESSURE_NONE=y
+# CONFIG_MPU_SENSORS_BMA085 is not set
+CONFIG_MPU_SENSORS_TIMERIRQ=y
+# CONFIG_IWMC3200TOP is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_ISCSI_BOOT_SYSFS is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+CONFIG_MD=y
+# CONFIG_BLK_DEV_MD is not set
+CONFIG_BLK_DEV_DM=y
+# CONFIG_DM_DEBUG is not set
+CONFIG_DM_CRYPT=y
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_RAID is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+CONFIG_DM_UEVENT=y
+# CONFIG_DM_FLAKEY is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_AX88796 is not set
+# CONFIG_RK29_VMAC is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_FTMAC100 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+CONFIG_WLAN_80211=y
+# CONFIG_WIFI_NONE is not set
+CONFIG_BCM4329=y
+# CONFIG_BCM4319 is not set
+# CONFIG_MV8686 is not set
+# CONFIG_AR6003 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+CONFIG_PPP=y
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+CONFIG_PPP_BSDCOMP=y
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOLAC is not set
+# CONFIG_PPPOPNS is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=y
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+CONFIG_INPUT_KEYRESET=y
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYS_RK29=y
+# CONFIG_KEYS_RK29_NEWTON is not set
+# CONFIG_SYNAPTICS_SO340010 is not set
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_WM831X_GPIO is not set
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_XPT2046_SPI is not set
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_ILI2102_IIC is not set
+# CONFIG_TOUCHSCREEN_GT8XX is not set
+# CONFIG_TOUCHSCREEN_IT7250 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MAX11801 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_WM831X is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+# CONFIG_HANNSTAR_P1003 is not set
+# CONFIG_ATMEL_MXT224 is not set
+# CONFIG_SINTEK_3FA16 is not set
+# CONFIG_EETI_EGALAX is not set
+# CONFIG_TOUCHSCREEN_IT7260 is not set
+# CONFIG_TOUCHSCREEN_IT7260_I2C is not set
+# CONFIG_TOUCHSCREEN_NAS is not set
+# CONFIG_LAIBAO_TS is not set
+# CONFIG_TOUCHSCREEN_GT801_IIC is not set
+# CONFIG_TOUCHSCREEN_GT818_IIC is not set
+# CONFIG_TOUCHSCREEN_PIXCIR is not set
+# CONFIG_D70_L3188A is not set
+# CONFIG_TOUCHSCREEN_GT819 is not set
+CONFIG_TOUCHSCREEN_FT5306=y
+# CONFIG_TOUCHSCREEN_FT5406 is not set
+# CONFIG_ATMEL_MXT1386 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_LPSENSOR_ISL29028 is not set
+# CONFIG_INPUT_LPSENSOR_CM3602 is not set
+# CONFIG_INPUT_LPSENSOR_AL3006 is not set
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYCHORD is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+CONFIG_INPUT_UINPUT=y
+# CONFIG_INPUT_GPIO is not set
+# CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+CONFIG_INPUT_WM831X_ON=y
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_CMA3000 is not set
+# CONFIG_MAG_SENSORS is not set
+# CONFIG_G_SENSOR_DEVICE is not set
+# CONFIG_GYRO_SENSOR_DEVICE is not set
+# CONFIG_INPUT_JOGBALL is not set
+# CONFIG_LIGHT_SENSOR_DEVICE is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+# CONFIG_CONSOLE_TRANSLATIONS is not set
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+CONFIG_DEVMEM=y
+CONFIG_DEVKMEM=y
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+CONFIG_SERIAL_RK29=y
+CONFIG_UART0_RK29=y
+CONFIG_UART0_CTS_RTS_RK29=y
+# CONFIG_UART0_DMA_RK29 is not set
+CONFIG_UART1_RK29=y
+CONFIG_UART2_RK29=y
+CONFIG_UART2_CTS_RTS_RK29=y
+# CONFIG_UART2_DMA_RK29 is not set
+CONFIG_UART3_RK29=y
+# CONFIG_UART3_CTS_RTS_RK29 is not set
+# CONFIG_UART3_DMA_RK29 is not set
+CONFIG_SERIAL_RK29_CONSOLE=y
+# CONFIG_SERIAL_SC8800 is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+# CONFIG_HVC_DCC is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_DCC_TTY is not set
+# CONFIG_RAMOOPS is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+# CONFIG_I2C_CHARDEV is not set
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+CONFIG_I2C_RK29=y
+
+#
+# Now, there are four I2C interfaces selected by developer.
+#
+CONFIG_I2C0_RK29=y
+CONFIG_RK29_I2C0_CONTROLLER=y
+# CONFIG_RK29_I2C0_GPIO is not set
+CONFIG_I2C1_RK29=y
+CONFIG_RK29_I2C1_CONTROLLER=y
+# CONFIG_RK29_I2C1_GPIO is not set
+CONFIG_I2C2_RK29=y
+CONFIG_RK29_I2C2_CONTROLLER=y
+# CONFIG_RK29_I2C2_GPIO is not set
+CONFIG_I2C3_RK29=y
+CONFIG_RK29_I2C3_CONTROLLER=y
+# CONFIG_RK29_I2C3_GPIO is not set
+# CONFIG_I2C_DEV_RK29 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_ALTERA is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+CONFIG_SPIM_RK29=y
+CONFIG_SPIM0_RK29=y
+CONFIG_SPIM1_RK29=y
+CONFIG_LCD_USE_SPIM_CONTROL=y
+# CONFIG_LCD_USE_SPI0 is not set
+CONFIG_LCD_USE_SPI1=y
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ADC=y
+# CONFIG_ADC_RK28 is not set
+CONFIG_ADC_RK29=y
+
+#
+# Headset device support
+#
+CONFIG_RK_HEADSET_DET=y
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+CONFIG_GPIO_WM831X=y
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_GPIO_PCA9554 is not set
+# CONFIG_IOEXTEND_TCA6424 is not set
+CONFIG_EXPANDED_GPIO_NUM=0
+CONFIG_EXPANDED_GPIO_IRQ_NUM=0
+# CONFIG_EXPAND_GPIO_SOFT_INTERRUPT is not set
+CONFIG_SPI_FPGA_GPIO_NUM=96
+CONFIG_SPI_FPGA_GPIO_IRQ_NUM=16
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+CONFIG_WM831X_BACKUP=y
+CONFIG_WM831X_POWER=y
+CONFIG_WM831X_CHARGER_DISPLAY=y
+CONFIG_WM831X_WITH_BATTERY=y
+# CONFIG_TEST_POWER is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_BQ20Z75 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_BATTERY_STC3100 is not set
+# CONFIG_BATTERY_BQ27510 is not set
+# CONFIG_BATTERY_BQ27541 is not set
+# CONFIG_BATTERY_BQ3060 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+# CONFIG_CHARGER_GPIO is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+CONFIG_MFD_SUPPORT=y
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_STMPE is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_WM8400 is not set
+CONFIG_MFD_WM831X=y
+# CONFIG_MFD_WM831X_I2C is not set
+CONFIG_MFD_WM831X_SPI=y
+# CONFIG_MFD_WM831X_SPI_A22 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_MC13XXX is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_TPS65910 is not set
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_DUMMY is not set
+# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX8649 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+# CONFIG_REGULATOR_MAX8952 is not set
+CONFIG_REGULATOR_WM831X=y
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_LP3972 is not set
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_RK2818_REGULATOR_CHARGE is not set
+# CONFIG_RK2818_REGULATOR_LP8725 is not set
+# CONFIG_REGULATOR_ACT8891 is not set
+# CONFIG_RK29_PWM_REGULATOR is not set
+# CONFIG_REGULATOR_ISL6271A is not set
+# CONFIG_REGULATOR_AD5398 is not set
+# CONFIG_REGULATOR_TPS6524X is not set
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+# CONFIG_MEDIA_CONTROLLER is not set
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+CONFIG_RC_CORE=y
+CONFIG_LIRC=y
+CONFIG_RC_MAP=y
+CONFIG_IR_NEC_DECODER=y
+CONFIG_IR_RC5_DECODER=y
+CONFIG_IR_RC6_DECODER=y
+CONFIG_IR_JVC_DECODER=y
+CONFIG_IR_SONY_DECODER=y
+CONFIG_IR_RC5_SZ_DECODER=y
+CONFIG_IR_LIRC_CODEC=y
+# CONFIG_IR_IMON is not set
+# CONFIG_IR_MCEUSB is not set
+# CONFIG_IR_REDRAT3 is not set
+# CONFIG_IR_STREAMZAP is not set
+# CONFIG_RC_LOOPBACK is not set
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA827X=y
+CONFIG_MEDIA_TUNER_TDA18271=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_VIDEOBUF2_CORE=y
+# CONFIG_VIDEO_RK29XX_VOUT is not set
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+CONFIG_VIDEO_IR_I2C=y
+
+#
+# Audio decoders, processors and mixers
+#
+
+#
+# RDS decoders
+#
+
+#
+# Video decoders
+#
+
+#
+# Video and audio decoders
+#
+
+#
+# MPEG video encoders
+#
+
+#
+# Video encoders
+#
+
+#
+# Camera sensor devices
+#
+
+#
+# Video improvement chips
+#
+
+#
+# Miscelaneous helper chips
+#
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_NOON010PC30 is not set
+CONFIG_SOC_CAMERA=y
+# CONFIG_SOC_CAMERA_IMX074 is not set
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+# CONFIG_SOC_CAMERA_MT9M111 is not set
+# CONFIG_SOC_CAMERA_MT9M112 is not set
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9T111 is not set
+# CONFIG_SOC_CAMERA_MT9P111 is not set
+# CONFIG_SOC_CAMERA_MT9D112 is not set
+# CONFIG_SOC_CAMERA_MT9D113 is not set
+# CONFIG_SOC_CAMERA_MT9T112 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_RJ54N1 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+# CONFIG_SOC_CAMERA_OV2640 is not set
+# CONFIG_SOC_CAMERA_OV6650 is not set
+# CONFIG_SOC_CAMERA_OV772X is not set
+# CONFIG_SOC_CAMERA_OV7675 is not set
+# CONFIG_SOC_CAMERA_OV2655 is not set
+# CONFIG_SOC_CAMERA_OV2659 is not set
+# CONFIG_SOC_CAMERA_OV9650 is not set
+# CONFIG_SOC_CAMERA_OV3640 is not set
+# CONFIG_SOC_CAMERA_OV5642 is not set
+# CONFIG_SOC_CAMERA_OV5640 is not set
+# CONFIG_SOC_CAMERA_S5K6AA is not set
+# CONFIG_SOC_CAMERA_GT2005 is not set
+# CONFIG_SOC_CAMERA_GC0307 is not set
+# CONFIG_SOC_CAMERA_GC0308 is not set
+# CONFIG_SOC_CAMERA_GC0309 is not set
+# CONFIG_SOC_CAMERA_GC2015 is not set
+# CONFIG_SOC_CAMERA_HI253 is not set
+# CONFIG_SOC_CAMERA_HI704 is not set
+# CONFIG_SOC_CAMERA_SIV120B is not set
+# CONFIG_SOC_CAMERA_SID130B is not set
+# CONFIG_SOC_CAMERA_NT99250 is not set
+# CONFIG_SOC_CAMERA_OV9640 is not set
+# CONFIG_SOC_CAMERA_OV9740 is not set
+# CONFIG_VIDEO_SH_MOBILE_CSI2 is not set
+# CONFIG_VIDEO_SH_MOBILE_CEU is not set
+CONFIG_VIDEO_RK29=y
+CONFIG_VIDEO_RK29_WORK_ONEFRAME=y
+# CONFIG_VIDEO_RK29_WORK_PINGPONG is not set
+CONFIG_VIDEO_RK29_WORK_IPP=y
+# CONFIG_VIDEO_RK29_WORK_NOT_IPP is not set
+CONFIG_VIDEO_RK29_DIGITALZOOM_IPP_ON=y
+# CONFIG_VIDEO_RK29_DIGITALZOOM_IPP_OFF is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_I2C_SI4713 is not set
+# CONFIG_RADIO_SI4713 is not set
+# CONFIG_RADIO_SI470X is not set
+# CONFIG_RADIO_TEA5764 is not set
+# CONFIG_RADIO_SAA7706H is not set
+# CONFIG_RADIO_TEF6862 is not set
+# CONFIG_RADIO_WL1273 is not set
+
+#
+# Texas Instruments WL128x FM driver (ST based)
+#
+# CONFIG_RADIO_WL128X is not set
+# CONFIG_SMS_SIANO_MDTV is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_ION is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_TMIO is not set
+CONFIG_FB_RK29=y
+CONFIG_FB_WORK_IPP=y
+# CONFIG_FB_SCALING_OSD is not set
+CONFIG_FB_ROTATE_VIDEO=y
+# CONFIG_FB_MIRROR_X_Y is not set
+# CONFIG_CLOSE_WIN1_DYNAMIC is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_WM831X=y
+# CONFIG_BACKLIGHT_RK29_BL is not set
+# CONFIG_BACKLIGHT_RK29_NEWTON_BL is not set
+# CONFIG_FIH_TOUCHKEY_LED is not set
+# CONFIG_BACKLIGHT_AW9364 is not set
+# CONFIG_BUTTON_LIGHT is not set
+# CONFIG_BACKLIGHT_ADP8860 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+
+#
+# Display device support
+#
+CONFIG_DISPLAY_SUPPORT=y
+
+#
+# Display hardware drivers
+#
+# CONFIG_LCD_NULL is not set
+# CONFIG_LCD_LG_LP097X02 is not set
+# CONFIG_LCD_TD043MGEA1 is not set
+# CONFIG_LCD_HX8357 is not set
+# CONFIG_LCD_TJ048NC01CA is not set
+# CONFIG_LCD_HL070VM4AU is not set
+# CONFIG_LCD_HSD070IDW1 is not set
+# CONFIG_LCD_RGB_TFT480800_25_E is not set
+# CONFIG_LCD_HSD100PXN is not set
+# CONFIG_LCD_HSD07PFW1 is not set
+# CONFIG_LCD_BYD8688FTGF is not set
+# CONFIG_LCD_B101AW06 is not set
+# CONFIG_LCD_LS035Y8DX02A is not set
+# CONFIG_LCD_LS035Y8DX04A is not set
+# CONFIG_LCD_CPTCLAA038LA31XE is not set
+# CONFIG_LCD_A060SE02 is not set
+# CONFIG_LCD_S1D13521 is not set
+# CONFIG_LCD_NT35582 is not set
+# CONFIG_LCD_NT35580 is not set
+# CONFIG_LCD_IPS1P5680_V1_E is not set
+# CONFIG_LCD_MCU_TFT480800_25_E is not set
+# CONFIG_LCD_NT35510 is not set
+# CONFIG_LCD_ILI9803_CPT4_3 is not set
+# CONFIG_LCD_AT070TNA2 is not set
+# CONFIG_LCD_AT070TN93 is not set
+# CONFIG_LCD_TX23D88VM is not set
+CONFIG_LCD_A050VL01=y
+
+#
+# HDMI
+#
+# CONFIG_HDMI is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE is not set
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_LOGO_CHARGER_CLUT224=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+# CONFIG_SND_SPI is not set
+CONFIG_SND_SOC=y
+# CONFIG_SND_SOC_CACHE_LZO is not set
+CONFIG_SND_RK29_SOC=y
+# CONFIG_SND_RK29_SOC_WM8988 is not set
+# CONFIG_SND_RK29_SOC_WM8900 is not set
+# CONFIG_SND_RK29_SOC_RT5621 is not set
+# CONFIG_SND_RK29_SOC_RT5631 is not set
+# CONFIG_SND_RK29_SOC_RT5625 is not set
+# CONFIG_SND_RK29_SOC_WM8994 is not set
+# CONFIG_SND_RK29_SOC_CS42L52 is not set
+# CONFIG_SND_RK29_SOC_AIC3111 is not set
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+# CONFIG_SOUND_PRIME is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+CONFIG_USB_OTG_BLACKLIST_HUB=y
+# CONFIG_USB_MUSB_HDRC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_FUSB300 is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_PXA_U2O is not set
+# CONFIG_USB_GADGET_M66592 is not set
+CONFIG_USB_GADGET_DWC_OTG=y
+CONFIG_USB_DWC_OTG=y
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_MASS_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_USB_G_ANDROID=y
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_OTG_WAKELOCK is not set
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ULPI is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_USB20_OTG=y
+CONFIG_DWC_OTG_DEVICE_ONLY=y
+CONFIG_DWC_CONN_EN=y
+# CONFIG_DWC_OTG_DEBUG is not set
+# CONFIG_DWC_REMOTE_WAKEUP is not set
+CONFIG_DWC_OTG=y
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_UNSAFE_RESUME=y
+# CONFIG_MMC_CLKGATE is not set
+CONFIG_MMC_EMBEDDED_SDIO=y
+CONFIG_MMC_PARANOID_SD_INIT=y
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_SDMMC_RK29=y
+
+#
+# Now, there are two SDMMC controllers selected, SDMMC0 and SDMMC1.
+#
+# CONFIG_SDMMC_RK29_OLD is not set
+CONFIG_SDMMC0_RK29=y
+# CONFIG_SDMMC0_RK29_WRITE_PROTECT is not set
+CONFIG_SDMMC1_RK29=y
+# CONFIG_SDMMC1_RK29_WRITE_PROTECT is not set
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MMC_DW is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_NFC_DEVICES is not set
+CONFIG_SWITCH=y
+CONFIG_SWITCH_GPIO=y
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+CONFIG_RTC_INTF_ALARM=y
+CONFIG_RTC_INTF_ALARM_DEV=y
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_HYM8563 is not set
+# CONFIG_RTC_M41T66 is not set
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_S35392A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+CONFIG_RTC_DRV_WM831X=y
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+CONFIG_STAGING=y
+# CONFIG_ECHO is not set
+# CONFIG_BRCMUTIL is not set
+
+#
+# Android
+#
+CONFIG_ANDROID=y
+CONFIG_ANDROID_BINDER_IPC=y
+CONFIG_ANDROID_LOGGER=y
+CONFIG_ANDROID_RAM_CONSOLE=y
+CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION=y
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_DATA_SIZE=128
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_ECC_SIZE=16
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_SYMBOL_SIZE=8
+CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_POLYNOMIAL=0x11d
+# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set
+CONFIG_ANDROID_TIMED_OUTPUT=y
+CONFIG_ANDROID_TIMED_GPIO=y
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
+# CONFIG_POHMELFS is not set
+# CONFIG_IIO is not set
+
+#
+# GPU Vivante
+#
+CONFIG_VIVANTE=y
+
+#
+# IPP
+#
+CONFIG_RK29_IPP=y
+# CONFIG_DEINTERLACE is not set
+# CONFIG_XVMALLOC is not set
+# CONFIG_ZRAM is not set
+# CONFIG_FB_SM7XX is not set
+# CONFIG_LIRC_STAGING is not set
+CONFIG_MACH_NO_WESTBRIDGE=y
+# CONFIG_FT1000 is not set
+
+#
+# Speakup console speech
+#
+# CONFIG_SPEAKUP is not set
+# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set
+# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set
+
+#
+# Altera FPGA firmware download module
+#
+# CONFIG_ALTERA_STAPL is not set
+CONFIG_CLKDEV_LOOKUP=y
+
+#
+# CMMB
+#
+# CONFIG_CMMB is not set
+# CONFIG_TEST_CODE is not set
+# CONFIG_RK29_SMC is not set
+
+#
+# CIR support
+#
+# CONFIG_RK_CIR is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_DEFAULTS_TO_ORDERED=y
+# CONFIG_EXT3_FS_XATTR is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_USE_FOR_EXT23=y
+# CONFIG_EXT4_FS_XATTR is not set
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD=y
+CONFIG_JBD2=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+# CONFIG_AUTOFS4_FS is not set
+CONFIG_FUSE_FS=y
+# CONFIG_CUSE is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_YAFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+CONFIG_NLS_CODEPAGE_850=y
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+CONFIG_NLS_CODEPAGE_936=y
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+CONFIG_NLS_ISO8859_15=y
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_SCHEDSTATS=y
+CONFIG_TIMER_STATS=y
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_TEST_LIST_SORT is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_RCU_CPU_STALL_VERBOSE=y
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_STRICT_DEVMEM is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=y
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=y
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_TWOFISH=y
+CONFIG_CRYPTO_TWOFISH_COMMON=y
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=y
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_REED_SOLOMON=y
+CONFIG_REED_SOLOMON_ENC8=y
+CONFIG_REED_SOLOMON_DEC8=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+# CONFIG_AVERAGE is not set

diff --git a/arch/arm/mach-rk29/Kconfig b/arch/arm/mach-rk29/Kconfig
index 22fa6e1aa384379c99bed6dc8c175c41c95fd936..01d8bedbcda189c567506e24e88446c1d151c935 100644 (file)
--- a/arch/arm/mach-rk29/Kconfig
+++ b/arch/arm/mach-rk29/Kconfig
@@ -70,6 +70,12 @@ config MACH_RK29_newton
                bool "ROCKCHIP Board Rk29 For project newton"
                help
                  Support for the ROCKCHIP Board For project newton.
+
+config MACH_RK29_PHONE_Z5
+       depends on ARCH_RK29
+       bool "ROCKCHIP Board Rk29 For Z5"
+        help
+         Support for the ROCKCHIP Board For Z5.
                  
 config MACH_RK29_P91
        depends on ARCH_RK29

diff --git a/arch/arm/mach-rk29/Makefile b/arch/arm/mach-rk29/Makefile
index ad27049352af942dcefd2c5aecee9c3379d8669f..811b6f416408a640b1ad222815c8fb92497cedca 100644 (file)
--- a/arch/arm/mach-rk29/Makefile
+++ b/arch/arm/mach-rk29/Makefile
@@ -25,4 +25,4 @@ obj-$(CONFIG_MACH_RK29_TD8801_V2) += board-rk29-td8801_v2.o board-rk29-td8801_v2
 obj-$(CONFIG_MACH_RK29_PHONEPADSDK) += board-rk29phonepadsdk.o board-rk29phonepadsdk-key.o board-rk29phonepadsdk-rfkill.o board-rk29phonepadsdk-power.o
 obj-$(CONFIG_MACH_RK29_newton) += board-rk29-newton.o board-rk29-newton-key.o board-newton-rfkill.o board-rk29sdk-power.o
 obj-$(CONFIG_MACH_RK29_K97) += board-rk29-k97.o board-rk29k97-key.o board-rk29sdk-rfkill.o board-rk29sdk-power.o
-
+obj-$(CONFIG_MACH_RK29_PHONE_Z5) += board-rk29-z5.o board-rk29-z5-key.o board-rk29-z5-rfkill.o

diff --git a/arch/arm/mach-rk29/board-rk29-z5-key.c b/arch/arm/mach-rk29/board-rk29-z5-key.c
new file mode 100644 (file)
index 0000000..dc074d3
--- /dev/null
+++ b/arch/arm/mach-rk29/board-rk29-z5-key.c
@@ -0,0 +1,108 @@
+#include <mach/key.h>
+#include <mach/gpio.h>
+
+#define EV_ENCALL                              KEY_F4
+#define EV_MENU                                        KEY_F1
+
+#define PRESS_LEV_LOW                  1
+#define PRESS_LEV_HIGH                 0
+
+static struct rk29_keys_button key_button[] = {
+       {
+               .desc   = "menu",
+               .code   = EV_MENU,
+               .gpio   = RK29_PIN6_PA0,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "vol+",
+               .code   = KEY_VOLUMEUP,
+               .gpio   = RK29_PIN6_PA1,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "vol-",
+               .code   = KEY_VOLUMEDOWN,
+               .gpio   = RK29_PIN6_PA2,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "home",
+               .code   = KEY_HOME,
+               .gpio   = RK29_PIN6_PA3,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "search",
+               .code   = KEY_SEARCH,
+               .gpio   = RK29_PIN6_PA4,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "esc",
+               .code   = KEY_BACK,
+               .gpio   = RK29_PIN6_PA5,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "sensor",
+               .code   = KEY_BACK,//KEY_CAMERA,
+               .gpio   = RK29_PIN6_PA6,
+               .active_low = PRESS_LEV_LOW,
+       },
+       /*
+       {
+               .desc   = "play",
+               .code   = KEY_POWER,
+               .gpio   = RK29_PIN6_PA7,
+               .active_low = PRESS_LEV_LOW,
+               .wakeup = 1,
+       },
+       */
+#if 0
+       {
+               .desc   = "vol+",
+               .code   = KEY_VOLUMEDOWN,
+               .adc_value      = 95,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "vol-",
+               .code   = KEY_VOLUMEUP,
+               .adc_value      = 249,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "menu",
+               .code   = EV_MENU,
+               .adc_value      = 406,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "home",
+               .code   = KEY_HOME,
+               .code_long_press = KEY_F4,
+               .adc_value      = 561,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "esc",
+               .code   = KEY_ESC,
+               .adc_value      = 726,
+               .active_low = PRESS_LEV_LOW,
+       },
+       {
+               .desc   = "adkey6",
+               .code   = KEY_BACK,
+               .code_long_press = EV_ENCALL,
+               .adc_value      = 899,
+               .active_low = PRESS_LEV_LOW,
+       },
+#endif
+};
+struct rk29_keys_platform_data rk29_keys_pdata = {
+       .buttons        = key_button,
+       .nbuttons       = ARRAY_SIZE(key_button),
+       .chn    = -1,  //chn: 0-7, if do not use ADC,set 'chn' -1
+};
+

diff --git a/arch/arm/mach-rk29/board-rk29-z5-rfkill.c b/arch/arm/mach-rk29/board-rk29-z5-rfkill.c
new file mode 100644 (file)
index 0000000..6cdcab9
--- /dev/null
+++ b/arch/arm/mach-rk29/board-rk29-z5-rfkill.c
@@ -0,0 +1,307 @@
+/*
+ * Copyright (C) 2010 ROCKCHIP, Inc.
+ * Author: roger_chen <cz@rock-chips.com>
+ *
+ * This program is the bluetooth device bcm4329's driver,
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/rfkill.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/wakelock.h>
+#include <linux/fs.h>
+#include <asm/uaccess.h>
+#include <mach/gpio.h>
+#include <asm/irq.h>
+#include <mach/iomux.h>
+#include <linux/wakelock.h>
+#include <linux/timer.h>
+#include <mach/board.h>
+#if 0
+#define DBG(x...)   printk(KERN_INFO x)
+#else
+#define DBG(x...)
+#endif
+
+#define BT_WAKE_HOST_SUPPORT 1
+
+struct bt_ctrl
+{
+    struct rfkill *bt_rfk;
+#if BT_WAKE_HOST_SUPPORT
+    struct timer_list tl;
+    bool b_HostWake;
+    struct wake_lock bt_wakelock;
+#endif
+};
+
+#define BT_GPIO_POWER           RK29_PIN5_PD6
+#define IOMUX_BT_GPIO_POWER     rk29_mux_api_set(GPIO5D6_SDMMC1PWREN_NAME, GPIO5H_GPIO5D6);
+#define BT_GPIO_RESET                  RK29_PIN6_PC7
+#define BT_GPIO_WAKE_UP         RK29_PIN6_PD0
+#define BT_GPIO_WAKE_UP_HOST    RK29_PIN4_PD4
+#define IOMUX_BT_GPIO_WAKE_UP_HOST() rk29_mux_api_set(GPIO4D4_CPUTRACECLK_NAME,GPIO4H_GPIO4D4);
+
+//bt cts paired to uart rts
+#define UART_RTS                RK29_PIN2_PA7
+#define IOMUX_UART_RTS_GPIO     rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_GPIO2A7);
+#define IOMUX_UART_RTS          rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_UART2_RTS_N);
+
+#define BT_WAKE_LOCK_TIMEOUT    10 //s
+
+static const char bt_name[] = "bcm4329";
+
+
+struct bt_ctrl gBtCtrl;
+    
+#if BT_WAKE_HOST_SUPPORT
+void resetBtHostSleepTimer(void)
+{
+    mod_timer(&(gBtCtrl.tl),jiffies + BT_WAKE_LOCK_TIMEOUT*HZ);//ÔÙÖØÐÂÉèÖó¬Ê±Öµ¡£    
+}
+
+void btWakeupHostLock(void)
+{
+    if(gBtCtrl.b_HostWake == false){
+        DBG("*************************Lock\n");
+
+        wake_lock(&(gBtCtrl.bt_wakelock));
+        gBtCtrl.b_HostWake = true;
+    }
+}
+
+void btWakeupHostUnlock(void)
+{
+    if(gBtCtrl.b_HostWake == true){        
+        DBG("*************************UnLock\n");
+        wake_unlock(&(gBtCtrl.bt_wakelock));  //ÈÃϵͳ˯Ãß    
+        gBtCtrl.b_HostWake = false;
+    }    
+}
+
+static void timer_hostSleep(unsigned long arg)
+{     
+       DBG("%s---b_HostWake=%d\n",__FUNCTION__,gBtCtrl.b_HostWake);
+    btWakeupHostUnlock();
+}
+
+
+#ifdef CONFIG_PM
+static int bcm4329_rfkill_suspend(struct platform_device *pdev, pm_message_t state)
+{   
+    DBG("%s\n",__FUNCTION__);          
+
+       //To prevent uart to receive bt data when suspended
+       IOMUX_UART_RTS_GPIO;
+       gpio_request(UART_RTS, "uart_rts");
+       gpio_direction_output(UART_RTS, 0);
+       gpio_set_value(UART_RTS, GPIO_HIGH);
+       
+    return 0;
+}
+
+static int bcm4329_rfkill_resume(struct platform_device *pdev)
+{  
+    DBG("%s\n",__FUNCTION__);     
+       
+    btWakeupHostLock();
+    resetBtHostSleepTimer();
+
+       gpio_set_value(UART_RTS, GPIO_LOW);
+       IOMUX_UART_RTS;
+       
+    return 0;
+}
+#else
+#define bcm4329_rfkill_suspend NULL
+#define bcm4329_rfkill_resume  NULL
+#endif
+
+static irqreturn_t bcm4329_wake_host_irq(int irq, void *dev)
+{
+       DBG("%s\n",__FUNCTION__);    
+
+    btWakeupHostLock();
+    resetBtHostSleepTimer();
+       return IRQ_HANDLED;
+}
+#endif
+
+#ifdef CONFIG_BT_HCIBCM4325
+int bcm4325_sleep(int bSleep)
+{
+//     printk("*************bt enter sleep***************\n");
+    if (bSleep)
+    gpio_set_value(BT_GPIO_WAKE_UP, GPIO_LOW);   //low represent bt device may enter sleep  
+    else
+    gpio_set_value(BT_GPIO_WAKE_UP, GPIO_HIGH);  //high represent bt device must be awake 
+
+       //printk("sleep=%d\n",bSleep);
+}
+#endif
+  
+static int bcm4329_set_block(void *data, bool blocked)
+{
+       DBG("%s---blocked :%d\n", __FUNCTION__, blocked);
+
+        IOMUX_BT_GPIO_POWER;
+
+       if (false == blocked) { 
+                       
+                       gpio_set_value(BT_GPIO_WAKE_UP, GPIO_HIGH); 
+                gpio_set_value(BT_GPIO_RESET, GPIO_LOW);
+                mdelay(200);
+               gpio_set_value(BT_GPIO_RESET, GPIO_HIGH);  /* bt reset deactive*/
+               mdelay(200);
+               //gpio_set_value(BT_GPIO_WAKE_UP, GPIO_HIGH);
+#if BT_WAKE_HOST_SUPPORT     
+            btWakeupHostLock();
+#endif         
+               pr_info("bt turn on power\n");
+       }
+       else {
+#if BT_WAKE_HOST_SUPPORT     
+            btWakeupHostUnlock();
+#endif
+               gpio_set_value(BT_GPIO_WAKE_UP, GPIO_LOW); 
+       pr_info("bt shut off power\n");
+               gpio_set_value(BT_GPIO_RESET, GPIO_LOW);  /* bt reset active*/
+               mdelay(20);
+       }
+
+       return 0;
+}
+
+
+static const struct rfkill_ops bcm4329_rfk_ops = {
+       .set_block = bcm4329_set_block,
+};
+
+static int __devinit bcm4329_rfkill_probe(struct platform_device *pdev)
+{
+       int rc = 0;
+       bool default_state = true;
+       
+       DBG("Enter::%s,line=%d\n",__FUNCTION__,__LINE__);
+       
+       /* default to bluetooth off */
+       bcm4329_set_block(NULL, default_state); /* blocked -> bt off */
+        
+       gBtCtrl.bt_rfk = rfkill_alloc(bt_name, 
+                NULL, 
+                RFKILL_TYPE_BLUETOOTH, 
+                &bcm4329_rfk_ops, 
+                NULL);
+
+       if (!gBtCtrl.bt_rfk)
+       {
+               printk("fail to rfkill_allocate************\n");
+               return -ENOMEM;
+       }
+       
+       rfkill_set_states(gBtCtrl.bt_rfk, default_state, false);
+
+       rc = rfkill_register(gBtCtrl.bt_rfk);
+       if (rc)
+       {
+               printk("failed to rfkill_register,rc=0x%x\n",rc);
+               rfkill_destroy(gBtCtrl.bt_rfk);
+       }
+       
+       gpio_request(BT_GPIO_POWER, NULL);
+       gpio_request(BT_GPIO_RESET, NULL);
+       gpio_request(BT_GPIO_WAKE_UP, NULL);
+
+#if BT_WAKE_HOST_SUPPORT
+    init_timer(&(gBtCtrl.tl));
+    gBtCtrl.tl.expires = jiffies + BT_WAKE_LOCK_TIMEOUT*HZ;        
+    gBtCtrl.tl.function = timer_hostSleep;        
+    add_timer(&(gBtCtrl.tl));
+    gBtCtrl.b_HostWake = false;
+    
+       wake_lock_init(&(gBtCtrl.bt_wakelock), WAKE_LOCK_SUSPEND, "bt_wake");
+       
+       rc = gpio_request(BT_GPIO_WAKE_UP_HOST, "bt_wake");
+       if (rc) {
+               printk("%s:failed to request RAHO_BT_WAKE_UP_HOST\n",__FUNCTION__);
+       }
+       
+       IOMUX_BT_GPIO_WAKE_UP_HOST();
+       gpio_pull_updown(BT_GPIO_WAKE_UP_HOST,GPIOPullUp);
+       rc = request_irq(gpio_to_irq(BT_GPIO_WAKE_UP_HOST),bcm4329_wake_host_irq,IRQF_TRIGGER_FALLING,NULL,NULL);
+       if(rc)
+       {
+               printk("%s:failed to request RAHO_BT_WAKE_UP_HOST irq\n",__FUNCTION__);
+               gpio_free(BT_GPIO_WAKE_UP_HOST);
+       }
+       enable_irq_wake(gpio_to_irq(BT_GPIO_WAKE_UP_HOST)); // so RAHO_BT_WAKE_UP_HOST can wake up system
+
+       printk(KERN_INFO "bcm4329 module has been initialized,rc=0x%x\n",rc);
+ #endif
+       //bcm4329_set_block(NULL, false);
+       return rc;
+
+       
+}
+
+
+static int __devexit bcm4329_rfkill_remove(struct platform_device *pdev)
+{
+       if (gBtCtrl.bt_rfk)
+               rfkill_unregister(gBtCtrl.bt_rfk);
+       gBtCtrl.bt_rfk = NULL;
+#if BT_WAKE_HOST_SUPPORT       
+    del_timer(&(gBtCtrl.tl));//ɾµô¶¨Ê±Æ÷
+    btWakeupHostUnlock();
+    wake_lock_destroy(&(gBtCtrl.bt_wakelock));
+#endif    
+       platform_set_drvdata(pdev, NULL);
+
+       DBG("Enter::%s,line=%d\n",__FUNCTION__,__LINE__);
+       return 0;
+}
+
+static struct platform_driver bcm4329_rfkill_driver = {
+       .probe = bcm4329_rfkill_probe,
+       .remove = __devexit_p(bcm4329_rfkill_remove),
+       .driver = {
+               .name = "rk29sdk_rfkill", 
+               .owner = THIS_MODULE,
+       },      
+#if BT_WAKE_HOST_SUPPORT
+    .suspend = bcm4329_rfkill_suspend,
+    .resume = bcm4329_rfkill_resume,
+#endif
+};
+
+/*
+ * Module initialization
+ */
+static int __init bcm4329_mod_init(void)
+{
+       int ret;
+       DBG("Enter::%s,line=%d\n",__FUNCTION__,__LINE__);
+       ret = platform_driver_register(&bcm4329_rfkill_driver);
+       printk("ret=0x%x\n", ret);
+       return ret;
+}
+
+static void __exit bcm4329_mod_exit(void)
+{
+       platform_driver_unregister(&bcm4329_rfkill_driver);
+}
+
+module_init(bcm4329_mod_init);
+module_exit(bcm4329_mod_exit);
+MODULE_DESCRIPTION("bcm4329 Bluetooth driver");
+MODULE_AUTHOR("roger_chen cz@rock-chips.com");
+MODULE_LICENSE("GPL");
+

diff --git a/arch/arm/mach-rk29/board-rk29-z5.c b/arch/arm/mach-rk29/board-rk29-z5.c
new file mode 100644 (file)
index 0000000..db543b8
--- /dev/null
+++ b/arch/arm/mach-rk29/board-rk29-z5.c
@@ -0,0 +1,3723 @@
+/* arch/arm/mach-rk29/board-rk29-phonesdk.c
+ *
+ * Copyright (C) 2010 ROCKCHIP, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/spi/spi.h>
+#include <linux/mmc/host.h>
+#include <linux/android_pmem.h>
+#include <linux/usb/android_composite.h>
+#include <linux/mpu.h>
+#include <linux/mpu3050.h>
+
+#include <mach/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+#include <asm/hardware/gic.h>
+
+#include <mach/iomux.h>
+#include <mach/gpio.h>
+#include <mach/irqs.h>
+#include <mach/rk29_iomap.h>
+#include <mach/board.h>
+#include <mach/rk29_nand.h>
+#include <mach/rk29_camera.h>                          /* ddl@rock-chips.com : camera support */
+#include <media/soc_camera.h>                               /* ddl@rock-chips.com : camera support */
+#include <mach/vpu_mem.h>
+#include <mach/sram.h>
+#include <mach/ddr.h>
+#include <mach/cpufreq.h>
+
+#include <linux/regulator/rk29-pwm-regulator.h>
+#include <linux/regulator/machine.h>
+#include <linux/mfd/wm831x/pdata.h>
+#include <linux/mfd/wm831x/core.h>
+#include <linux/mfd/wm831x/gpio.h>
+#include <linux/mfd/wm8994/pdata.h>
+#include <linux/mfd/wm8994/registers.h>
+
+#include <linux/mtd/nand.h>
+#include <linux/mtd/partitions.h>
+#include <linux/i2c-gpio.h>
+
+#include "devices.h"
+
+#if defined(CONFIG_MTK23D)
+#include <linux/mtk23d.h>
+#endif
+
+#include "../../../drivers/staging/android/timed_gpio.h"
+#include "../../../drivers/headset_observe/rk_headset.h"
+/*set touchscreen different type header*/
+#if defined(CONFIG_TOUCHSCREEN_XPT2046_NORMAL_SPI)
+#include "../../../drivers/input/touchscreen/xpt2046_ts.h"
+#elif defined(CONFIG_TOUCHSCREEN_XPT2046_TSLIB_SPI)
+#include "../../../drivers/input/touchscreen/xpt2046_tslib_ts.h"
+#elif defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)
+#include "../../../drivers/input/touchscreen/xpt2046_cbn_ts.h"
+#endif
+
+#include "../../../drivers/misc/gps/rk29_gps.h"
+#ifdef CONFIG_VIDEO_RK29
+/*---------------- Camera Sensor Macro Define Begin  ------------------------*/
+/*---------------- Camera Sensor Configuration Macro Begin ------------------------*/
+#define CONFIG_SENSOR_0 RK29_CAM_SENSOR_OV5640                      /* back camera sensor */
+#define CONFIG_SENSOR_IIC_ADDR_0           0x78
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_0    1
+#define CONFIG_SENSOR_ORIENTATION_0       0
+#define CONFIG_SENSOR_POWER_PIN_0         RK29_PIN5_PA0
+#define CONFIG_SENSOR_RESET_PIN_0         INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_0       RK29_PIN6_PB7
+#define CONFIG_SENSOR_FALSH_PIN_0         RK29_PIN6_PB5
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_0 RK29_CAM_POWERACTIVE_H
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_0 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_0 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_0 RK29_CAM_FLASHACTIVE_H
+
+#define CONFIG_SENSOR_1 RK29_CAM_SENSOR_OV7690                      /* front camera sensor */
+#define CONFIG_SENSOR_IIC_ADDR_1           0x42
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_1    1
+#define CONFIG_SENSOR_ORIENTATION_1       0
+#define CONFIG_SENSOR_POWER_PIN_1         RK29_PIN5_PA0
+#define CONFIG_SENSOR_RESET_PIN_1         INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_1       RK29_PIN6_PB6
+#define CONFIG_SENSOR_FALSH_PIN_1         INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_1 RK29_CAM_POWERACTIVE_H
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_1 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_1 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_1 RK29_CAM_FLASHACTIVE_L
+#endif  //#ifdef CONFIG_VIDEO_RK29
+/*---------------- Camera Sensor Configuration Macro End------------------------*/
+#include "../../../drivers/media/video/rk29_camera.c"
+/*---------------- Camera Sensor Macro Define End  ------------------------*/
+
+
+/* Set memory size of pmem */
+#ifdef CONFIG_RK29_MEM_SIZE_M
+#define SDRAM_SIZE          (CONFIG_RK29_MEM_SIZE_M * SZ_1M)
+#else
+#define SDRAM_SIZE          SZ_512M
+#endif
+#define PMEM_GPU_SIZE       SZ_16M
+#define PMEM_UI_SIZE        SZ_32M /* 1280x800: 64M 1024x768: 48M ... */
+#define PMEM_VPU_SIZE       SZ_64M
+#define PMEM_CAM_SIZE       PMEM_CAM_NECESSARY
+#ifdef CONFIG_VIDEO_RK29_WORK_IPP
+#define MEM_CAMIPP_SIZE     PMEM_CAMIPP_NECESSARY
+#else
+#define MEM_CAMIPP_SIZE     0
+#endif
+#define MEM_FB_SIZE         (3*SZ_2M)
+#ifdef CONFIG_FB_WORK_IPP
+#define MEM_FBIPP_SIZE      SZ_2M//SZ_8M   //1920 x 1080 x 2 x 2  //RGB565 = x2;RGB888 = x4
+#else
+#define MEM_FBIPP_SIZE      0
+#endif
+#if SDRAM_SIZE > SZ_512M
+#define PMEM_GPU_BASE       (RK29_SDRAM_PHYS + SZ_512M - PMEM_GPU_SIZE)
+#else
+#define PMEM_GPU_BASE       (RK29_SDRAM_PHYS + SDRAM_SIZE - PMEM_GPU_SIZE)
+#endif
+#define PMEM_UI_BASE        (PMEM_GPU_BASE - PMEM_UI_SIZE)
+#define PMEM_VPU_BASE       (PMEM_UI_BASE - PMEM_VPU_SIZE)
+#define PMEM_CAM_BASE       (PMEM_VPU_BASE - PMEM_CAM_SIZE)
+#define MEM_CAMIPP_BASE     (PMEM_CAM_BASE - MEM_CAMIPP_SIZE)
+#define MEM_FB_BASE         (MEM_CAMIPP_BASE - MEM_FB_SIZE)
+#define MEM_FBIPP_BASE      (MEM_FB_BASE - MEM_FBIPP_SIZE)
+#define LINUX_SIZE          (MEM_FBIPP_BASE - RK29_SDRAM_PHYS)
+
+#define PREALLOC_WLAN_SEC_NUM           4
+#define PREALLOC_WLAN_BUF_NUM           160
+#define PREALLOC_WLAN_SECTION_HEADER    24
+
+#define WLAN_SECTION_SIZE_0     (PREALLOC_WLAN_BUF_NUM * 128)
+#define WLAN_SECTION_SIZE_1     (PREALLOC_WLAN_BUF_NUM * 128)
+#define WLAN_SECTION_SIZE_2     (PREALLOC_WLAN_BUF_NUM * 512)
+#define WLAN_SECTION_SIZE_3     (PREALLOC_WLAN_BUF_NUM * 1024)
+
+#define WLAN_SKB_BUF_NUM        16
+#define UNLOCK_SECURITY_KEY     ~(0x1<<5)
+#define LOCK_SECURITY_KEY       0x00
+
+static struct sk_buff *wlan_static_skb[WLAN_SKB_BUF_NUM];
+
+struct wifi_mem_prealloc {
+        void *mem_ptr;
+        unsigned long size;
+};
+
+extern struct sys_timer rk29_timer;
+
+static int rk29_nand_io_init(void)
+{
+    return 0;
+}
+
+struct rk29_nand_platform_data rk29_nand_data = {
+    .width      = 1,     /* data bus width in bytes */
+    .hw_ecc     = 1,     /* hw ecc 0: soft ecc */
+    .num_flash    = 1,
+    .io_init   = rk29_nand_io_init,
+};
+
+#ifdef CONFIG_FB_RK29
+/*****************************************************************************************
+ * lcd  devices
+ * author: zyw@rock-chips.com
+ *****************************************************************************************/
+//#ifdef  CONFIG_LCD_TD043MGEA1
+#define LCD_RXD_PIN          RK29_PIN4_PC3
+#define LCD_TXD_PIN          RK29_PIN4_PC7
+#define LCD_CLK_PIN          RK29_PIN4_PC6
+#define LCD_CS_PIN           RK29_PIN4_PC2
+/*****************************************************************************************
+* frame buffer  devices
+* author: zyw@rock-chips.com
+*****************************************************************************************/
+#define FB_ID                       0
+#define FB_DISPLAY_ON_PIN           INVALID_GPIO//RK29_PIN6_PD0
+#define FB_LCD_STANDBY_PIN          INVALID_GPIO//RK29_PIN6_PD1
+#define FB_LCD_CABC_EN_PIN          INVALID_GPIO//RK29_PIN6_PD2
+#define FB_MCU_FMK_PIN              INVALID_GPIO
+
+#define FB_DISPLAY_ON_VALUE         GPIO_HIGH
+#define FB_LCD_STANDBY_VALUE        GPIO_HIGH
+
+//#endif
+static int rk29_lcd_io_init(void)
+{
+       int ret = 0;
+
+       ret = gpio_request(LCD_TXD_PIN, NULL);
+       ret = gpio_request(LCD_CLK_PIN, NULL);
+       ret = gpio_request(LCD_CS_PIN, NULL);
+       ret = gpio_request(RK29_PIN6_PC6, NULL);
+
+       ret = gpio_request(RK29_PIN4_PC1, NULL);//RS
+       gpio_direction_output(RK29_PIN4_PC1, 0);
+       gpio_set_value(RK29_PIN4_PC1, GPIO_HIGH);       
+               
+       rk29_mux_api_set(GPIO4C7_RMIIRXD0_MIIRXD0_NAME,GPIO4H_GPIO4C7);
+       rk29_mux_api_set(GPIO4C6_RMIIRXD1_MIIRXD1_NAME,GPIO4H_GPIO4C6);
+       rk29_mux_api_set(GPIO4C2_RMIITXD1_MIITXD1_NAME,GPIO4H_GPIO4C2);
+       rk29_mux_api_set(GPIO4C1_RMIITXEN_MIITXEN_NAME,GPIO4H_GPIO4C1);
+       
+    return ret;
+}
+
+static int rk29_lcd_io_deinit(void)
+{
+       int ret = 0;
+       gpio_free(LCD_CS_PIN);
+       gpio_free(LCD_CLK_PIN);
+       gpio_free(LCD_TXD_PIN);
+       gpio_free(RK29_PIN6_PC6);
+       gpio_free(RK29_PIN4_PC1);
+       rk29_mux_api_set(GPIO4C7_RMIIRXD0_MIIRXD0_NAME,GPIO4H_RMII_RXD0);
+       rk29_mux_api_set(GPIO4C6_RMIIRXD1_MIIRXD1_NAME,GPIO4H_RMII_RXD1);
+       rk29_mux_api_set(GPIO4C2_RMIITXD1_MIITXD1_NAME,GPIO4H_RMII_TXD1);
+       return ret;
+}
+
+static struct rk29lcd_info rk29_lcd_info = {
+    .txd_pin  = LCD_TXD_PIN,
+    .clk_pin = LCD_CLK_PIN,
+    .cs_pin = LCD_CS_PIN,
+    .io_init   = rk29_lcd_io_init,
+    .io_deinit = rk29_lcd_io_deinit,
+};
+
+int rk29_fb_io_enable(void)
+{
+    if(FB_DISPLAY_ON_PIN != INVALID_GPIO)
+    {
+        gpio_direction_output(FB_DISPLAY_ON_PIN, 0);
+        gpio_set_value(FB_DISPLAY_ON_PIN, FB_DISPLAY_ON_VALUE);              
+    }
+    if(FB_LCD_STANDBY_PIN != INVALID_GPIO)
+    {
+        gpio_direction_output(FB_LCD_STANDBY_PIN, 0);
+        gpio_set_value(FB_LCD_STANDBY_PIN, FB_LCD_STANDBY_VALUE);             
+    }
+    return 0;
+}
+
+int rk29_fb_io_disable(void)
+{
+    if(FB_DISPLAY_ON_PIN != INVALID_GPIO)
+    {
+        gpio_direction_output(FB_DISPLAY_ON_PIN, 0);
+        gpio_set_value(FB_DISPLAY_ON_PIN, !FB_DISPLAY_ON_VALUE);              
+    }
+    if(FB_LCD_STANDBY_PIN != INVALID_GPIO)
+    {
+        gpio_direction_output(FB_LCD_STANDBY_PIN, 0);
+        gpio_set_value(FB_LCD_STANDBY_PIN, !FB_LCD_STANDBY_VALUE);             
+    }
+    return 0;
+}
+
+static int rk29_fb_io_init(struct rk29_fb_setting_info *fb_setting)
+{
+    int ret = 0;
+    if(fb_setting->mcu_fmk_en && (FB_MCU_FMK_PIN != INVALID_GPIO))
+    {
+        ret = gpio_request(FB_MCU_FMK_PIN, NULL);
+        if(ret != 0)
+        {
+            gpio_free(FB_MCU_FMK_PIN);
+            printk(">>>>>> FB_MCU_FMK_PIN gpio_request err \n ");
+        }
+        gpio_direction_input(FB_MCU_FMK_PIN);
+    }
+    if(fb_setting->disp_on_en && (FB_DISPLAY_ON_PIN != INVALID_GPIO))
+    {
+        ret = gpio_request(FB_DISPLAY_ON_PIN, NULL);
+        if(ret != 0)
+        {
+            gpio_free(FB_DISPLAY_ON_PIN);
+            printk(">>>>>> FB_DISPLAY_ON_PIN gpio_request err \n ");
+        }
+    }
+
+    if(fb_setting->disp_on_en && (FB_LCD_STANDBY_PIN != INVALID_GPIO))
+    {
+        ret = gpio_request(FB_LCD_STANDBY_PIN, NULL);
+        if(ret != 0)
+        {
+            gpio_free(FB_LCD_STANDBY_PIN);
+            printk(">>>>>> FB_LCD_STANDBY_PIN gpio_request err \n ");
+        }
+    }
+
+    if(FB_LCD_CABC_EN_PIN != INVALID_GPIO)
+    {
+        ret = gpio_request(FB_LCD_CABC_EN_PIN, NULL);
+        if(ret != 0)
+        {
+            gpio_free(FB_LCD_CABC_EN_PIN);
+            printk(">>>>>> FB_LCD_CABC_EN_PIN gpio_request err \n ");
+        }
+        gpio_direction_output(FB_LCD_CABC_EN_PIN, 0);
+        gpio_set_value(FB_LCD_CABC_EN_PIN, GPIO_LOW);
+    }
+    rk29_fb_io_enable();   //enable it
+
+    return ret;
+}
+
+static struct rk29fb_info rk29_fb_info = {
+    .fb_id   = FB_ID,
+    .mcu_fmk_pin = FB_MCU_FMK_PIN,
+    .lcd_info = &rk29_lcd_info,
+    .io_init   = rk29_fb_io_init,
+    .io_enable = rk29_fb_io_enable,
+    .io_disable = rk29_fb_io_disable,
+};
+
+/* rk29 fb resource */
+static struct resource rk29_fb_resource[] = {
+       [0] = {
+        .name  = "lcdc reg",
+               .start = RK29_LCDC_PHYS,
+               .end   = RK29_LCDC_PHYS + RK29_LCDC_SIZE - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       [1] = {
+           .name  = "lcdc irq",
+               .start = IRQ_LCDC,
+               .end   = IRQ_LCDC,
+               .flags = IORESOURCE_IRQ,
+       },
+       [2] = {
+           .name   = "win1 buf",
+        .start  = MEM_FB_BASE,
+        .end    = MEM_FB_BASE + MEM_FB_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+    },
+    #ifdef CONFIG_FB_WORK_IPP
+    [3] = {
+           .name   = "win1 ipp buf",
+        .start  = MEM_FBIPP_BASE,
+        .end    = MEM_FBIPP_BASE + MEM_FBIPP_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+    },
+    #endif
+};
+
+/*platform_device*/
+struct platform_device rk29_device_fb = {
+       .name             = "rk29-fb",
+       .id               = 4,
+       .num_resources    = ARRAY_SIZE(rk29_fb_resource),
+       .resource         = rk29_fb_resource,
+       .dev            = {
+               .platform_data  = &rk29_fb_info,
+       }
+};
+
+struct platform_device rk29_device_dma_cpy = {
+       .name             = "dma_memcpy",
+       .id               = 4,
+
+};
+
+#endif
+
+static struct android_pmem_platform_data android_pmem_pdata = {
+       .name           = "pmem",
+       .start          = PMEM_UI_BASE,
+       .size           = PMEM_UI_SIZE,
+       .no_allocator   = 1,
+       .cached         = 1,
+};
+
+static struct platform_device android_pmem_device = {
+       .name           = "android_pmem",
+       .id             = 0,
+       .dev            = {
+               .platform_data = &android_pmem_pdata,
+       },
+};
+
+
+
+static struct vpu_mem_platform_data vpu_mem_pdata = {
+       .name           = "vpu_mem",
+       .start          = PMEM_VPU_BASE,
+       .size           = PMEM_VPU_SIZE,
+       .cached         = 1,
+};
+
+static struct platform_device rk29_vpu_mem_device = {
+       .name           = "vpu_mem",
+       .id                 = 2,
+       .dev            = {
+       .platform_data = &vpu_mem_pdata,
+       },
+};
+
+static struct platform_device rk29_v4l2_output_devce = {
+       .name           = "rk29_vout",
+};
+
+/*HANNSTAR_P1003 touch*/
+#if defined (CONFIG_HANNSTAR_P1003)
+#define TOUCH_RESET_PIN RK29_PIN6_PC3
+#define TOUCH_INT_PIN   RK29_PIN4_PD5
+
+int p1003_init_platform_hw(void)
+{
+    if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+      gpio_free(TOUCH_RESET_PIN);
+      printk("p1003_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+
+    if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+      gpio_free(TOUCH_INT_PIN);
+      printk("p1003_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+    gpio_pull_updown(TOUCH_INT_PIN, 1);
+    gpio_direction_output(TOUCH_RESET_PIN, 0);
+    msleep(500);
+    gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+    msleep(500);
+    gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+
+    return 0;
+}
+
+
+struct p1003_platform_data p1003_info = {
+  .model= 1003,
+  .init_platform_hw= p1003_init_platform_hw,
+
+};
+#endif
+
+#if defined (CONFIG_TOUCHSCREEN_GT801_IIC)
+#include "../../../drivers/input/touchscreen/gt801_ts.h"
+
+#define TOUCH_RESET_PIN  RK29_PIN6_PC3
+#define TOUCH_INT_PIN    RK29_PIN4_PD5
+
+int gt801_init_platform_hw(void)
+{
+    if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+      gpio_free(TOUCH_RESET_PIN);
+      printk("gt801_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+
+    if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+      gpio_free(TOUCH_INT_PIN);
+      printk("gt801_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+    gpio_pull_updown(TOUCH_INT_PIN, 1);
+    gpio_direction_output(TOUCH_RESET_PIN, 0);
+    msleep(500);
+    gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+    msleep(500);
+    gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+       mdelay(100);
+
+    return 0;
+}
+
+
+static struct gt801_platform_data gt801_info = {
+  .model= 801,
+  .gpio_reset = TOUCH_RESET_PIN,
+  .init_platform_hw = gt801_init_platform_hw,
+};
+#endif
+
+#if defined(CONFIG_TOUCHSCREEN_GT801_Z5)
+#include "../../../drivers/input/touchscreen/gt801_z5_ts.h"
+#define TOUCH_RESET_PIN  RK29_PIN6_PC3
+#define TOUCH_INT_PIN   RK29_PIN4_PD5
+
+int gt801_init_platform_hw(void)
+{
+       if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+         gpio_free(TOUCH_RESET_PIN);
+         printk("gt801_init_platform_hw gpio_request error\n");
+         return -EIO;
+       }
+
+       if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+         gpio_free(TOUCH_INT_PIN);
+         printk("gt801_init_platform_hw gpio_request error\n");
+         return -EIO;
+       }
+       gpio_pull_updown(TOUCH_INT_PIN, 1);
+       gpio_direction_output(TOUCH_RESET_PIN, 0);
+       msleep(500);
+       gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+       msleep(500);
+       gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+       mdelay(100);
+       return 0;
+}
+
+
+static struct gt801_platform_data gt801_info = {
+  .model= 801,
+  .gpio_reset = TOUCH_RESET_PIN,
+  .init_platform_hw= gt801_init_platform_hw,
+};
+#endif 
+
+#if defined(CONFIG_TOUCHSCREEN_GT818_IIC)
+#include "../../../drivers/input/touchscreen/gt818_ts.h"
+#define GT818_GPIO_INT      RK29_PIN4_PD5
+#define GT818_GPIO_RESET    RK29_PIN6_PC3
+static struct gt818_platform_data gt818_info = {
+       .model                  = 818,
+       .swap_xy                = 0,
+       .x_min                  = 0,
+       .x_max                  = 480,
+       .y_min                  = 0,
+       .y_max                  = 800,
+       .gpio_reset     = GT818_GPIO_RESET,
+       .gpio_reset_active_low = 0,
+       .gpio_pendown           = GT818_GPIO_INT,
+    .pendown_iomux_name = GPIO4D5_CPUTRACECTL_NAME,
+    .resetpin_iomux_name = NULL,
+    .pendown_iomux_mode = GPIO4H_GPIO4D5,
+    .resetpin_iomux_mode = 0,
+};
+#endif
+
+#if defined(CONFIG_TOUCHSCREEN_FT5X0X_Z5) || defined (CONFIG_TOUCHSCREEN_FT5306)
+
+#define TOUCH_RESET_PIN RK29_PIN6_PC3
+#define TOUCH_INT_PIN   RK29_PIN4_PD5
+int ft5406_init_platform_hw(void)
+{
+    if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+      gpio_free(TOUCH_RESET_PIN);
+      printk("ft5406_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+
+    if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+      gpio_free(TOUCH_INT_PIN);
+      printk("ift5406_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+       gpio_pull_updown(TOUCH_INT_PIN, 0);
+       gpio_direction_output(TOUCH_RESET_PIN, GPIO_HIGH); 
+       msleep(5);
+       gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+       mdelay(5);
+       gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+    return 0;
+}
+
+void ft5406_exit_platform_hw(void)
+{
+       printk("ft5406_exit_platform_hw\n");
+       gpio_free(TOUCH_RESET_PIN);
+       gpio_free(TOUCH_INT_PIN);
+}
+
+int ft5406_platform_sleep(void)
+{
+       //printk("ft5406_platform_sleep\n");
+       gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+       return 0;
+}
+
+int ft5406_platform_wakeup(void)
+{
+       //printk("ft5406_platform_wakeup\n");
+       gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+       return 0;
+}
+
+struct ft5406_platform_data ft5406_info = {
+
+  .init_platform_hw= ft5406_init_platform_hw,
+  .exit_platform_hw= ft5406_exit_platform_hw,
+  .platform_sleep  = ft5406_platform_sleep,
+  .platform_wakeup = ft5406_platform_wakeup,
+};
+
+#endif
+
+#if defined(CONFIG_TOUCHSCREEN_ILI2102_IIC) 
+#include "../../../drivers/input/touchscreen/ili2102_ts.h"
+#define GT801_GPIO_INT      RK29_PIN4_PD5
+#define GT801_GPIO_RESET    RK29_PIN6_PC3
+static struct ili2102_platform_data ili2102_info = {
+       .model                  = 2102,
+       .swap_xy                = 0,
+       .x_min                  = 0,
+       .x_max                  = 481,
+       .y_min                  = 0,
+       .y_max                  = 801,
+       .gpio_reset     = GT801_GPIO_RESET,
+       .gpio_reset_active_low = 1,
+       .gpio_pendown           = GT801_GPIO_INT,
+    .pendown_iomux_name = GPIO4D5_CPUTRACECTL_NAME,
+    .resetpin_iomux_name = NULL,
+    .pendown_iomux_mode = GPIO4H_GPIO4D5,
+    .resetpin_iomux_mode = 0,
+};
+#endif
+
+/* EETI_EGALAX touch I2C */
+#if defined (CONFIG_EETI_EGALAX)
+#define TOUCH_RESET_PIN RK29_PIN6_PC3
+#define TOUCH_INT_PIN   RK29_PIN4_PD5
+
+static int EETI_EGALAX_init_platform_hw(void)
+{
+    if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
+      gpio_free(TOUCH_RESET_PIN);
+      printk("p1003_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+
+    if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
+      gpio_free(TOUCH_INT_PIN);
+      printk("p1003_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+    gpio_pull_updown(TOUCH_INT_PIN, 1);
+    gpio_direction_output(TOUCH_RESET_PIN, 0);
+    msleep(500);
+    gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+    msleep(500);
+    gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+
+    return 0;
+}
+
+
+static struct eeti_egalax_platform_data eeti_egalax_info = {
+  .model= 1003,
+  .init_platform_hw= EETI_EGALAX_init_platform_hw,
+
+};
+#endif
+
+/*MMA8452 gsensor*/
+#if defined (CONFIG_GS_MMA8452)
+#define MMA8452_INT_PIN   RK29_PIN6_PC4
+
+static int mma8452_init_platform_hw(void)
+{
+
+    if(gpio_request(MMA8452_INT_PIN,NULL) != 0){
+      gpio_free(MMA8452_INT_PIN);
+      printk("mma8452_init_platform_hw gpio_request error\n");
+      return -EIO;
+    }
+    gpio_pull_updown(MMA8452_INT_PIN, 1);
+    return 0;
+}
+
+
+static struct mma8452_platform_data mma8452_info = {
+  .model= 8452,
+  .swap_xy = 0,
+  .init_platform_hw= mma8452_init_platform_hw,
+
+};
+#endif
+
+#if defined (CONFIG_MPU_SENSORS_MPU3050)
+/*mpu3050*/
+static struct mpu3050_platform_data mpu3050_data = {
+               .int_config = 0x10,
+               //.orientation = { 1, 0, 0,0, -1, 0,0, 0, 1 },
+               .orientation = { 0, -1, 0,-1, 0, 0,0, 0, -1 },
+               //.orientation = { -1, 0, 0,0, -1, 0,0, 0, -1 },
+               //.orientation = { 0, 1, 0, -1, 0, 0, 0, 0, 1 },
+               //.orientation = { 1, 0, 0,0, 1, 0, 0, 0, 1 },
+               .level_shifter = 0,
+#if defined (CONFIG_MPU_SENSORS_KXTF9)
+               .accel = {
+#ifdef CONFIG_MPU_SENSORS_MPU3050_MODULE
+                               .get_slave_descr = NULL ,
+#else
+                               .get_slave_descr = get_accel_slave_descr ,                      
+#endif
+                               .adapt_num = 0, // The i2c bus to which the mpu device is
+                               // connected
+                               //.irq = RK29_PIN6_PC4,
+                               .bus = EXT_SLAVE_BUS_SECONDARY,  //The secondary I2C of MPU
+                               .address = 0x0f,
+                               //.orientation = { 1, 0, 0,0, 1, 0,0, 0, 1 },
+                               //.orientation = { 0, -1, 0,-1, 0, 0,0, 0, -1 },
+                               //.orientation = { 0, 1, 0,1, 0, 0,0, 0, -1 },
+                               //.orientation = { 0, 1 ,0, -1 ,0, 0, 0, 0, 1 },
+                               .orientation = {1, 0, 0, 0, 1, 0, 0, 0, 1},
+               },
+#endif
+
+#if defined (CONFIG_MPU_SENSORS_MMA845X)
+               .accel = {
+#ifdef CONFIG_MPU_SENSORS_MPU3050_MODULE
+                               .get_slave_descr = NULL ,
+#else
+                               .get_slave_descr = get_accel_slave_descr ,                      
+#endif
+                               .adapt_num = 0, // The i2c bus to which the mpu device is
+                               // connected
+                               //.irq = RK29_PIN6_PC4,
+                               .bus = EXT_SLAVE_BUS_SECONDARY,  //The secondary I2C of MPU
+                               .address = 0x1c,
+                               //.orientation = { 1, 0, 0,0, 1, 0,0, 0, 1 },
+                               //.orientation = { 0, -1, 0,-1, 0, 0,0, 0, -1 },
+                               .orientation = { 0, 1, 0,1, 0, 0,0, 0, -1 },
+                               //.orientation = { 0, 1 ,0, -1 ,0, 0, 0, 0, 1 },
+               },
+#endif
+
+#if defined (CONFIG_MPU_SENSORS_AK8975)
+               .compass = {
+#ifdef CONFIG_MPU_SENSORS_MPU3050_MODULE
+                               .get_slave_descr = NULL,/*ak5883_get_slave_descr,*/
+#else
+                               .get_slave_descr = get_compass_slave_descr,
+#endif                                         
+                               .adapt_num = 0, // The i2c bus to which the compass device is. 
+                               // It can be difference with mpu
+                               // connected
+                               //.irq = RK29_PIN6_PC5,
+                               .bus = EXT_SLAVE_BUS_PRIMARY,
+                               .address = 0x0d,
+                               //.orientation = { -1, 0, 0,0, -1, 0,0, 0, 1 },
+                               //.orientation = { 0, -1, 0,-1, 0, 0,0, 0, -1 },  
+                               //.orientation = { 0, 1, 0,1, 0, 0,0, 0, -1 },   
+                               //.orientation = { 0, -1, 0, 1, 0, 0, 0, 0, 1 },
+                               //.orientation = {0, 1, 0, -1, 0, 0, 0, 0, 1},
+                               .orientation = { 1, 0 ,0, 0 ,-1, 0, 0, 0, -1 },
+               },
+};
+#endif
+#endif
+
+#if defined(CONFIG_GPIO_WM831X)
+struct rk29_gpio_expander_info  wm831x_gpio_settinginfo[] = {
+       {
+               .gpio_num               =WM831X_P01,// tp3
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+        
+        {
+               .gpio_num               =WM831X_P02,//tp4
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+        {
+               .gpio_num               =WM831X_P03,//tp2
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+        {
+               .gpio_num               =WM831X_P04,//tp1
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+        {
+               .gpio_num               =WM831X_P05,//tp1
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+        {
+               .gpio_num               =WM831X_P06,//tp1
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+        {
+               .gpio_num               =WM831X_P07,//tp1
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+        {
+               .gpio_num               =WM831X_P08,//tp1
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+        {
+               .gpio_num               =WM831X_P09,//tp1
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+        {
+               .gpio_num               =WM831X_P10,//tp1
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+        {
+               .gpio_num               =WM831X_P11,//tp1
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },     
+        {
+               .gpio_num               =WM831X_P12,
+               .pin_type           = GPIO_OUT,
+               .pin_value                      =GPIO_HIGH,
+        },
+};
+
+#endif
+
+
+
+#if defined(CONFIG_MFD_WM831X)
+static struct wm831x *gWm831x;
+int wm831x_pre_init(struct wm831x *parm)
+{
+       int ret;
+       printk("%s\n", __FUNCTION__);
+       gWm831x = parm;
+       //ILIM = 900ma
+       ret = wm831x_reg_read(parm, WM831X_POWER_STATE) & 0xffff;
+       wm831x_reg_write(parm, WM831X_POWER_STATE, (ret&0xfff8) | 0x04);        
+       
+       //BATT_FET_ENA = 1
+    wm831x_reg_write(parm,WM831X_SECURITY_KEY,0x9716); // unlock security key
+    wm831x_set_bits(parm, WM831X_RESET_CONTROL,0x1000,0x1000);
+    ret = wm831x_reg_read(parm, WM831X_RESET_CONTROL) & 0xffff&UNLOCK_SECURITY_KEY;// enternal reset active in sleep
+    printk("%s:WM831X_RESET_CONTROL=0x%x\n",__FUNCTION__,ret);
+    wm831x_reg_write(parm, WM831X_RESET_CONTROL, ret);
+        
+        
+    wm831x_reg_write(parm,WM831X_SECURITY_KEY,LOCK_SECURITY_KEY); // lock security key 
+       
+       
+#if 0
+       wm831x_set_bits(parm, WM831X_LDO_ENABLE, (1 << 3), 0);
+       wm831x_set_bits(parm, WM831X_LDO_ENABLE, (1 << 7), 0);
+       printk("%s:disable ldo4 and ldo8 because they are enabled in uboot\n",__FUNCTION__);
+#endif 
+       return 0;
+}
+int wm831x_post_init(struct wm831x *parm)
+{
+       struct regulator *dcdc;
+       struct regulator *ldo;
+       
+
+       dcdc = regulator_get(NULL, "dcdc3");            // 1th IO
+       regulator_set_voltage(dcdc,3000000,3000000);
+       regulator_set_suspend_voltage(dcdc, 2800000);
+       regulator_enable(dcdc);                 
+       printk("%s set dcdc3=%dmV end\n", __FUNCTION__, regulator_get_voltage(dcdc));
+       regulator_put(dcdc);
+       udelay(100);
+       
+       ldo = regulator_get(NULL, "ldo10");     // 1th modem IO
+       regulator_set_voltage(ldo,3000000,3000000);
+       regulator_set_suspend_voltage(ldo,3000000);
+       regulator_enable(ldo);                  
+       printk("%s set ldo10=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+       regulator_put(ldo);
+       udelay(100);
+       
+       dcdc = regulator_get(NULL, "dcdc2");    // 2th CORE
+       regulator_set_voltage(dcdc,1300000,1300000);
+       regulator_set_suspend_voltage(dcdc,1000000);
+       regulator_enable(dcdc);                         
+       printk("%s set dcdc2=%dmV end\n", __FUNCTION__, regulator_get_voltage(dcdc));
+       regulator_put(dcdc);
+       udelay(100);
+       
+       dcdc = regulator_get(NULL, "dcdc1");    // 3th ddr
+       regulator_set_voltage(dcdc,1800000,1800000);
+       regulator_set_suspend_voltage(dcdc,1800000);
+       regulator_enable(dcdc);
+       printk("%s set dcdc1=%dmV end\n", __FUNCTION__, regulator_get_voltage(dcdc));   
+       regulator_put(dcdc);
+       udelay(100);
+       
+       ldo = regulator_get(NULL, "ldo1");              // 3th nand
+       regulator_set_voltage(ldo,1800000,1800000);
+       regulator_set_suspend_voltage(ldo,1800000);
+       regulator_enable(ldo);                  
+       printk("%s set ldo1=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));             
+       regulator_put(ldo);
+       udelay(100);
+       
+       ldo = regulator_get(NULL, "ldo4");              // 4th usb
+       regulator_set_voltage(ldo,2500000,2500000);
+       regulator_set_suspend_voltage(ldo,0000000);
+       regulator_enable(ldo);  
+       printk("%s set ldo4=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+       regulator_put(ldo);
+       udelay(100);
+       
+       ldo = regulator_get(NULL, "ldo7");              // 5th usb
+       regulator_set_voltage(ldo,3300000,3300000);
+       regulator_set_suspend_voltage(ldo,3300000);
+       regulator_enable(ldo);                  
+       printk("%s set ldo7=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+       regulator_put(ldo);
+       udelay(100);
+       
+       dcdc = regulator_get(NULL, "dcdc4");    // backlight
+       regulator_set_voltage(dcdc,20000000,16000000);
+       regulator_set_suspend_voltage(dcdc, 16000000);
+       regulator_enable(dcdc); 
+       printk("%s set dcdc4=%dmV end\n", __FUNCTION__, regulator_get_voltage(dcdc));
+       regulator_put(dcdc);
+       udelay(100);
+#if 1
+       
+       ldo = regulator_get(NULL, "ldo2");              //lcd
+       regulator_set_voltage(ldo,3000000,3000000);
+       regulator_set_suspend_voltage(ldo,3000000);
+       regulator_enable(ldo);                  
+       printk("%s set ldo2=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+       regulator_put(ldo);
+
+
+       ldo = regulator_get(NULL, "ldo5");              //tf
+       regulator_set_voltage(ldo,3000000,3000000);
+       regulator_set_suspend_voltage(ldo,3000000);
+       regulator_enable(ldo);                  
+       printk("%s set ldo5=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+       regulator_put(ldo);
+
+       ldo = regulator_get(NULL, "ldo6");              //camera
+       regulator_set_voltage(ldo,2800000,2800000);
+       regulator_set_suspend_voltage(ldo,2800000);
+       regulator_enable(ldo);                  
+       printk("%s set ldo6=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+       regulator_put(ldo);
+
+
+
+#if 1
+#if 0
+       ldo = regulator_get(NULL, "ldo3");              //sram
+       regulator_set_voltage(ldo,1800000,1800000);
+       regulator_set_suspend_voltage(ldo,1800000);
+       regulator_enable(ldo);                  
+       printk("%s set ldo3=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+       regulator_put(ldo);     
+#endif
+
+       ldo = regulator_get(NULL, "ldo8");              //cmmb
+       regulator_set_voltage(ldo,1200000,1200000);
+       regulator_set_suspend_voltage(ldo,1200000);
+       regulator_enable(ldo);                  
+       printk("%s set ldo8=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+       regulator_put(ldo);
+
+       ldo = regulator_get(NULL, "ldo9");              //cmmb
+       regulator_set_voltage(ldo,3000000,3000000);
+       regulator_set_suspend_voltage(ldo,3000000);
+       regulator_enable(ldo);                  
+       printk("%s set ldo9=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+       regulator_put(ldo);
+#endif
+
+#endif
+       
+       ldo = regulator_get(NULL, "ldo11");
+       //regulator_enable(ldo);                        
+       printk("%s set ldo11=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));    
+       regulator_put(ldo);     
+       
+               
+       return 0;
+}
+
+extern void wm831x_enter_sleep(void);
+extern void wm831x_exit_sleep(void);
+
+void pmu_wm831x_set_suspend_voltage(void)
+{
+
+}
+EXPORT_SYMBOL_GPL(pmu_wm831x_set_suspend_voltage);
+
+void pmu_wm831x_set_resume_voltage(void)
+{
+
+}
+EXPORT_SYMBOL_GPL(pmu_wm831x_set_resume_voltage);
+
+int wm831x_last_deinit(struct wm831x *parm)
+{
+       struct regulator* ldo;
+
+       printk("%s\n", __FUNCTION__);
+
+       ldo = regulator_get(NULL, "ldo1");
+       regulator_disable(ldo);                 
+       regulator_put(ldo);
+       
+       ldo = regulator_get(NULL, "ldo2");
+       regulator_disable(ldo);                 
+       regulator_put(ldo);
+       
+       ldo = regulator_get(NULL, "ldo3");
+       regulator_disable(ldo);                 
+       regulator_put(ldo);
+       
+       ldo = regulator_get(NULL, "ldo4");
+       //regulator_disable(ldo);       
+       regulator_put(ldo);
+
+       ldo = regulator_get(NULL, "ldo5");
+       regulator_disable(ldo);                 
+       regulator_put(ldo);
+
+       ldo = regulator_get(NULL, "ldo6");
+       regulator_disable(ldo);                 
+       regulator_put(ldo);
+
+       ldo = regulator_get(NULL, "ldo7");
+       regulator_disable(ldo);                 
+       regulator_put(ldo);
+
+       ldo = regulator_get(NULL, "ldo8");
+       //regulator_disable(ldo);                       
+       regulator_put(ldo);
+
+       ldo = regulator_get(NULL, "ldo9");
+       regulator_disable(ldo);                 
+       regulator_put(ldo);
+
+       ldo = regulator_get(NULL, "ldo10");
+       regulator_disable(ldo);                                         
+       regulator_put(ldo);
+
+       return 0;
+}
+
+struct wm831x_backlight_pdata wm831x_backlight_platdata = {
+       .isink = 1,     /** ISINK to use, 1 or 2 */
+       .max_uA = 19484,    /** Maximum current to allow */
+};
+
+struct wm831x_backup_pdata wm831x_backup_platdata = {
+       .charger_enable = 1,
+       .no_constant_voltage = 0,  /** Disable constant voltage charging */
+       .vlim = 3100,   /** Voltage limit in milivolts */
+       .ilim = 300,   /** Current limit in microamps */
+};
+
+struct wm831x_battery_pdata wm831x_battery_platdata = {
+       .enable = 1,         /** Enable charging */
+       .fast_enable = 1,    /** Enable fast charging */
+       .off_mask = 1,       /** Mask OFF while charging */
+       .trickle_ilim = 200,   /** Trickle charge current limit, in mA */
+       .vsel = 4200,           /** Target voltage, in mV */
+       .eoc_iterm = 50,      /** End of trickle charge current, in mA */
+       .fast_ilim = 600,      /** Fast charge current limit, in mA */
+       .timeout = 480,        /** Charge cycle timeout, in minutes */
+       .syslo = 3300,    /* syslo threshold, in mV*/
+       .sysok = 3500,    /* sysko threshold, in mV*/
+};
+
+struct wm831x_status_pdata wm831x_status_platdata[WM831X_MAX_STATUS] = {
+       {
+       .default_src = WM831X_STATUS_OTP,
+       .name = "wm831x_status0",
+       .default_trigger = "wm831x_otp",
+       },
+       {
+       .default_src = WM831X_STATUS_POWER,
+       .name = "wm831x_status1",
+       .default_trigger = "wm831x_power",
+       },      
+};
+
+
+static struct regulator_consumer_supply dcdc1_consumers[] = {
+       {
+               .supply = "dcdc1",
+       }
+};
+static struct regulator_consumer_supply dcdc2_consumers[] = {
+       {
+               .supply = "dcdc2",
+       },
+       {
+               .supply = "vcore",
+       }
+};
+static struct regulator_consumer_supply dcdc3_consumers[] = {
+       {
+               .supply = "dcdc3",
+       }
+};
+static struct regulator_consumer_supply dcdc4_consumers[] = {
+       {
+               .supply = "dcdc4",
+       }
+};
+static struct regulator_consumer_supply epe1_consumers[] = {
+       {
+               .supply = "epe1",
+       }
+};
+static struct regulator_consumer_supply epe2_consumers[] = {
+       {
+               .supply = "epe2",
+       }
+};
+static struct regulator_consumer_supply ldo1_consumers[] = {
+       {
+               .supply = "ldo1",
+       }
+};
+static struct regulator_consumer_supply ldo2_consumers[] = {
+       {
+               .supply = "ldo2",
+       }
+};
+static struct regulator_consumer_supply ldo3_consumers[] = {
+       {
+               .supply = "ldo3",
+       }
+};
+static struct regulator_consumer_supply ldo4_consumers[] = {
+       {
+               .supply = "ldo4",
+       }
+};
+static struct regulator_consumer_supply ldo5_consumers[] = {
+       {
+               .supply = "ldo5",
+       }
+};
+static struct regulator_consumer_supply ldo6_consumers[] = {
+       {
+               .supply = "ldo6",
+       }
+};
+static struct regulator_consumer_supply ldo7_consumers[] = {
+       {
+               .supply = "ldo7",
+       }
+};
+static struct regulator_consumer_supply ldo8_consumers[] = {
+       {
+               .supply = "ldo8",
+       }
+};
+static struct regulator_consumer_supply ldo9_consumers[] = {
+       {
+               .supply = "ldo9",
+       }
+};
+static struct regulator_consumer_supply ldo10_consumers[] = {
+       {
+               .supply = "ldo10",
+       }
+};
+static struct regulator_consumer_supply ldo11_consumers[] = {
+       {
+               .supply = "ldo11",
+       }
+};
+static struct regulator_consumer_supply isink1_consumers[] = {
+       {
+               .supply = "isink1",
+       }
+};
+static struct regulator_consumer_supply isink2_consumers[] = {
+       {
+               .supply = "isink2",
+       }
+};
+
+struct regulator_init_data wm831x_regulator_init_dcdc[WM831X_MAX_DCDC] = {
+       {
+               .constraints = {
+                       .name = "DCDC1",
+                       .min_uV = 600000,
+                       .max_uV = 1800000,//0.6-1.8V
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(dcdc1_consumers),
+               .consumer_supplies = dcdc1_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "DCDC2",
+                       .min_uV = 600000,
+                       .max_uV = 1800000,//0.6-1.8V
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(dcdc2_consumers),
+               .consumer_supplies = dcdc2_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "DCDC3",
+                       .min_uV = 850000,
+                       .max_uV = 3400000,//0.85-3.4V
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(dcdc3_consumers),
+               .consumer_supplies = dcdc3_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "DCDC4",
+                       .min_uV = 00000000,
+                       .max_uV = 30000000,//30V/40mA
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(dcdc4_consumers),
+               .consumer_supplies = dcdc4_consumers,
+       },
+       
+};
+struct regulator_init_data wm831x_regulator_init_epe[WM831X_MAX_EPE] = {
+       {
+               .constraints = {
+                       .name = "EPE1",
+                       .min_uV = 1200000,
+                       .max_uV = 3000000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(epe1_consumers),
+               .consumer_supplies = epe1_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "EPE2",
+                       .min_uV = 1200000,
+                       .max_uV = 3000000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(epe2_consumers),
+               .consumer_supplies = epe2_consumers,
+       },
+};
+
+struct regulator_init_data wm831x_regulator_init_ldo[WM831X_MAX_LDO] = {
+       {
+               .constraints = {
+                       .name = "LDO1",
+                       .min_uV = 900000,
+                       .max_uV = 3300000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo1_consumers),
+               .consumer_supplies = ldo1_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "LDO2",
+                       .min_uV = 900000,
+                       .max_uV = 3300000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),
+               .consumer_supplies = ldo2_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "LDO3",
+                       .min_uV = 900000,
+                       .max_uV = 3300000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo3_consumers),
+               .consumer_supplies = ldo3_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "LDO4",
+                       .min_uV = 900000,
+                       .max_uV = 3300000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo4_consumers),
+               .consumer_supplies = ldo4_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "LDO5",
+                       .min_uV = 900000,
+                       .max_uV = 3300000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo5_consumers),
+               .consumer_supplies = ldo5_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "LDO6",
+                       .min_uV = 900000,
+                       .max_uV = 3300000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo6_consumers),
+               .consumer_supplies = ldo6_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "LDO7",
+                       .min_uV = 1000000,
+                       .max_uV = 3500000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo7_consumers),
+               .consumer_supplies = ldo7_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "LDO8",
+                       .min_uV = 1000000,
+                       .max_uV = 3500000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo8_consumers),
+               .consumer_supplies = ldo8_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "LDO9",
+                       .min_uV = 1000000,
+                       .max_uV = 3500000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo9_consumers),
+               .consumer_supplies = ldo9_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "LDO10",
+                       .min_uV = 1000000,
+                       .max_uV = 3500000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo10_consumers),
+               .consumer_supplies = ldo10_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "LDO11",
+                       .min_uV = 1200000,
+                       .max_uV = 3000000,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(ldo11_consumers),
+               .consumer_supplies = ldo11_consumers,
+       },
+};
+
+struct regulator_init_data wm831x_regulator_init_isink[WM831X_MAX_ISINK] = {
+       {
+               .constraints = {
+                       .name = "ISINK1",
+                       .min_uA = 00000,
+                       .max_uA = 40000,
+                       .always_on = true,
+                       .apply_uV = true,               
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_CURRENT,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(isink1_consumers),
+               .consumer_supplies = isink1_consumers,
+       },
+       {
+               .constraints = {
+                       .name = "ISINK2",
+                       .min_uA = 0000000,
+                       .max_uA = 0000000,
+                       .apply_uV = false,              
+                       .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_CURRENT,           
+               },
+               .num_consumer_supplies = ARRAY_SIZE(isink2_consumers),
+               .consumer_supplies = isink2_consumers,
+       },
+};
+
+static int wm831x_checkrange(int start,int num,int val)
+{   
+       if((val<(start+num))&&(val>=start))
+               return 0;
+       else 
+               return -1;
+}
+
+static int wm831x_init_pin_type(struct wm831x *wm831x)
+{
+#if 1
+       struct wm831x_pdata *pdata = wm831x->dev->platform_data;
+       struct rk29_gpio_expander_info *wm831x_gpio_settinginfo;
+       uint16_t offset = 0;
+       uint16_t wm831x_settingpin_num = 0;
+       uint16_t ret = 0;
+       int i = 0;
+
+       if(wm831x)
+       {
+               wm831x_gpio_settinginfo=pdata->settinginfo;
+               if(wm831x_gpio_settinginfo)
+               {
+                       wm831x_settingpin_num = pdata->settinginfolen;
+                       for(i=0;i<wm831x_settingpin_num;i++)
+                       {
+                               if(!wm831x_checkrange(pdata->gpio_base,pdata->gpio_pin_num,wm831x_gpio_settinginfo[i].gpio_num))
+                               {
+                                       offset = wm831x_gpio_settinginfo[i].gpio_num - pdata->gpio_base;
+
+                                       if(wm831x_gpio_settinginfo[i].pin_type==GPIO_IN)
+                                       {
+                                               wm831x_set_bits(wm831x,(WM831X_GPIO1_CONTROL+offset), WM831X_GPN_DIR_MASK|WM831X_GPN_TRI_MASK, 1<<WM831X_GPN_DIR_SHIFT|1<<WM831X_GPN_TRI_SHIFT);
+                                       }
+                                       else
+                                       {
+                                               wm831x_set_bits(wm831x,(WM831X_GPIO1_CONTROL+offset), WM831X_GPN_DIR_MASK|WM831X_GPN_TRI_MASK, 1<<WM831X_GPN_TRI_SHIFT);
+                                               if(wm831x_gpio_settinginfo[i].pin_value==GPIO_HIGH)
+                                               {
+                                                       wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, (1 << offset),(1 << offset));
+                                               }
+                                               else
+                                               {
+                                                       wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, (1 << offset),(0 << offset));
+                                               }
+                                       }
+                                       
+                               }
+                       }
+               }
+       }
+
+       for(i=0;i<pdata->gpio_pin_num;i++)
+       {
+               wm831x_set_bits(wm831x,(WM831X_GPIO1_CONTROL+i), 
+                       WM831X_GPN_PULL_MASK|WM831X_GPN_POL_MASK|WM831X_GPN_OD_MASK|WM831X_GPN_TRI_MASK, 
+                       1<<WM831X_GPN_POL_SHIFT|1<<WM831X_GPN_TRI_SHIFT);
+               ret =  wm831x_reg_read(wm831x, WM831X_GPIO1_CONTROL+i);
+               printk("Gpio%d Pin Configuration = %x\n",i,ret);
+       }
+#endif
+       return 0;
+}
+
+/*
+ * GPIO Buttons
+ */
+#if defined(CONFIG_KEYBOARD_WM831X_GPIO)
+static struct wm831x_gpio_keys_button wm831x_gpio_buttons[] = {
+{      
+       .code           = KEY_MEDIA,
+       .gpio           = TCA6424_P21,
+       .active_low     = 1,
+       .desc           = "media",
+       .wakeup         = 0,
+       .debounce_interval = 120,
+},
+{
+    .code= KEY_VOLUMEUP,
+               .gpio= WM831X_P05,
+               .active_low= 1,
+               .desc= "volume_up",
+               .wakeup= 0,
+},
+{
+               .code= KEY_CAMERA,
+               .gpio= WM831X_P06,
+               .active_low= 1,
+               .desc= "camera",
+               .wakeup= 0,
+},
+{
+               .code= KEY_VOLUMEDOWN,
+               .gpio= WM831X_P07,
+               .active_low= 1,
+               .desc= "volume_down",
+               .wakeup= 0,
+},
+{
+               .code= KEY_END,
+               .gpio= WM831X_P09,
+               .active_low= 1,
+               .desc= "enter",
+               .wakeup= 0,
+},
+{
+               .code= KEY_MENU,
+               .gpio= WM831X_P10,
+               .active_low= 1,
+               .desc= "menu",
+               .wakeup= 0,
+},
+{
+               .code= KEY_SEND,
+               .gpio= WM831X_P11,
+               .active_low= 1,
+               .desc= "esc",
+               .wakeup= 0,
+},
+{
+               .code= KEY_BACK,
+               .gpio= WM831X_P12,
+               .active_low= 1,
+               .desc= "home",
+               .wakeup= 0,                     
+},
+};
+
+struct wm831x_gpio_keys_pdata wm831x_gpio_keys_platdata = {
+       .buttons        = wm831x_gpio_buttons,
+       .nbuttons       = ARRAY_SIZE(wm831x_gpio_buttons),
+};
+
+#endif
+struct wm831x_pdata wm831x_platdata = {
+       /** Called before subdevices are set up */
+       .pre_init= wm831x_pre_init,
+       /** Called after subdevices are set up */
+       .post_init = wm831x_post_init,
+       /** Called before subdevices are power down */
+       .last_deinit = wm831x_last_deinit,
+       
+#if defined(CONFIG_GPIO_WM831X)
+       .gpio_base=WM831X_GPIO_EXPANDER_BASE,
+       .gpio_pin_num=WM831X_TOTOL_GPIO_NUM,
+       .settinginfo=wm831x_gpio_settinginfo,
+       .settinginfolen=ARRAY_SIZE(wm831x_gpio_settinginfo),
+       .pin_type_init = wm831x_init_pin_type,
+       .irq_base= NR_AIC_IRQS + 7*NUM_GROUP,
+#endif
+
+       .backlight = &wm831x_backlight_platdata,
+
+       .backup = &wm831x_backup_platdata,
+       
+       .battery = &wm831x_battery_platdata,
+       //.wm831x_touch_pdata = NULL,
+       //.watchdog = NULL,
+       
+#if defined(CONFIG_KEYBOARD_WM831X_GPIO)       
+       .gpio_keys = &wm831x_gpio_keys_platdata,
+#endif
+
+       /** LED1 = 0 and so on */
+       .status = {&wm831x_status_platdata[0], &wm831x_status_platdata[1]},
+       
+       /** DCDC1 = 0 and so on */
+       .dcdc = {&wm831x_regulator_init_dcdc[0], &wm831x_regulator_init_dcdc[1], &wm831x_regulator_init_dcdc[2], &wm831x_regulator_init_dcdc[3]},
+
+       /** EPE1 = 0 and so on */
+       .epe = {&wm831x_regulator_init_epe[0], &wm831x_regulator_init_epe[1]},
+
+       /** LDO1 = 0 and so on */
+       .ldo = {&wm831x_regulator_init_ldo[0], &wm831x_regulator_init_ldo[1], &wm831x_regulator_init_ldo[2], &wm831x_regulator_init_ldo[3],
+                       &wm831x_regulator_init_ldo[4], &wm831x_regulator_init_ldo[5], &wm831x_regulator_init_ldo[6], &wm831x_regulator_init_ldo[7],
+                       &wm831x_regulator_init_ldo[8], &wm831x_regulator_init_ldo[9], &wm831x_regulator_init_ldo[10]},
+
+       /** ISINK1 = 0 and so on*/
+       .isink = {&wm831x_regulator_init_isink[0], &wm831x_regulator_init_isink[1]},
+};
+#endif
+
+#if defined(CONFIG_RK29_GPIO_SUSPEND)
+static void gpio_set_request(void)
+{
+       gpio_request(RK29_PIN6_PA0, NULL);
+       gpio_request(RK29_PIN6_PA1, NULL);
+       gpio_request(RK29_PIN6_PA2, NULL);
+       gpio_request(RK29_PIN6_PA3, NULL);
+       gpio_request(RK29_PIN6_PA4, NULL);
+       gpio_request(RK29_PIN6_PA5, NULL);
+       gpio_request(RK29_PIN6_PA6, NULL);
+
+       gpio_request(RK29_PIN2_PA5, NULL);
+       gpio_request(RK29_PIN2_PA4, NULL);
+       gpio_request(RK29_PIN2_PB0, NULL);
+       gpio_request(RK29_PIN2_PB1, NULL);
+       gpio_request(RK29_PIN2_PB2, NULL);
+       gpio_request(RK29_PIN2_PB3, NULL);
+
+       gpio_request(RK29_PIN1_PA4, NULL);
+       gpio_request(RK29_PIN1_PA3, NULL);
+
+       gpio_request(RK29_PIN2_PC7, NULL);
+       gpio_request(RK29_PIN2_PC6, NULL);
+       gpio_request(RK29_PIN2_PC5, NULL);
+       gpio_request(RK29_PIN2_PC4, NULL);
+       gpio_request(RK29_PIN2_PC3, NULL);
+       gpio_request(RK29_PIN2_PC2, NULL);
+       gpio_request(RK29_PIN2_PC1, NULL);
+       gpio_request(RK29_PIN2_PC0, NULL);
+}
+
+static void gpio_set_free(void)
+{
+       gpio_free(RK29_PIN6_PA0);
+       gpio_free(RK29_PIN6_PA1);
+       gpio_free(RK29_PIN6_PA2);
+       gpio_free(RK29_PIN6_PA3);
+       gpio_free(RK29_PIN6_PA4);
+       gpio_free(RK29_PIN6_PA5);
+       gpio_free(RK29_PIN6_PA6);
+
+       gpio_free(RK29_PIN2_PA5);
+       gpio_free(RK29_PIN2_PA4);
+       gpio_free(RK29_PIN2_PB0);
+       gpio_free(RK29_PIN2_PB1);
+       gpio_free(RK29_PIN2_PB2);
+       gpio_free(RK29_PIN2_PB3);
+
+       gpio_free(RK29_PIN1_PA4);
+       gpio_free(RK29_PIN1_PA3);
+
+       gpio_free(RK29_PIN2_PC7);
+       gpio_free(RK29_PIN2_PC6);
+       gpio_free(RK29_PIN2_PC5);
+       gpio_free(RK29_PIN2_PC4);
+       gpio_free(RK29_PIN2_PC3);
+       gpio_free(RK29_PIN2_PC2);
+       gpio_free(RK29_PIN2_PC1);
+       gpio_free(RK29_PIN2_PC0);
+}
+
+static void rk29_keygpio_suspend(void)
+{
+       gpio_pull_updown(RK29_PIN6_PA0, 0);
+       gpio_pull_updown(RK29_PIN6_PA1, 0);
+       gpio_pull_updown(RK29_PIN6_PA2, 0);
+       gpio_pull_updown(RK29_PIN6_PA3, 0);
+       gpio_pull_updown(RK29_PIN6_PA4, 0);
+       gpio_pull_updown(RK29_PIN6_PA5, 0);
+       gpio_pull_updown(RK29_PIN6_PA6, 0);//key pullup/pulldown disable
+
+       gpio_pull_updown(RK29_PIN2_PA4, 0);
+       gpio_pull_updown(RK29_PIN2_PA5, 0);
+       gpio_pull_updown(RK29_PIN2_PB0, 0);
+       gpio_pull_updown(RK29_PIN2_PB1, 0);
+       gpio_pull_updown(RK29_PIN2_PB2, 0);
+       gpio_pull_updown(RK29_PIN2_PB3, 0);
+}
+
+static void rk29_keygpio_resume(void)
+{
+       gpio_pull_updown(RK29_PIN6_PA0, 1);
+       gpio_pull_updown(RK29_PIN6_PA1, 1);
+       gpio_pull_updown(RK29_PIN6_PA2, 1);
+       gpio_pull_updown(RK29_PIN6_PA3, 1);
+       gpio_pull_updown(RK29_PIN6_PA4, 1);
+       gpio_pull_updown(RK29_PIN6_PA5, 1);
+       gpio_pull_updown(RK29_PIN6_PA6, 1);//key pullup/pulldown enable
+
+       gpio_pull_updown(RK29_PIN2_PA4, 1);
+       gpio_pull_updown(RK29_PIN2_PA5, 1);
+       gpio_pull_updown(RK29_PIN2_PB0, 1);
+       gpio_pull_updown(RK29_PIN2_PB1, 1);
+       gpio_pull_updown(RK29_PIN2_PB2, 1);
+       gpio_pull_updown(RK29_PIN2_PB3, 1);
+}
+
+static void spi_gpio_suspend(void)
+{      
+       rk29_mux_api_set(GPIO1A4_EMMCWRITEPRT_SPI0CS1_NAME,GPIO1L_GPIO1A4);  //set iomux is gpio mode
+       rk29_mux_api_set(GPIO1A3_EMMCDETECTN_SPI1CS1_NAME,GPIO1L_GPIO1A3);
+
+       rk29_mux_api_set(GPIO2C7_SPI1RXD_NAME,GPIO2H_GPIO2C7);
+       rk29_mux_api_set(GPIO2C6_SPI1TXD_NAME,GPIO2H_GPIO2C6);
+       //rk29_mux_api_set(GPIO2C5_SPI1CSN0_NAME,GPIO2H_GPIO2C5);
+       rk29_mux_api_set(GPIO2C4_SPI1CLK_NAME,GPIO2H_GPIO2C4);
+       rk29_mux_api_set(GPIO2C3_SPI0RXD_NAME,GPIO2H_GPIO2C3);
+       rk29_mux_api_set(GPIO2C2_SPI0TXD_NAME,GPIO2H_GPIO2C2);
+       rk29_mux_api_set(GPIO2C1_SPI0CSN0_NAME,GPIO2H_GPIO2C1);
+       rk29_mux_api_set(GPIO2C0_SPI0CLK_NAME,GPIO2H_GPIO2C0);
+
+       gpio_direction_input(RK29_PIN1_PA4);             //set gpio is input
+       gpio_direction_input(RK29_PIN1_PA3);
+       gpio_direction_input(RK29_PIN2_PC7);
+       gpio_direction_input(RK29_PIN2_PC6);
+       // gpio_direction_input(RK29_PIN2_PC5);
+       gpio_direction_input(RK29_PIN2_PC4);
+       gpio_direction_input(RK29_PIN2_PC3);
+       gpio_direction_input(RK29_PIN2_PC2);
+       gpio_direction_input(RK29_PIN2_PC1);
+       gpio_direction_input(RK29_PIN2_PC0);
+
+       gpio_pull_updown(RK29_PIN1_PA4, 0);   //set gpio pullup/down disable
+       gpio_pull_updown(RK29_PIN1_PA3, 0);
+
+       gpio_pull_updown(RK29_PIN2_PC7, 0);
+       gpio_pull_updown(RK29_PIN2_PC6, 0);
+       //gpio_pull_updown(RK29_PIN2_PC5, 0);
+       gpio_pull_updown(RK29_PIN2_PC4, 0);
+       gpio_pull_updown(RK29_PIN2_PC3, 0);
+       gpio_pull_updown(RK29_PIN2_PC2, 0);
+       gpio_pull_updown(RK29_PIN2_PC1, 0);
+       gpio_pull_updown(RK29_PIN2_PC0, 0);
+}
+
+static void spi_gpio_resume(void)
+{      
+       gpio_pull_updown(RK29_PIN1_PA4, 1);         //set gpio pullup/down enable
+       gpio_pull_updown(RK29_PIN1_PA3, 1);
+
+       gpio_pull_updown(RK29_PIN2_PC7, 1);
+       gpio_pull_updown(RK29_PIN2_PC6, 1);
+       //gpio_pull_updown(RK29_PIN2_PC5, 1);
+       gpio_pull_updown(RK29_PIN2_PC4, 1);
+       gpio_pull_updown(RK29_PIN2_PC3, 1);
+       gpio_pull_updown(RK29_PIN2_PC2, 1);
+       gpio_pull_updown(RK29_PIN2_PC1, 1);
+       gpio_pull_updown(RK29_PIN2_PC0, 1);
+
+       rk29_mux_api_set(GPIO1A4_EMMCWRITEPRT_SPI0CS1_NAME,GPIO1L_SPI0_CSN1);   //set iomux is spi mode
+       rk29_mux_api_set(GPIO1A3_EMMCDETECTN_SPI1CS1_NAME,GPIO1L_SPI1_CSN1);
+
+       rk29_mux_api_set(GPIO2C7_SPI1RXD_NAME,GPIO2H_SPI1_RXD);
+       rk29_mux_api_set(GPIO2C6_SPI1TXD_NAME,GPIO2H_SPI1_TXD);
+       //rk29_mux_api_set(GPIO2C5_SPI1CSN0_NAME,GPIO2H_SPI1_CSN0);
+       rk29_mux_api_set(GPIO2C4_SPI1CLK_NAME, GPIO2H_SPI1_CLK);
+       rk29_mux_api_set(GPIO2C3_SPI0RXD_NAME,GPIO2H_SPI0_RXD);
+       rk29_mux_api_set(GPIO2C2_SPI0TXD_NAME,GPIO2H_SPI0_TXD);
+       rk29_mux_api_set(GPIO2C1_SPI0CSN0_NAME,GPIO2H_SPI0_CSN0);
+       rk29_mux_api_set(GPIO2C0_SPI0CLK_NAME,GPIO2H_SPI0_CLK);
+}
+
+void rk29_setgpio_suspend_board(void)
+{
+       gpio_set_request();
+       rk29_keygpio_suspend();
+       spi_gpio_suspend();
+       gpio_set_free();
+}
+
+void rk29_setgpio_resume_board(void)
+{
+       gpio_set_request();
+       rk29_keygpio_resume();
+       spi_gpio_resume();
+       gpio_set_free();
+}
+#endif
+
+#if defined(CONFIG_RK29_GPS)
+
+#define        RK29_GPS_POWER_PIN              RK29_PIN6_PB2
+#define        RK29_GPS_RESET_PIN              RK29_PIN6_PA7//RK29_PIN6_PC1  //modif by zwx CONFIG_CSR_GPS_GSD4E
+
+int rk29_gps_power_up(void)
+{      
+       printk("%s \n", __FUNCTION__);  
+
+    gpio_request(RK29_GPS_POWER_PIN, NULL);    
+       gpio_direction_output(RK29_GPS_POWER_PIN, GPIO_HIGH);   
+
+       return 0;
+}
+
+int rk29_gps_power_down(void)
+{      
+       printk("%s \n", __FUNCTION__);  
+
+    gpio_request(RK29_GPS_POWER_PIN, NULL);    
+       gpio_direction_output(RK29_GPS_POWER_PIN, GPIO_LOW);            
+
+       return 0;
+}
+
+int rk29_gps_reset_set(int level)
+{
+       gpio_request(RK29_GPS_RESET_PIN, NULL);
+       if (level)
+               gpio_direction_output(RK29_GPS_RESET_PIN, GPIO_HIGH);
+       else
+               gpio_direction_output(RK29_GPS_RESET_PIN, GPIO_LOW);
+       return 0;
+}
+#ifdef CONFIG_CSR_GPS_GSD4E  
+struct gps_rfkill_platform_data gps_rfkill_data=
+{
+       .nshutdown_gpio=RK29_PIN6_PB2,
+       .reset_gpio=RK29_PIN6_PA7,
+};
+static struct platform_device rk_csrgps_device={
+
+       .name = "csr-gps",
+       .id = -1,
+       .dev            = {
+               .platform_data  = &gps_rfkill_data,
+       },
+};
+#else
+struct rk29_gps_data rk29_gps_info = { 
+       .power_up = rk29_gps_power_up,  
+       .power_down = rk29_gps_power_down,      
+       .reset = rk29_gps_reset_set,
+       .uart_id = 3,
+};
+
+struct platform_device rk29_device_gps = {
+       .name = "rk29_gps",
+       .id = -1,               
+       .dev            = {
+       .platform_data = &rk29_gps_info,        
+               }           
+       };
+#endif
+#endif
+
+/*****************************************************************************************
+ * wm8994  codec
+ * author: qjb@rock-chips.com
+ *****************************************************************************************/
+#if defined (CONFIG_SND_SOC_WM8994)
+struct wm8994_pdata wm8994_platdata = {        
+       .BB_input_diff = 0,
+       .BB_class = NO_PCM_BB,
+       
+       .no_earpiece = 0,
+       .sp_hp_same_channel = 0,
+
+       .PA_control_pin = 0,    
+       .Power_EN_Pin = RK29_PIN5_PA1,
+       
+       .speaker_incall_vol = 0,
+       .speaker_incall_mic_vol = -9,
+       .speaker_normal_vol = 6,
+       .earpiece_incall_vol = 0,
+       .headset_incall_vol = 6,
+       .headset_incall_mic_vol = -6,
+       .headset_normal_vol = -6,
+       .BT_incall_vol = 0,
+       .BT_incall_mic_vol = 0,
+       .recorder_vol = 30,
+               
+};
+#endif
+
+#ifdef CONFIG_RK_HEADSET_DET
+#define HEADSET_GPIO RK29_PIN4_PD2
+struct rk_headset_pdata rk_headset_info = {
+       .Headset_gpio           = RK29_PIN4_PD2,
+       .headset_in_type= HEADSET_IN_HIGH,
+       .Hook_gpio = RK29_PIN4_PD1,//Detection Headset--Must be set
+       .hook_key_code = KEY_MEDIA,
+};
+
+struct platform_device rk_device_headset = {
+               .name   = "rk_headsetdet",
+               .id     = 0,
+               .dev    = {
+                   .platform_data = &rk_headset_info,
+               }
+};
+#endif
+
+#if defined(CONFIG_GS_L3G4200D)
+
+#include <linux/l3g4200d.h>
+#define L3G4200D_INT_PIN  RK29_PIN5_PA3
+
+static int l3g4200d_init_platform_hw(void)
+{
+       if (gpio_request(L3G4200D_INT_PIN, NULL) != 0) {
+               gpio_free(L3G4200D_INT_PIN);
+               printk("%s: request l3g4200d int pin error\n", __func__);
+               return -EIO;
+       }
+       gpio_pull_updown(L3G4200D_INT_PIN, 1);
+       return 0;
+}
+
+static struct l3g4200d_platform_data l3g4200d_info = {
+       .fs_range = 1,
+       
+       .axis_map_x = 0,
+       .axis_map_y = 1,
+       .axis_map_z = 2,
+
+       .negate_x = 1,
+       .negate_y = 1,
+       .negate_z = 0,
+
+       .init = l3g4200d_init_platform_hw,
+};
+
+#endif
+
+/*****************************************************************************************
+ * i2c devices
+ * author: kfx@rock-chips.com
+*****************************************************************************************/
+static int rk29_i2c0_io_init(void)
+{
+#ifdef CONFIG_RK29_I2C0_CONTROLLER
+       rk29_mux_api_set(GPIO2B7_I2C0SCL_NAME, GPIO2L_I2C0_SCL);
+       rk29_mux_api_set(GPIO2B6_I2C0SDA_NAME, GPIO2L_I2C0_SDA);
+#else
+       rk29_mux_api_set(GPIO2B7_I2C0SCL_NAME, GPIO2L_GPIO2B7);
+       rk29_mux_api_set(GPIO2B6_I2C0SDA_NAME, GPIO2L_GPIO2B6);
+#endif
+       return 0;
+}
+
+static int rk29_i2c1_io_init(void)
+{
+#ifdef CONFIG_RK29_I2C1_CONTROLLER
+       rk29_mux_api_set(GPIO1A7_I2C1SCL_NAME, GPIO1L_I2C1_SCL);
+       rk29_mux_api_set(GPIO1A6_I2C1SDA_NAME, GPIO1L_I2C1_SDA);
+#else
+       rk29_mux_api_set(GPIO1A7_I2C1SCL_NAME, GPIO1L_GPIO1A7);
+       rk29_mux_api_set(GPIO1A6_I2C1SDA_NAME, GPIO1L_GPIO1A6);
+#endif
+       return 0;
+}
+static int rk29_i2c2_io_init(void)
+{
+#ifdef CONFIG_RK29_I2C2_CONTROLLER
+       rk29_mux_api_set(GPIO5D4_I2C2SCL_NAME, GPIO5H_I2C2_SCL);
+       rk29_mux_api_set(GPIO5D3_I2C2SDA_NAME, GPIO5H_I2C2_SDA);
+#else
+       rk29_mux_api_set(GPIO5D4_I2C2SCL_NAME, GPIO5H_GPIO5D4);
+       rk29_mux_api_set(GPIO5D3_I2C2SDA_NAME, GPIO5H_GPIO5D3);
+#endif
+       return 0;
+}
+
+static int rk29_i2c3_io_init(void)
+{
+#ifdef CONFIG_RK29_I2C3_CONTROLLER
+       rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_I2C3_SCL);
+       rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_I2C3_SDA);
+#else
+       rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_GPIO2B5);
+       rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_GPIO2B4);
+#endif
+       return 0;
+}
+#ifdef CONFIG_RK29_I2C0_CONTROLLER
+struct rk29_i2c_platform_data default_i2c0_data = {
+       .bus_num    = 0,
+       .flags      = 0,
+       .slave_addr = 0xff,
+       .scl_rate  = 400*1000,
+       .mode           = I2C_MODE_IRQ,
+       .io_init = rk29_i2c0_io_init,
+};
+#else
+struct i2c_gpio_platform_data default_i2c0_data = {
+       .sda_pin = RK29_PIN2_PB6,
+       .scl_pin = RK29_PIN2_PB7,
+       .udelay = 5, // clk = 500/udelay = 100Khz
+       .timeout = 100,//msecs_to_jiffies(200),
+       .bus_num    = 0,
+       .io_init = rk29_i2c0_io_init,
+};
+#endif
+#ifdef CONFIG_RK29_I2C1_CONTROLLER
+struct rk29_i2c_platform_data default_i2c1_data = {
+       .bus_num    = 1,
+       .flags      = 0,
+       .slave_addr = 0xff,
+       .scl_rate  = 400*1000,
+       .mode           = I2C_MODE_IRQ,
+       .io_init = rk29_i2c1_io_init,
+};
+#else
+struct i2c_gpio_platform_data default_i2c1_data = {
+       .sda_pin = RK29_PIN1_PA6,
+       .scl_pin = RK29_PIN1_PA7,
+       .udelay = 5, // clk = 500/udelay = 100Khz
+       .timeout = 100,//msecs_to_jiffies(200),
+       .bus_num    = 1,
+       .io_init = rk29_i2c1_io_init,
+};
+#endif
+#ifdef CONFIG_RK29_I2C2_CONTROLLER
+struct rk29_i2c_platform_data default_i2c2_data = {
+       .bus_num    = 2,
+       .flags      = 0,
+       .slave_addr = 0xff,
+       .scl_rate  = 400*1000,
+       .mode           = I2C_MODE_IRQ,
+       .io_init = rk29_i2c2_io_init,
+};
+#else
+struct i2c_gpio_platform_data default_i2c2_data = {
+       .sda_pin = RK29_PIN5_PD3,
+       .scl_pin = RK29_PIN5_PD4,
+       .udelay = 5, // clk = 500/udelay = 100Khz
+       .timeout = 100,//msecs_to_jiffies(200),
+       .bus_num    = 2,
+       .io_init = rk29_i2c2_io_init,
+};
+#endif
+#ifdef CONFIG_RK29_I2C3_CONTROLLER
+struct rk29_i2c_platform_data default_i2c3_data = {
+       .bus_num    = 3,
+       .flags      = 0,
+       .slave_addr = 0xff,
+       .scl_rate  = 400*1000,
+       .mode           = I2C_MODE_IRQ,
+       .io_init = rk29_i2c3_io_init,
+};
+#else
+struct i2c_gpio_platform_data default_i2c3_data = {
+       .sda_pin = RK29_PIN5_PB5,
+       .scl_pin = RK29_PIN5_PB4,
+       .udelay = 5, // clk = 500/udelay = 100Khz
+       .timeout = 100,//msecs_to_jiffies(200),
+       .bus_num    = 3,
+       .io_init = rk29_i2c3_io_init,
+};
+#endif
+#ifdef CONFIG_I2C0_RK29
+static struct i2c_board_info __initdata board_i2c0_devices[] = {
+#if defined (CONFIG_RK1000_CONTROL)
+       {
+               .type                   = "rk1000_control",
+               .addr           = 0x40,
+               .flags                  = 0,
+       },
+#endif
+#if defined (CONFIG_SND_SOC_RK1000)
+       {
+               .type                   = "rk1000_i2c_codec",
+               .addr           = 0x60,
+               .flags                  = 0,
+       },
+#endif
+#if defined (CONFIG_SND_SOC_WM8900)
+       {
+               .type                   = "wm8900",
+               .addr           = 0x1A,
+               .flags                  = 0,
+       },
+#endif
+#if defined (CONFIG_SND_SOC_WM8994)
+       {
+               .type                   = "wm8994",
+               .addr           = 0x1a,
+               .flags                  = 0,
+//     #if defined(CONFIG_MFD_WM8994)  
+               .platform_data  = &wm8994_platdata,     
+//     #endif  
+       },
+#endif
+#if defined (CONFIG_BATTERY_STC3100)
+       {
+               .type                   = "stc3100",
+               .addr           = 0x70,
+               .flags                  = 0,
+       },
+#endif
+#if defined (CONFIG_BATTERY_BQ27510)
+       {
+               .type                   = "bq27510",
+               .addr           = 0x55,
+               .flags                  = 0,
+       },
+#endif
+#if defined (CONFIG_RTC_HYM8563)
+       {
+               .type                   = "rtc_hym8563",
+               .addr           = 0x51,
+               .flags                  = 0,
+               .irq            = RK29_PIN0_PA1,
+       },
+#endif
+#if defined (CONFIG_GS_MMA8452)
+    {
+      .type           = "gs_mma8452",
+      .addr           = 0x1c,
+      .flags          = 0,
+      .irq            = MMA8452_INT_PIN,
+      .platform_data  = &mma8452_info,
+    },
+#endif
+#if defined (CONFIG_COMPASS_AK8973)
+       {
+               .type                   = "ak8973",
+               .addr           = 0x1d,
+               .flags                  = 0,
+               .irq                    = RK29_PIN6_PC5,
+       },
+#endif
+#if defined (CONFIG_COMPASS_AK8975)
+       {
+               .type                   = "ak8975",
+               .addr           = 0x0d,
+               .flags                  = 0,
+               .irq                    = RK29_PIN6_PC5,
+       },
+#endif
+#if defined (CONFIG_INPUT_LPSENSOR_ISL29028)
+       {
+               .type           = "isl29028",
+               .addr           = 0x44,
+               .flags          = 0,
+               .irq            = RK29_PIN4_PD3,
+       },
+#endif
+#if defined (CONFIG_INPUT_LPSENSOR_APDS9900)
+       {
+               .type                   = "apds9900",
+               .addr                   = 0x39,
+               .flags                  = 0,
+               .irq                    = RK29_PIN4_PD3,
+       },
+#endif
+#if defined (CONFIG_ANX7150)
+    {
+               .type           = "anx7150",
+        .addr           = 0x39,             //0x39, 0x3d
+        .flags          = 0,
+        .irq            = RK29_PIN2_PA3,
+    },
+#endif
+#if defined (CONFIG_GS_L3G4200D)
+       {
+               .type           = "gs_l3g4200d",
+               .addr           = 0x69,
+               .flags          = 0,
+               .irq            = L3G4200D_INT_PIN,
+               .platform_data  = &l3g4200d_info,
+       },
+#endif
+#if defined (CONFIG_MPU_SENSORS_MPU3050) 
+       {
+               .type                   = "mpu3050",
+               .addr                   = 0x68,
+               .flags                  = 0,
+               .irq                    = RK29_PIN4_PC4,
+               .platform_data  = &mpu3050_data,
+       },
+#endif
+};
+#endif
+
+#ifdef CONFIG_I2C1_RK29
+static struct i2c_board_info __initdata board_i2c1_devices[] = {
+#if defined (CONFIG_RK1000_CONTROL1)
+       {
+               .type                   = "rk1000_control",
+               .addr                   = 0x40,
+               .flags                  = 0,
+       },
+#endif
+
+};
+#endif
+
+#ifdef CONFIG_I2C2_RK29
+static struct i2c_board_info __initdata board_i2c2_devices[] = {
+#if defined (CONFIG_TOUCHSCREEN_GT801_IIC) || defined (CONFIG_TOUCHSCREEN_GT801_Z5)
+{
+       .type           = "gt801_ts",
+       .addr           = 0x55,
+       .flags          = 0,
+       .irq            = RK29_PIN4_PD5,
+       .platform_data = &gt801_info,
+},     
+#endif
+#if defined (CONFIG_TOUCHSCREEN_GT818_IIC)
+{
+       .type           = "gt818_ts",
+       .addr           = 0x5d,
+       .flags          = 0,
+       .irq            = RK29_PIN4_PD5,
+       .platform_data = &gt818_info,
+},
+#endif
+
+#if defined(CONFIG_TOUCHSCREEN_FT5X0X_Z5) || defined (CONFIG_TOUCHSCREEN_FT5306)
+{
+       .type           = "ft5x0x_ts",
+       .addr           =0x38 ,
+       .flags          = 0,
+       .irq            = RK29_PIN4_PD5,
+       .platform_data = &ft5406_info,
+},
+#endif
+
+#if defined (CONFIG_TOUCHSCREEN_ILI2102_IIC)
+{
+       .type           = "ili2102_ts",
+       .addr           = 0x41,
+       .flags          = I2C_M_NEED_DELAY,
+       .udelay      = 600,
+       .irq            = RK29_PIN4_PD5,
+       .platform_data = &ili2102_info,
+},     
+#endif
+
+#if defined (CONFIG_MFD_WM831X_I2C)
+{
+       .type           = "wm8310",
+       .addr           = 0x34,
+       .flags          = 0,
+       .irq            = RK29_PIN4_PD0,
+       .platform_data = &wm831x_platdata,
+},     
+#endif
+#if defined (CONFIG_HANNSTAR_P1003)
+    {
+      .type           = "p1003_touch",
+      .addr           = 0x04,
+      .flags          = 0,
+      .irq            = RK29_PIN0_PA2,
+      .platform_data  = &p1003_info,
+    },
+#endif
+#if defined (CONFIG_EETI_EGALAX)
+    {
+      .type           = "egalax_i2c",
+      .addr           = 0x04,
+      .flags          = 0,
+      .irq            = RK29_PIN4_PD5,
+      .platform_data  = &eeti_egalax_info,
+    },
+#endif
+};
+#endif
+
+#ifdef CONFIG_I2C3_RK29
+static struct i2c_board_info __initdata board_i2c3_devices[] = {
+};
+#endif
+
+/*****************************************************************************************
+ * camera  devices
+ * author: ddl@rock-chips.com
+ *****************************************************************************************/
+#ifdef CONFIG_VIDEO_RK29
+#define CONFIG_SENSOR_POWER_IOCTL_USR      0
+#define CONFIG_SENSOR_RESET_IOCTL_USR      0
+#define CONFIG_SENSOR_POWERDOWN_IOCTL_USR      0
+#define CONFIG_SENSOR_FLASH_IOCTL_USR      0
+
+#if CONFIG_SENSOR_POWER_IOCTL_USR
+static int sensor_power_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+    #error "CONFIG_SENSOR_POWER_IOCTL_USR is 1, sensor_power_usr_cb function must be writed!!";
+}
+#endif
+
+#if CONFIG_SENSOR_RESET_IOCTL_USR
+static int sensor_reset_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+    #error "CONFIG_SENSOR_RESET_IOCTL_USR is 1, sensor_reset_usr_cb function must be writed!!";
+}
+#endif
+
+#if CONFIG_SENSOR_POWERDOWN_IOCTL_USR
+static int sensor_powerdown_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+    #error "CONFIG_SENSOR_POWERDOWN_IOCTL_USR is 1, sensor_powerdown_usr_cb function must be writed!!";
+}
+#endif
+
+#if CONFIG_SENSOR_FLASH_IOCTL_USR
+static int sensor_flash_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+    #error "CONFIG_SENSOR_FLASH_IOCTL_USR is 1, sensor_flash_usr_cb function must be writed!!";
+}
+#endif
+
+static struct rk29camera_platform_ioctl_cb  sensor_ioctl_cb = {
+    #if CONFIG_SENSOR_POWER_IOCTL_USR
+    .sensor_power_cb = sensor_power_usr_cb,
+    #else
+    .sensor_power_cb = NULL,
+    #endif
+
+    #if CONFIG_SENSOR_RESET_IOCTL_USR
+    .sensor_reset_cb = sensor_reset_usr_cb,
+    #else
+    .sensor_reset_cb = NULL,
+    #endif
+
+    #if CONFIG_SENSOR_POWERDOWN_IOCTL_USR
+    .sensor_powerdown_cb = sensor_powerdown_usr_cb,
+    #else
+    .sensor_powerdown_cb = NULL,
+    #endif
+
+    #if CONFIG_SENSOR_FLASH_IOCTL_USR
+    .sensor_flash_cb = sensor_flash_usr_cb,
+    #else
+    .sensor_flash_cb = NULL,
+    #endif
+};
+#include "../../../drivers/media/video/rk29_camera.c"
+#endif
+
+/*****************************************************************************************
+ * backlight  devices
+ * author: nzy@rock-chips.com
+ *****************************************************************************************/
+#ifdef CONFIG_BACKLIGHT_RK29_BL
+ /*
+ GPIO1B5_PWM0_NAME,       GPIO1L_PWM0
+ GPIO5D2_PWM1_UART1SIRIN_NAME,  GPIO5H_PWM1
+ GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME,   GPIO2L_PWM2
+ GPIO1A5_EMMCPWREN_PWM3_NAME,     GPIO1L_PWM3
+ */
+
+#define PWM_ID            0
+#define PWM_MUX_NAME      GPIO1B5_PWM0_NAME
+#define PWM_MUX_MODE      GPIO1L_PWM0
+#define PWM_MUX_MODE_GPIO GPIO1L_GPIO1B5
+#define PWM_EFFECT_VALUE  1
+
+//#define LCD_DISP_ON_PIN
+
+#ifdef  LCD_DISP_ON_PIN
+#define BL_EN_MUX_NAME    GPIOF34_UART3_SEL_NAME
+#define BL_EN_MUX_MODE    IOMUXB_GPIO1_B34
+
+#define BL_EN_PIN         GPIO0L_GPIO0A5
+#define BL_EN_VALUE       GPIO_HIGH
+#endif
+static int rk29_backlight_io_init(void)
+{
+    int ret = 0;
+
+    rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE);
+       #ifdef  LCD_DISP_ON_PIN
+    rk29_mux_api_set(BL_EN_MUX_NAME, BL_EN_MUX_MODE);
+
+    ret = gpio_request(BL_EN_PIN, NULL);
+    if(ret != 0)
+    {
+        gpio_free(BL_EN_PIN);
+    }
+
+    gpio_direction_output(BL_EN_PIN, 0);
+    gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
+       #endif
+    return ret;
+}
+
+static int rk29_backlight_io_deinit(void)
+{
+    int ret = 0;
+    #ifdef  LCD_DISP_ON_PIN
+    gpio_free(BL_EN_PIN);
+    #endif
+    rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO);
+    return ret;
+}
+struct rk29_bl_info rk29_bl_info = {
+    .pwm_id   = PWM_ID,
+    .bl_ref   = PWM_EFFECT_VALUE,
+    .io_init   = rk29_backlight_io_init,
+    .io_deinit = rk29_backlight_io_deinit,
+};
+#endif
+/*****************************************************************************************
+* pwm voltage regulator devices
+******************************************************************************************/
+#if defined (CONFIG_RK29_PWM_REGULATOR)
+
+#define REGULATOR_PWM_ID                                       2
+#define REGULATOR_PWM_MUX_NAME                 GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME
+#define REGULATOR_PWM_MUX_MODE                                         GPIO2L_PWM2
+#define REGULATOR_PWM_MUX_MODE_GPIO                            GPIO2L_GPIO2A3
+#define REGULATOR_PWM_GPIO                             RK29_PIN2_PA3
+
+static struct regulator_consumer_supply pwm_consumers[] = {
+       {
+               .supply = "vcore",
+       }
+};
+
+static struct regulator_init_data rk29_pwm_regulator_data = {
+       .constraints = {
+               .name = "PWM2",
+               .min_uV =  950000,
+               .max_uV = 1400000,
+               .apply_uV = 1,
+               .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+       },
+       .num_consumer_supplies = ARRAY_SIZE(pwm_consumers),
+       .consumer_supplies = pwm_consumers,
+};
+
+static struct pwm_platform_data rk29_regulator_pwm_platform_data = {
+       .pwm_id = REGULATOR_PWM_ID,
+       .pwm_gpio = REGULATOR_PWM_GPIO,
+       //.pwm_iomux_name[] = REGULATOR_PWM_MUX_NAME;
+       .pwm_iomux_name = REGULATOR_PWM_MUX_NAME,
+       .pwm_iomux_pwm = REGULATOR_PWM_MUX_MODE,
+       .pwm_iomux_gpio = REGULATOR_PWM_MUX_MODE_GPIO,
+       .init_data  = &rk29_pwm_regulator_data,
+};
+
+static struct platform_device rk29_device_pwm_regulator = {
+       .name = "pwm-voltage-regulator",
+       .id   = -1,
+       .dev  = {
+               .platform_data = &rk29_regulator_pwm_platform_data,
+       },
+};
+
+#endif
+
+
+#if defined(CONFIG_MTK23D)
+static int mtk23d_io_init(void)
+{
+         return 0;
+}
+
+static int mtk23d_io_deinit(void)
+{
+ 
+         return 0;
+}
+ 
+struct rk2818_23d_data rk2818_23d_info = {
+        .io_init = mtk23d_io_init,
+        .io_deinit = mtk23d_io_deinit,
+        .bp_power = RK29_PIN6_PB0,
+        .bp_power_active_low = 0,
+        .bp_reset = RK29_PIN6_PB1,
+        .bp_reset_active_low = 0,
+        .bp_statue = RK29_PIN0_PA2,//input  high bp sleep;
+        .ap_statue = RK29_PIN0_PA3,//output high ap sleep;
+        .ap_bp_wakeup = RK29_PIN0_PA0, //output AP wake up BP used rising edge;
+        .bp_ap_wakeup = RK29_PIN0_PA4,//input BP wake up AP
+};
+struct platform_device rk2818_device_mtk23d = {
+        .name = "mtk23d",
+        .id = -1,
+        .dev            = {
+                .platform_data = &rk2818_23d_info,
+        }
+    };
+#endif
+
+/*****************************************************************************************
+ * SDMMC devices
+*****************************************************************************************/
+#if !defined(CONFIG_SDMMC_RK29_OLD)    
+static void rk29_sdmmc_gpio_open(int device_id, int on)
+{
+    switch(device_id)
+    {
+        case 0://mmc0
+        {
+            #ifdef CONFIG_SDMMC0_RK29
+            if(on)
+            {
+                gpio_direction_output(RK29_PIN1_PD0,GPIO_HIGH);//set mmc0-clk to high
+                gpio_direction_output(RK29_PIN1_PD1,GPIO_HIGH);//set mmc0-cmd to high.
+                gpio_direction_output(RK29_PIN1_PD2,GPIO_HIGH);//set mmc0-data0 to high.
+                gpio_direction_output(RK29_PIN1_PD3,GPIO_HIGH);//set mmc0-data1 to high.
+                gpio_direction_output(RK29_PIN1_PD4,GPIO_HIGH);//set mmc0-data2 to high.
+                gpio_direction_output(RK29_PIN1_PD5,GPIO_HIGH);//set mmc0-data3 to high.
+
+                mdelay(30);
+            }
+            else
+            {
+                rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_GPIO1_D0);
+                gpio_request(RK29_PIN1_PD0, "mmc0-clk");
+                gpio_direction_output(RK29_PIN1_PD0,GPIO_LOW);//set mmc0-clk to low.
+
+                rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_GPIO1_D1);
+                gpio_request(RK29_PIN1_PD1, "mmc0-cmd");
+                gpio_direction_output(RK29_PIN1_PD1,GPIO_LOW);//set mmc0-cmd to low.
+
+                rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_GPIO1D2);
+                gpio_request(RK29_PIN1_PD2, "mmc0-data0");
+                gpio_direction_output(RK29_PIN1_PD2,GPIO_LOW);//set mmc0-data0 to low.
+
+                rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_GPIO1D3);
+                gpio_request(RK29_PIN1_PD3, "mmc0-data1");
+                gpio_direction_output(RK29_PIN1_PD3,GPIO_LOW);//set mmc0-data1 to low.
+
+                rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_GPIO1D4);
+                gpio_request(RK29_PIN1_PD4, "mmc0-data2");
+                gpio_direction_output(RK29_PIN1_PD4,GPIO_LOW);//set mmc0-data2 to low.
+
+                rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_GPIO1D5);
+                gpio_request(RK29_PIN1_PD5, "mmc0-data3");
+                gpio_direction_output(RK29_PIN1_PD5,GPIO_LOW);//set mmc0-data3 to low.
+
+                mdelay(30);
+            }
+            #endif
+        }
+        break;
+        
+        case 1://mmc1
+        {
+            #ifdef CONFIG_SDMMC1_RK29
+            if(on)
+            {
+                gpio_direction_output(RK29_PIN1_PC7,GPIO_HIGH);//set mmc1-clk to high
+                gpio_direction_output(RK29_PIN1_PC2,GPIO_HIGH);//set mmc1-cmd to high.
+                gpio_direction_output(RK29_PIN1_PC3,GPIO_HIGH);//set mmc1-data0 to high.
+                gpio_direction_output(RK29_PIN1_PC4,GPIO_HIGH);//set mmc1-data1 to high.
+                gpio_direction_output(RK29_PIN1_PC5,GPIO_HIGH);//set mmc1-data2 to high.
+                gpio_direction_output(RK29_PIN1_PC6,GPIO_HIGH);//set mmc1-data3 to high.
+                mdelay(100);
+            }
+            else
+            {
+                rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_GPIO1C7);
+                gpio_request(RK29_PIN1_PC7, "mmc1-clk");
+                gpio_direction_output(RK29_PIN1_PC7,GPIO_LOW);//set mmc1-clk to low.
+
+                rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_GPIO1C2);
+                gpio_request(RK29_PIN1_PC2, "mmc1-cmd");
+                gpio_direction_output(RK29_PIN1_PC2,GPIO_LOW);//set mmc1-cmd to low.
+
+                rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_GPIO1C3);
+                gpio_request(RK29_PIN1_PC3, "mmc1-data0");
+                gpio_direction_output(RK29_PIN1_PC3,GPIO_LOW);//set mmc1-data0 to low.
+
+                mdelay(100);
+            }
+            #endif
+        }
+        break; 
+        
+        case 2: //mmc2
+        break;
+        
+        default:
+        break;
+    }
+}
+
+
+static void rk29_sdmmc_set_iomux_mmc0(unsigned int bus_width)
+{
+    switch (bus_width)
+    {
+        
+       case 1://SDMMC_CTYPE_4BIT:
+       {
+               rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1);
+               rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2);
+               rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3);
+       }
+       break;
+
+       case 0x10000://SDMMC_CTYPE_8BIT:
+           break;
+       case 0xFFFF: //gpio_reset
+       {
+            rk29_mux_api_set(GPIO5D5_SDMMC0PWREN_NAME, GPIO5H_GPIO5D5);   
+            gpio_request(RK29_PIN5_PD5,"sdmmc-power");
+            gpio_direction_output(RK29_PIN5_PD5,GPIO_HIGH); //power-off
+
+            rk29_sdmmc_gpio_open(0, 0);
+
+            gpio_direction_output(RK29_PIN5_PD5,GPIO_LOW); //power-on
+
+            rk29_sdmmc_gpio_open(0, 1);
+       }
+       break;
+
+       default: //case 0://SDMMC_CTYPE_1BIT:
+        {
+               rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD);
+               rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT);
+               rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_SDMMC0_DATA0);
+
+               rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_GPIO1D3);
+               gpio_request(RK29_PIN1_PD3, "mmc0-data1");
+               gpio_direction_output(RK29_PIN1_PD3,GPIO_HIGH);
+
+               rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_GPIO1D4);
+               gpio_request(RK29_PIN1_PD4, "mmc0-data2");
+               gpio_direction_output(RK29_PIN1_PD4,GPIO_HIGH);
+               
+            rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_GPIO1D5);
+            gpio_request(RK29_PIN1_PD5, "mmc0-data3");
+               gpio_direction_output(RK29_PIN1_PD5,GPIO_HIGH);
+       }
+       break;
+       }
+}
+
+static void rk29_sdmmc_set_iomux_mmc1(unsigned int bus_width)
+{
+#if 0
+    switch (bus_width)
+    {
+        
+       case 1://SDMMC_CTYPE_4BIT:
+       {
+            rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);
+            rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);
+            rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);
+            rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1);
+            rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);
+            rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);
+       }
+       break;
+
+       case 0x10000://SDMMC_CTYPE_8BIT:
+           break;
+       case 0xFFFF:
+       {
+          rk29_sdmmc_gpio_open(1, 0); 
+          rk29_sdmmc_gpio_open(1, 1);
+       }
+       break;
+
+       default: //case 0://SDMMC_CTYPE_1BIT:
+        {
+            rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);
+               rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);
+               rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);
+
+            rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_GPIO1C4);
+            gpio_request(RK29_PIN1_PC4, "mmc1-data1");
+               gpio_direction_output(RK29_PIN1_PC4,GPIO_HIGH);
+               
+            rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_GPIO1C5);
+            gpio_request(RK29_PIN1_PC5, "mmc1-data2");
+               gpio_direction_output(RK29_PIN1_PC5,GPIO_HIGH);
+
+            rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_GPIO1C6);
+            gpio_request(RK29_PIN1_PC6, "mmc1-data3");
+               gpio_direction_output(RK29_PIN1_PC6,GPIO_HIGH);
+
+       }
+       break;
+       }
+#else
+    rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);
+    rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);
+    rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);
+    rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1);
+    rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);
+    rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);
+
+#endif
+}
+
+static void rk29_sdmmc_set_iomux_mmc2(unsigned int bus_width)
+{
+    ;//
+}
+
+static void rk29_sdmmc_set_iomux(int device_id, unsigned int bus_width)
+{
+    switch(device_id)
+    {
+        case 0:
+            #ifdef CONFIG_SDMMC0_RK29
+            rk29_sdmmc_set_iomux_mmc0(bus_width);
+            #endif
+            break;
+        case 1:
+            #ifdef CONFIG_SDMMC1_RK29
+            rk29_sdmmc_set_iomux_mmc1(bus_width);
+            #endif
+            break;
+        case 2:
+            rk29_sdmmc_set_iomux_mmc2(bus_width);
+            break;
+        default:
+            break;
+    }    
+}
+#endif
+
+#ifdef CONFIG_SDMMC0_RK29
+static int rk29_sdmmc0_cfg_gpio(void)
+{
+       rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD);
+       rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT);
+       rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_SDMMC0_DATA0);
+       rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1);
+       rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2);
+       rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3);
+#ifdef CONFIG_SDMMC_RK29_OLD   
+       rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_GPIO2A2);
+#else
+  rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);//Modifyed by xbw.
+#endif 
+       rk29_mux_api_set(GPIO5D5_SDMMC0PWREN_NAME, GPIO5H_GPIO5D5);   ///GPIO5H_SDMMC0_PWR_EN);  ///GPIO5H_GPIO5D5);
+       gpio_request(RK29_PIN5_PD5,"sdmmc");
+       gpio_set_value(RK29_PIN5_PD5,GPIO_HIGH);
+       mdelay(100);
+       gpio_set_value(RK29_PIN5_PD5,GPIO_LOW);
+       return 0;
+}
+
+#define CONFIG_SDMMC0_USE_DMA
+struct rk29_sdmmc_platform_data default_sdmmc0_data = {
+       .host_ocr_avail = (MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
+                                          MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33|
+                                          MMC_VDD_33_34|MMC_VDD_34_35| MMC_VDD_35_36),
+       .host_caps      = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
+       .io_init = rk29_sdmmc0_cfg_gpio,
+       .dma_name = "sd_mmc",
+#ifdef CONFIG_SDMMC0_USE_DMA
+       .use_dma  = 1,
+#else
+       .use_dma = 0,
+#endif
+#if !defined(CONFIG_SDMMC_RK29_OLD)            
+       .set_iomux = rk29_sdmmc_set_iomux,
+#endif
+       .detect_irq = RK29_PIN2_PA2, // INVALID_GPIO
+       .enable_sd_wakeup = 0,
+};
+#endif
+#ifdef CONFIG_SDMMC1_RK29
+#define CONFIG_SDMMC1_USE_DMA
+static int rk29_sdmmc1_cfg_gpio(void)
+{
+       rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);
+       rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);
+       rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);
+       rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1);
+       rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);
+       rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);
+       //rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_SDMMC1_DETECT_N);
+       return 0;
+}
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+static int rk29sdk_wifi_status(struct device *dev);
+static int rk29sdk_wifi_status_register(void (*callback)(int card_presend, void *dev_id), void *dev_id);
+#endif
+
+#define RK29SDK_WIFI_SDIO_CARD_DETECT_N    RK29_PIN1_PD6
+
+struct rk29_sdmmc_platform_data default_sdmmc1_data = {
+       .host_ocr_avail = (MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|
+                                          MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32|
+                                          MMC_VDD_32_33|MMC_VDD_33_34),
+       .host_caps      = (MMC_CAP_4_BIT_DATA|MMC_CAP_SDIO_IRQ|
+                                  MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
+       .io_init = rk29_sdmmc1_cfg_gpio,
+       .dma_name = "sdio",
+#if !defined(CONFIG_SDMMC_RK29_OLD)
+       .set_iomux = rk29_sdmmc_set_iomux,
+#endif
+#ifdef CONFIG_SDMMC1_USE_DMA
+       .use_dma  = 1,
+#else
+       .use_dma = 0,
+#endif
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+        .status = rk29sdk_wifi_status,
+        .register_status_notify = rk29sdk_wifi_status_register,
+#endif
+#if 0
+        .detect_irq = RK29SDK_WIFI_SDIO_CARD_DETECT_N,
+#endif
+};
+#endif
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+#define RK29SDK_WIFI_GPIO_RESET_N          RK29_PIN6_PC0
+#define RK29SDK_BT_GPIO_RESET_N            RK29_PIN6_PC7
+
+static int rk29sdk_wifi_cd = 0;   /* wifi virtual 'card detect' status */
+static void (*wifi_status_cb)(int card_present, void *dev_id);
+static void *wifi_status_cb_devid;
+
+static int rk29sdk_wifi_status(struct device *dev)
+{
+        return rk29sdk_wifi_cd;
+}
+
+static int rk29sdk_wifi_status_register(void (*callback)(int card_present, void *dev_id), void *dev_id)
+{
+        if(wifi_status_cb)
+                return -EAGAIN;
+        wifi_status_cb = callback;
+        wifi_status_cb_devid = dev_id;
+        return 0;
+}
+
+static int rk29sdk_wifi_bt_gpio_control_init(void)
+{
+    if (gpio_request(RK29SDK_WIFI_GPIO_RESET_N, "wifi reset")) {
+           pr_info("%s: request wifi reset gpio failed\n", __func__);
+           return -1;
+    }
+
+    if (gpio_request(RK29SDK_BT_GPIO_RESET_N, "bt reset")) {
+          pr_info("%s: request bt reset gpio failed\n", __func__);
+          gpio_free(RK29SDK_WIFI_GPIO_RESET_N);
+          return -1;
+    }
+
+    gpio_direction_output(RK29SDK_WIFI_GPIO_RESET_N,    GPIO_LOW);
+    gpio_direction_output(RK29SDK_BT_GPIO_RESET_N,      GPIO_LOW);
+    pr_info("%s: init finished\n",__func__);
+
+    return 0;
+}
+
+static int rk29sdk_wifi_power(int on)
+{
+        pr_info("%s: %d\n", __func__, on);
+        if (on){
+                gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, GPIO_HIGH);
+                mdelay(100);
+                pr_info("wifi turn on power\n");
+        }else{
+                gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, GPIO_LOW);
+                               pr_info("wifi shut off power\n");
+        }
+        return 0;
+}
+
+static int rk29sdk_wifi_reset_state;
+static int rk29sdk_wifi_reset(int on)
+{
+        pr_info("%s: %d\n", __func__, on);
+        gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, on);
+        mdelay(100);
+        return 0;
+}
+
+int rk29sdk_wifi_set_carddetect(int val)
+{
+        pr_info("%s:%d\n", __func__, val);
+        rk29sdk_wifi_cd = val;
+        if (wifi_status_cb){
+                wifi_status_cb(val, wifi_status_cb_devid);
+        }else {
+                pr_warning("%s, nobody to notify\n", __func__);
+        }
+        return 0;
+}
+EXPORT_SYMBOL(rk29sdk_wifi_set_carddetect);
+
+static struct wifi_mem_prealloc wifi_mem_array[PREALLOC_WLAN_SEC_NUM] = {
+        {NULL, (WLAN_SECTION_SIZE_0 + PREALLOC_WLAN_SECTION_HEADER)},
+        {NULL, (WLAN_SECTION_SIZE_1 + PREALLOC_WLAN_SECTION_HEADER)},
+        {NULL, (WLAN_SECTION_SIZE_2 + PREALLOC_WLAN_SECTION_HEADER)},
+        {NULL, (WLAN_SECTION_SIZE_3 + PREALLOC_WLAN_SECTION_HEADER)}
+};
+
+static void *rk29sdk_mem_prealloc(int section, unsigned long size)
+{
+        if (section == PREALLOC_WLAN_SEC_NUM)
+                return wlan_static_skb;
+
+        if ((section < 0) || (section > PREALLOC_WLAN_SEC_NUM))
+                return NULL;
+
+        if (wifi_mem_array[section].size < size)
+                return NULL;
+
+        return wifi_mem_array[section].mem_ptr;
+}
+
+int __init rk29sdk_init_wifi_mem(void)
+{
+        int i;
+        int j;
+
+        for (i = 0 ; i < WLAN_SKB_BUF_NUM ; i++) {
+                wlan_static_skb[i] = dev_alloc_skb(
+                                ((i < (WLAN_SKB_BUF_NUM / 2)) ? 4096 : 8192));
+
+                if (!wlan_static_skb[i])
+                        goto err_skb_alloc;
+        }
+
+        for (i = 0 ; i < PREALLOC_WLAN_SEC_NUM ; i++) {
+                wifi_mem_array[i].mem_ptr =
+                                kmalloc(wifi_mem_array[i].size, GFP_KERNEL);
+
+                if (!wifi_mem_array[i].mem_ptr)
+                        goto err_mem_alloc;
+        }
+        return 0;
+
+ err_mem_alloc:
+        pr_err("Failed to mem_alloc for WLAN\n");
+        for (j = 0 ; j < i ; j++)
+                kfree(wifi_mem_array[j].mem_ptr);
+
+        i = WLAN_SKB_BUF_NUM;
+
+ err_skb_alloc:
+        pr_err("Failed to skb_alloc for WLAN\n");
+        for (j = 0 ; j < i ; j++)
+                dev_kfree_skb(wlan_static_skb[j]);
+
+        return -ENOMEM;
+}
+
+static struct wifi_platform_data rk29sdk_wifi_control = {
+        .set_power = rk29sdk_wifi_power,
+        .set_reset = rk29sdk_wifi_reset,
+        .set_carddetect = rk29sdk_wifi_set_carddetect,
+        .mem_prealloc   = rk29sdk_mem_prealloc,
+};
+static struct platform_device rk29sdk_wifi_device = {
+        .name = "bcm4329_wlan",
+        .id = 1,
+        .dev = {
+                .platform_data = &rk29sdk_wifi_control,
+         },
+};
+#endif
+
+
+/* bluetooth rfkill device */
+static struct platform_device rk29sdk_rfkill = {
+        .name = "rk29sdk_rfkill",
+        .id = -1,
+};
+
+
+#ifdef CONFIG_VIVANTE
+static struct resource resources_gpu[] = {
+    [0] = {
+               .name   = "gpu_irq",
+        .start         = IRQ_GPU,
+        .end    = IRQ_GPU,
+        .flags  = IORESOURCE_IRQ,
+    },
+    [1] = {
+               .name = "gpu_base",
+        .start  = RK29_GPU_PHYS,
+        .end    = RK29_GPU_PHYS + RK29_GPU_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+    },
+    [2] = {
+               .name = "gpu_mem",
+        .start  = PMEM_GPU_BASE,
+        .end    = PMEM_GPU_BASE + PMEM_GPU_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+    },
+};
+static struct platform_device rk29_device_gpu = {
+    .name             = "galcore",
+    .id               = 0,
+    .num_resources    = ARRAY_SIZE(resources_gpu),
+    .resource         = resources_gpu,
+};
+#endif
+#ifdef CONFIG_KEYS_RK29
+extern struct rk29_keys_platform_data rk29_keys_pdata;
+static struct platform_device rk29_device_keys = {
+       .name           = "rk29-keypad",
+       .id             = -1,
+       .dev            = {
+               .platform_data  = &rk29_keys_pdata,
+       },
+};
+#endif
+
+#if CONFIG_ANDROID_TIMED_GPIO
+static struct timed_gpio timed_gpios[] = {
+       {
+               .name = "vibrator",
+               .gpio = RK29_PIN1_PB5,
+               .max_timeout = 1000,
+               .active_low = 0,
+               .adjust_time =20,      //adjust for diff product
+       },
+};
+
+struct timed_gpio_platform_data rk29_vibrator_info = {
+       .num_gpios = 1,
+       .gpios = timed_gpios,
+};
+
+struct platform_device rk29_device_vibrator ={
+       .name = "timed-gpio",
+       .id = -1,
+       .dev = {
+               .platform_data = &rk29_vibrator_info,
+               },
+
+};
+#endif 
+
+static void __init rk29_board_iomux_init(void)
+{
+       int err;
+
+#ifdef CONFIG_UART1_RK29
+       //disable uart1 pull down
+       rk29_mux_api_set(GPIO2A5_UART1SOUT_NAME, GPIO2L_GPIO2A5);                       
+       rk29_mux_api_set(GPIO2A4_UART1SIN_NAME, GPIO2L_GPIO2A4);                
+
+       gpio_request(RK29_PIN2_PA5, NULL);
+       gpio_request(RK29_PIN2_PA4, NULL);
+
+       gpio_pull_updown(RK29_PIN2_PA5, PullDisable);
+       gpio_pull_updown(RK29_PIN2_PA4, PullDisable);
+
+       rk29_mux_api_set(GPIO2A5_UART1SOUT_NAME, GPIO2L_UART1_SOUT);                    
+       rk29_mux_api_set(GPIO2A4_UART1SIN_NAME, GPIO2L_UART1_SIN); 
+
+       gpio_free(RK29_PIN2_PA5);
+       gpio_free(RK29_PIN2_PA4);
+#endif
+
+       #if CONFIG_ANDROID_TIMED_GPIO
+       rk29_mux_api_set(GPIO1B5_PWM0_NAME, GPIO1L_GPIO1B5);//for timed gpio
+       #endif
+       #ifdef CONFIG_RK29_PWM_REGULATOR
+       rk29_mux_api_set(REGULATOR_PWM_MUX_NAME,REGULATOR_PWM_MUX_MODE);
+       #endif
+       #ifdef CONFIG_RK_HEADSET_DET
+       rk29_mux_api_set(GPIO3A6_SMCADDR14_HOSTDATA14_NAME,GPIO3L_GPIO3A6);
+       #endif
+       
+       rk29_mux_api_set(GPIO4C0_RMIICLKOUT_RMIICLKIN_NAME,GPIO4H_GPIO4C0);
+
+       err = gpio_request(RK29_PIN4_PC0, "clk27M_control");
+       if (err) {
+               gpio_free(RK29_PIN4_PC0);
+               printk("-------request RK29_PIN4_PC0 fail--------\n");
+               return -1;
+       }
+       //phy power down
+
+       #if defined (CONFIG_RK29_WORKING_POWER_MANAGEMENT)
+       gpio_direction_output(RK29_PIN4_PC0, GPIO_HIGH);
+       gpio_set_value(RK29_PIN4_PC0, GPIO_HIGH);
+       #else
+       gpio_direction_output(RK29_PIN4_PC0, GPIO_LOW);
+       gpio_set_value(RK29_PIN4_PC0, GPIO_LOW);
+       #endif
+
+       rk29_mux_api_set(GPIO4C5_RMIICSRDVALID_MIIRXDVALID_NAME,GPIO4H_GPIO4C5);
+
+       err = gpio_request(RK29_PIN4_PC5, "clk24M_control");
+       if (err) {
+               gpio_free(RK29_PIN4_PC5);
+               printk("-------request RK29_PIN4_PC5 fail--------\n");
+               return -1;
+       }
+       //phy power down
+       gpio_direction_output(RK29_PIN4_PC5, GPIO_LOW);
+       gpio_set_value(RK29_PIN4_PC5, GPIO_LOW);        
+}
+
+// For phone,just a disk only, add by phc,20110816
+#ifdef CONFIG_USB_ANDROID
+struct usb_mass_storage_platform_data phone_mass_storage_pdata = {
+       .nluns          = 1,  
+       .vendor         = "RockChip",
+       .product        = "rk29 sdk",
+       .release        = 0x0100,
+};
+
+//static 
+struct platform_device phone_usb_mass_storage_device = {
+       .name   = "usb_mass_storage",
+       .id     = -1,
+       .dev    = {
+               .platform_data = &phone_mass_storage_pdata,
+       },
+};
+#endif
+
+#ifdef CONFIG_RK29_CHARGE_EARLYSUSPEND
+
+struct platform_device charge_lowerpower_device = {
+       .name   = "charge_lowerpower",
+       .id     = -1,
+};
+#endif
+
+static struct platform_device *devices[] __initdata = {
+#ifdef CONFIG_UART1_RK29
+       &rk29_device_uart1,
+#endif
+#ifdef CONFIG_UART0_RK29
+       &rk29_device_uart0,
+#endif
+#ifdef CONFIG_UART2_RK29
+       &rk29_device_uart2,
+#endif
+#ifdef CONFIG_UART3_RK29
+       &rk29_device_uart3,
+#endif
+
+#ifdef CONFIG_RK29_PWM_REGULATOR
+       &rk29_device_pwm_regulator,
+#endif
+#ifdef CONFIG_SPIM0_RK29
+    &rk29xx_device_spi0m,
+#endif
+#ifdef CONFIG_SPIM1_RK29
+    &rk29xx_device_spi1m,
+#endif
+#ifdef CONFIG_ADC_RK29
+       &rk29_device_adc,
+#endif
+#ifdef CONFIG_I2C0_RK29
+       &rk29_device_i2c0,
+#endif
+#ifdef CONFIG_I2C1_RK29
+       &rk29_device_i2c1,
+#endif
+#ifdef CONFIG_I2C2_RK29
+       &rk29_device_i2c2,
+#endif
+#ifdef CONFIG_I2C3_RK29
+       &rk29_device_i2c3,
+#endif
+
+#ifdef CONFIG_SND_RK29_SOC_I2S_2CH
+        &rk29_device_iis_2ch,
+#endif
+#ifdef CONFIG_SND_RK29_SOC_I2S_8CH
+        &rk29_device_iis_8ch,
+#endif
+
+#ifdef CONFIG_KEYS_RK29
+       &rk29_device_keys,
+#endif
+#ifdef CONFIG_SDMMC0_RK29
+       &rk29_device_sdmmc0,
+#endif
+#ifdef CONFIG_SDMMC1_RK29
+       &rk29_device_sdmmc1,
+#endif
+
+#ifdef CONFIG_MTD_NAND_RK29XX
+       &rk29xx_device_nand,
+#endif
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+        &rk29sdk_wifi_device,
+#endif
+
+#ifdef CONFIG_BT
+        &rk29sdk_rfkill,
+#endif
+
+#if defined(CONFIG_MTK23D)
+       &rk2818_device_mtk23d,
+#endif
+
+#ifdef CONFIG_MTD_NAND_RK29
+       &rk29_device_nand,
+#endif
+
+#ifdef CONFIG_FB_RK29
+       &rk29_device_fb,
+       &rk29_device_dma_cpy,
+#endif
+#ifdef CONFIG_BACKLIGHT_RK29_BL
+       &rk29_device_backlight,
+#endif
+#ifdef CONFIG_RK29_VMAC
+       &rk29_device_vmac,
+#endif
+#ifdef CONFIG_VIVANTE
+       &rk29_device_gpu,
+#endif
+#ifdef CONFIG_VIDEO_RK29
+       &rk29_device_camera,      /* ddl@rock-chips.com : camera support  */
+       #if (CONFIG_SENSOR_IIC_ADDR_0 != 0x00)
+       &rk29_soc_camera_pdrv_0,
+       #endif
+       &rk29_soc_camera_pdrv_1,
+       &android_pmem_cam_device,
+#endif
+       &android_pmem_device,
+       &rk29_vpu_mem_device,
+#ifdef CONFIG_USB20_OTG
+       &rk29_device_usb20_otg,
+#endif
+#ifdef CONFIG_USB20_HOST
+       &rk29_device_usb20_host,
+#endif
+#ifdef CONFIG_USB11_HOST
+       &rk29_device_usb11_host,
+#endif
+#ifdef CONFIG_USB_ANDROID
+       &android_usb_device,
+       &phone_usb_mass_storage_device,
+#endif
+#ifdef CONFIG_RK29_IPP
+       &rk29_device_ipp,
+#endif
+#ifdef CONFIG_VIDEO_RK29XX_VOUT
+       &rk29_v4l2_output_devce,
+#endif
+#ifdef CONFIG_RK_HEADSET_DET
+    &rk_device_headset,
+#endif
+#ifdef CONFIG_RK29_GPS
+       &rk29_device_gps,
+#endif
+#ifdef CONFIG_ANDROID_TIMED_GPIO
+       &rk29_device_vibrator,
+#endif
+};
+
+#ifdef CONFIG_RK29_VMAC
+/*****************************************************************************************
+ * vmac devices
+ * author: lyx@rock-chips.com
+ *****************************************************************************************/
+static int rk29_vmac_register_set(void)
+{
+       //config rk29 vmac as rmii, 100MHz
+       u32 value= readl(RK29_GRF_BASE + 0xbc);
+       value = (value & 0xfff7ff) | (0x400);
+       writel(value, RK29_GRF_BASE + 0xbc);
+       return 0;
+}
+
+static int rk29_rmii_io_init(void)
+{
+       int err;
+
+       //phy power gpio
+       err = gpio_request(RK29_PIN6_PB0, "phy_power_en");
+       if (err) {
+               gpio_free(RK29_PIN6_PB0);
+               printk("-------request RK29_PIN6_PB0 fail--------\n");
+               return -1;
+       }
+       //phy power down
+       gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
+       gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
+
+       return 0;
+}
+
+static int rk29_rmii_io_deinit(void)
+{
+       //phy power down
+       gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
+       gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
+       //free
+       gpio_free(RK29_PIN6_PB0);
+       return 0;
+}
+
+static int rk29_rmii_power_control(int enable)
+{
+       if (enable) {
+               //enable phy power
+               gpio_direction_output(RK29_PIN6_PB0, GPIO_HIGH);
+               gpio_set_value(RK29_PIN6_PB0, GPIO_HIGH);
+       }
+       else {
+               gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
+               gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
+       }
+       return 0;
+}
+
+struct rk29_vmac_platform_data rk29_vmac_pdata = {
+       .vmac_register_set = rk29_vmac_register_set,
+       .rmii_io_init = rk29_rmii_io_init,
+       .rmii_io_deinit = rk29_rmii_io_deinit,
+       .rmii_power_control = rk29_rmii_power_control,
+};
+#endif
+
+/*****************************************************************************************
+ * spi devices
+ * author: cmc@rock-chips.com
+ *****************************************************************************************/
+#define SPI_CHIPSELECT_NUM 2
+static struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {
+    {
+               .name = "spi0 cs0",
+               .cs_gpio = RK29_PIN2_PC1,
+               .cs_iomux_name = GPIO2C1_SPI0CSN0_NAME,
+               .cs_iomux_mode = GPIO2H_SPI0_CSN0,
+       },
+       {
+               .name = "spi0 cs1",
+               .cs_gpio = RK29_PIN1_PA4,
+               .cs_iomux_name = GPIO1A4_EMMCWRITEPRT_SPI0CS1_NAME,//if no iomux,set it NULL
+               .cs_iomux_mode = GPIO1L_SPI0_CSN1,
+       }
+};
+
+static struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {
+    {
+               .name = "spi1 cs0",
+               .cs_gpio = RK29_PIN2_PC5,
+               .cs_iomux_name = GPIO2C5_SPI1CSN0_NAME,
+               .cs_iomux_mode = GPIO2H_SPI1_CSN0,
+       },
+       {
+               .name = "spi1 cs1",
+               .cs_gpio = RK29_PIN1_PA3,
+               .cs_iomux_name = GPIO1A3_EMMCDETECTN_SPI1CS1_NAME,//if no iomux,set it NULL
+               .cs_iomux_mode = GPIO1L_SPI1_CSN1,
+       }
+};
+
+static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)
+{
+#if 1
+               int i;
+               if (cs_gpios) {
+                       for (i=0; i<cs_num; i++) {
+                               rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
+                       }
+               }
+#endif
+       return 0;
+}
+
+static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)
+{
+       return 0;
+}
+
+static int spi_io_fix_leakage_bug(void)
+{
+#if 0
+       gpio_direction_output(RK29_PIN2_PC1, GPIO_LOW);
+#endif
+       return 0;
+}
+
+static int spi_io_resume_leakage_bug(void)
+{
+#if 0
+       gpio_direction_output(RK29_PIN2_PC1, GPIO_HIGH);
+#endif
+       return 0;
+}
+
+struct rk29xx_spi_platform_data rk29xx_spi0_platdata = {
+       .num_chipselect = SPI_CHIPSELECT_NUM,
+       .chipselect_gpios = rk29xx_spi0_cs_gpios,
+       .io_init = spi_io_init,
+       .io_deinit = spi_io_deinit,
+       .io_fix_leakage_bug = spi_io_fix_leakage_bug,
+       .io_resume_leakage_bug = spi_io_resume_leakage_bug,
+};
+
+struct rk29xx_spi_platform_data rk29xx_spi1_platdata = {
+       .num_chipselect = SPI_CHIPSELECT_NUM,
+       .chipselect_gpios = rk29xx_spi1_cs_gpios,
+       .io_init = spi_io_init,
+       .io_deinit = spi_io_deinit,
+       .io_fix_leakage_bug = spi_io_fix_leakage_bug,
+       .io_resume_leakage_bug = spi_io_resume_leakage_bug,
+};
+
+
+/*****************************************************************************************
+ * xpt2046 touch panel
+ * author: hhb@rock-chips.com
+ *****************************************************************************************/
+#if defined(CONFIG_TOUCHSCREEN_XPT2046_NORMAL_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_TSLIB_SPI)
+#define XPT2046_GPIO_INT           RK29_PIN4_PD5 //中断???#define DEBOUNCE_REPTIME  3
+
+static struct xpt2046_platform_data xpt2046_info = {
+       .model                  = 2046,
+       .keep_vref_on   = 1,
+       .swap_xy                = 0,
+       .debounce_max           = 7,
+       .debounce_rep           = DEBOUNCE_REPTIME,
+       .debounce_tol           = 20,
+       .gpio_pendown           = XPT2046_GPIO_INT,
+       .pendown_iomux_name = GPIO4D5_CPUTRACECTL_NAME, 
+       .pendown_iomux_mode = GPIO4H_GPIO4D5,   
+       .touch_virtualkey_length = 60,
+       .penirq_recheck_delay_usecs = 1,
+#if defined(CONFIG_TOUCHSCREEN_480X800)
+       .x_min                  = 0,
+       .x_max                  = 480,
+       .y_min                  = 0,
+       .y_max                  = 800,
+       .touch_ad_top = 3940,
+       .touch_ad_bottom = 310,
+       .touch_ad_left = 3772,
+       .touch_ad_right = 340,
+#elif defined(CONFIG_TOUCHSCREEN_800X480)
+       .x_min                  = 0,
+       .x_max                  = 800,
+       .y_min                  = 0,
+       .y_max                  = 480,
+       .touch_ad_top = 2447,
+       .touch_ad_bottom = 207,
+       .touch_ad_left = 5938,
+       .touch_ad_right = 153,
+#elif defined(CONFIG_TOUCHSCREEN_320X480)
+       .x_min                  = 0,
+       .x_max                  = 320,
+       .y_min                  = 0,
+       .y_max                  = 480,
+       .touch_ad_top = 3166,
+       .touch_ad_bottom = 256,
+       .touch_ad_left = 3658,
+       .touch_ad_right = 380,
+#endif 
+};
+#elif defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)
+static struct xpt2046_platform_data xpt2046_info = {
+       .model                  = 2046,
+       .keep_vref_on   = 1,
+       .swap_xy                = 0,
+       .debounce_max           = 7,
+       .debounce_rep           = DEBOUNCE_REPTIME,
+       .debounce_tol           = 20,
+       .gpio_pendown           = XPT2046_GPIO_INT,
+       .pendown_iomux_name = GPIO4D5_CPUTRACECTL_NAME, 
+       .pendown_iomux_mode = GPIO4H_GPIO4D5,   
+       .touch_virtualkey_length = 60,
+       .penirq_recheck_delay_usecs = 1,
+       
+#if defined(CONFIG_TOUCHSCREEN_480X800)
+       .x_min                  = 0,
+       .x_max                  = 480,
+       .y_min                  = 0,
+       .y_max                  = 800,
+       .screen_x = { 70,  410, 70, 410, 240},
+       .screen_y = { 50, 50,  740, 740, 400},
+       .uncali_x_default = {  3267,  831, 3139, 715, 1845 },
+       .uncali_y_default = { 3638,  3664, 564,  591, 2087 },
+#elif defined(CONFIG_TOUCHSCREEN_800X480)
+       .x_min                  = 0,
+       .x_max                  = 800,
+       .y_min                  = 0,
+       .y_max                  = 480,
+       .screen_x[5] = { 50, 750,  50, 750, 400};
+       .screen_y[5] = { 40,  40, 440, 440, 240};
+       .uncali_x_default[5] = { 438,  565, 3507,  3631, 2105 };
+       .uncali_y_default[5] = {  3756,  489, 3792, 534, 2159 };
+#elif defined(CONFIG_TOUCHSCREEN_320X480)
+       .x_min                  = 0,
+       .x_max                  = 320,
+       .y_min                  = 0,
+       .y_max                  = 480,
+       .screen_x[5] = { 50, 270,  50, 270, 160}; 
+       .screen_y[5] = { 40,  40, 440, 440, 240}; 
+       .uncali_x_default[5] = { 812,  3341, 851,  3371, 2183 };
+       .uncali_y_default[5] = {  442,  435, 3193, 3195, 2004 };
+#endif 
+};
+#endif
+
+static struct spi_board_info board_spi_devices[] = {
+#if defined(CONFIG_TOUCHSCREEN_XPT2046_SPI)
+       {
+               .modalias       = "xpt2046_ts",
+               .chip_select    = 0,// 2,
+               .max_speed_hz   = 125 * 1000 * 26,/* (max sample rate @ 3V) * (cmd + data + overhead) */
+               .bus_num        = 0,
+               .irq = XPT2046_GPIO_INT,
+               .platform_data = &xpt2046_info,
+       },
+#endif
+
+#if defined(CONFIG_MFD_WM831X_SPI)
+       {
+               .modalias       = "wm8310",
+               .chip_select    = 1,
+               .max_speed_hz   = 2*1000*1000,
+               .bus_num        = 1,
+               .irq            = RK29_PIN4_PD0,
+               .platform_data = &wm831x_platdata,
+       },
+#endif
+
+};
+
+
+/**********************************************************************************************
+ *
+ * The virtual keys for android "back", "home", "menu", "search", these four keys are touch key
+ * on the touch screen panel. (added by hhb@rock-chips.com 2011.03.31)
+ *
+ ***********************************************************************************************/
+static ssize_t rk29xx_virtual_keys_show(struct kobject *kobj,
+                       struct kobj_attribute *attr, char *buf)
+{
+#if (defined(CONFIG_TOUCHSCREEN_XPT2046_SPI) && defined(CONFIG_TOUCHSCREEN_480X800)) \
+       || defined(CONFIG_TOUCHSCREEN_HX8520_IIC) || defined(CONFIG_TOUCHSCREEN_GT801_IIC) \
+        || defined (CONFIG_TOUCHSCREEN_GT801_Z5)
+       /* center: x: home: 50, menu: 184, back: 315, search 435, y: 830*/
+    /* centerx;centery;width;height; */
+       return sprintf(buf,
+               __stringify(EV_KEY) ":" __stringify(KEY_BACK)           ":300:860:120:60"//":315:815:120:50"     //":50:830:98:50"      //":210:796:98:50"
+               ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU)       ":60:860:120:60"//":85:815:88:50"       // ":184:830:120:50"  // ":435:796:120:50"
+               ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME)       ":180:860:120:60"//":184:815:100:50"   //":315:830:100:50"      //":320:796:100:50"
+               ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:860:120:60"//":435:815:88:50"   //":50:815:98:50"    //       //":85:796:88:50"
+               "\n");
+
+#elif defined (CONFIG_TOUCHSCREEN_FT5306)
+               return sprintf(buf,
+               __stringify(EV_KEY) ":" __stringify(KEY_BACK)                   ":400:830:120:60"//":315:815:120:50"     //":50:830:98:50"      //":210:796:98:50"
+               ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU)               ":80:830:120:60"//":85:815:88:50"       // ":184:830:120:50"  // ":435:796:120:50"
+               ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME)               ":240:830:120:60"//":184:815:100:50"   //":315:830:100:50"      //":320:796:100:50"
+               "\n");
+#endif
+       return 0;
+}
+
+static struct kobj_attribute rk29xx_virtual_keys_attr = {
+       .attr = {
+#if defined(CONFIG_TOUCHSCREEN_XPT2046_SPI)
+               .name = "virtualkeys.xpt2046-touchscreen",
+#elif defined(CONFIG_TOUCHSCREEN_HX8520_IIC)
+        .name = "virtualkeys.hx8520-touchscreen",
+#elif defined(CONFIG_TOUCHSCREEN_GT801_IIC) || defined (CONFIG_TOUCHSCREEN_GT801_Z5)
+               .name = "virtualkeys.gt801-touchscreen",
+#elif defined(CONFIG_TOUCHSCREEN_ILI2102_IIC)
+               .name = "virtualkeys.ili2102-touchscreen",              
+#elif defined (CONFIG_TOUCHSCREEN_FT5306)
+               .name = "virtualkeys.ft5x0x_ts-touchscreen",
+#else
+               .name = "virtualkeys",
+#endif
+               .mode = S_IRUGO,
+       },
+       .show = &rk29xx_virtual_keys_show,
+};
+
+static struct attribute *rk29xx_properties_attrs[] = {
+       &rk29xx_virtual_keys_attr.attr,
+       NULL
+};
+
+static struct attribute_group rk29xx_properties_attr_group = {
+       .attrs = rk29xx_properties_attrs,
+};
+static int rk29xx_virtual_keys_init(void)
+{
+       int ret;
+       struct kobject *properties_kobj;
+       printk("rk29xx_virtual_keys_init \n");
+       properties_kobj = kobject_create_and_add("board_properties", NULL);
+       if (properties_kobj)
+               ret = sysfs_create_group(properties_kobj,
+                               &rk29xx_properties_attr_group);
+       if (!properties_kobj || ret)
+       {
+               pr_err("failed to create board_properties\n");
+       }
+       return ret;
+}
+
+
+static void __init rk29_gic_init_irq(void)
+{
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38))
+       gic_init(0, 32, (void __iomem *)RK29_GICPERI_BASE, (void __iomem *)RK29_GICCPU_BASE);
+#else
+       gic_dist_init(0, (void __iomem *)RK29_GICPERI_BASE, 32);
+       gic_cpu_init(0, (void __iomem *)RK29_GICCPU_BASE);
+#endif
+}
+
+static void __init machine_rk29_init_irq(void)
+{
+       rk29_gic_init_irq();
+       rk29_gpio_init();
+}
+
+#define POWER_ON_PIN RK29_PIN4_PA4
+
+static void rk29_pm_power_restart(void)
+{
+       printk("%s,line=%d\n",__FUNCTION__,__LINE__);
+       mdelay(2);
+#if defined(CONFIG_MFD_WM831X)
+       wm831x_device_restart(gWm831x);
+#endif
+
+}
+
+static void rk29_pm_power_off(void)
+{
+       printk(KERN_ERR "rk29_pm_power_off start...\n");
+       gpio_direction_output(POWER_ON_PIN, GPIO_LOW);
+#if defined(CONFIG_MFD_WM831X)
+       if(wm831x_read_usb(gWm831x))
+       rk29_pm_power_restart();        //if charging then restart
+       else
+       wm831x_device_shutdown(gWm831x);//else shutdown
+#endif
+       while (1);
+}
+
+
+static struct cpufreq_frequency_table freq_table[] =
+{
+       { .index = 1100000, .frequency =  408000 },
+       { .index = 1150000, .frequency =  600000 },
+       { .index = 1200000, .frequency =  816000 },
+       { .index = 1300000, .frequency = 1008000 },
+       { .frequency = CPUFREQ_TABLE_END },
+};
+
+static void __init machine_rk29_board_init(void)
+{
+       rk29_board_iomux_init();
+
+       gpio_request(POWER_ON_PIN,"poweronpin");
+       gpio_set_value(POWER_ON_PIN, GPIO_HIGH);
+       gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
+       pm_power_off = rk29_pm_power_off;
+       //arm_pm_restart = rk29_pm_power_restart;
+
+       board_update_cpufreq_table(freq_table);
+
+       platform_add_devices(devices, ARRAY_SIZE(devices));
+#ifdef CONFIG_I2C0_RK29
+       i2c_register_board_info(default_i2c0_data.bus_num, board_i2c0_devices,
+                       ARRAY_SIZE(board_i2c0_devices));
+#endif
+#ifdef CONFIG_I2C1_RK29
+       i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,
+                       ARRAY_SIZE(board_i2c1_devices));
+#endif
+#ifdef CONFIG_I2C2_RK29
+       i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,
+                       ARRAY_SIZE(board_i2c2_devices));
+#endif
+#ifdef CONFIG_I2C3_RK29
+       i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,
+                       ARRAY_SIZE(board_i2c3_devices));
+#endif
+
+       spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+       rk29sdk_wifi_bt_gpio_control_init();
+       rk29sdk_init_wifi_mem();
+#endif
+
+#if (defined(CONFIG_TOUCHSCREEN_XPT2046_SPI) && defined(CONFIG_TOUCHSCREEN_480X800)) \
+       || defined(CONFIG_TOUCHSCREEN_HX8520_IIC) || defined(CONFIG_TOUCHSCREEN_GT801_IIC) \
+        || defined (CONFIG_TOUCHSCREEN_GT801_Z5) || defined (CONFIG_TOUCHSCREEN_FT5306)
+       rk29xx_virtual_keys_init();
+#endif
+
+}
+
+static void __init machine_rk29_fixup(struct machine_desc *desc, struct tag *tags,
+                                       char **cmdline, struct meminfo *mi)
+{
+       mi->nr_banks = 1;
+       mi->bank[0].start = RK29_SDRAM_PHYS;
+       mi->bank[0].size = LINUX_SIZE;
+#if SDRAM_SIZE > SZ_512M
+       mi->nr_banks = 2;
+       mi->bank[1].start = RK29_SDRAM_PHYS + SZ_512M;
+       mi->bank[1].size = SDRAM_SIZE - SZ_512M;
+#endif
+}
+
+static void __init machine_rk29_mapio(void)
+{
+       rk29_map_common_io();
+       rk29_setup_early_printk();
+       rk29_sram_init();
+       rk29_clock_init2(periph_pll_96mhz, codec_pll_300mhz, false);
+       rk29_iomux_init();
+       ddr_init(DDR_TYPE, DDR_FREQ);
+}
+
+MACHINE_START(RK29, "RK29board")
+       /* UART for LL DEBUG */
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 37))
+       /* UART for LL DEBUG */
+       .phys_io        = RK29_UART1_PHYS & 0xfff00000,
+       .io_pg_offst    = ((RK29_UART1_BASE) >> 18) & 0xfffc,
+#endif
+       .boot_params    = RK29_SDRAM_PHYS + 0x88000,
+       .fixup          = machine_rk29_fixup,
+       .map_io         = machine_rk29_mapio,
+       .init_irq       = machine_rk29_init_irq,
+       .init_machine   = machine_rk29_board_init,
+       .timer          = &rk29_timer,
+MACHINE_END

diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
old mode 100755 (executable)
new mode 100644 (file)
index 212a2a3..a3b870c
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -973,6 +973,10 @@ config TOUCHSCREEN_GT819
        tristate "GT819 based touchscreens"
        depends on I2C2_RK29
 
+config TOUCHSCREEN_FT5306
+       tristate "FT5306 based touchscreens: FT5306 Interface"
+       depends on I2C2_RK29
+
 config TOUCHSCREEN_FT5406
        tristate "FT5406 based touchscreens: FT5406 Interface"
        depends on I2C2_RK29

diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
old mode 100755 (executable)
new mode 100644 (file)
index 94e802a..5650e9a
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -80,6 +80,7 @@ obj-$(CONFIG_TOUCHSCREEN_ILI2102_IIC) += ili2102_ts.o
 obj-$(CONFIG_D70_L3188A)               += goodix_touch.o
 obj-$(CONFIG_TOUCHSCREEN_GT8XX)                += rk29_i2c_goodix.o
 obj-$(CONFIG_TOUCHSCREEN_FT5406)       += ft5406_ts.o
+obj-$(CONFIG_TOUCHSCREEN_FT5306)       += ft5306_ts.o
 obj-$(CONFIG_TOUCHSCREEN_GT819)                += gt819.o
 obj-$(CONFIG_TOUCHSCREEN_NAS)          += nas_ts.o
 obj-$(CONFIG_LAIBAO_TS)                += ft5x0x_i2c_ts.o

diff --git a/drivers/input/touchscreen/ft5306_ts.c b/drivers/input/touchscreen/ft5306_ts.c
new file mode 100644 (file)
index 0000000..7717749
--- /dev/null
+++ b/drivers/input/touchscreen/ft5306_ts.c
@@ -0,0 +1,959 @@
+/* 
+ * drivers/input/touchscreen/ft5x0x_ts.c
+ *
+ * FocalTech ft5x0x TouchScreen driver. 
+ *
+ * Copyright (c) 2010  Focal tech Ltd.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *
+ *     note: only support mulititouch  Wenfs 2010-10-01
+ */
+
+#include <linux/input.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/slab.h>
+#include <linux/fcntl.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/timer.h>
+#include <linux/jiffies.h>
+#include <linux/miscdevice.h>
+#include <linux/types.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/input-polldev.h>
+#include <linux/i2c.h>
+#include <linux/workqueue.h>
+#ifdef CONFIG_ANDROID_POWER
+#include <linux/android_power.h>
+#endif
+#include <mach/hardware.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+#include <asm/hardware/gic.h>
+#include <mach/iomux.h>
+#include <mach/gpio.h>
+#include <mach/irqs.h>
+#include <mach/rk29_iomap.h>
+#include <mach/board.h>
+#include <mach/rk29_nand.h>
+#include <mach/rk29_camera.h>                          /* ddl@rock-chips.com : camera support */
+#include <media/soc_camera.h>                               /* ddl@rock-chips.com : camera support */
+#include <mach/vpu_mem.h>
+#include <mach/sram.h>
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/earlysuspend.h>
+#endif
+#include <linux/input/mt.h>
+
+
+#if 0
+#define FTprintk(x...) printk(x)
+#else
+#define FTprintk(x...) do{} while(0)
+#endif
+
+#define CONFIG_FT5X0X_MULTITOUCH  1
+#define MAX_POINT                 5
+#define FT5306_IIC_SPEED          400*1000    //300*1000
+#define TOUCH_RESET_PIN           RK29_PIN6_PC3
+#define FT5X0X_REG_THRES          0x80         /* Thresshold, the threshold be low, the sensitivy will be high */
+#define FT5X0X_REG_REPORT_RATE    0x88         /* **************report rate, in unit of 10Hz **************/
+#define FT5X0X_REG_PMODE          0xA5         /* Power Consume Mode 0 -- active, 1 -- monitor, 3 -- sleep */    
+#define FT5X0X_REG_FIRMID         0xA6         /* ***************firmware version **********************/
+#define FT5X0X_REG_NOISE_MODE     0xb2         /* to enable or disable power noise, 1 -- enable, 0 -- disable */
+#define SCREEN_MAX_X              480
+#define SCREEN_MAX_Y              800
+#define PRESS_MAX                 255
+#define FT5X0X_NAME                  "ft5x0x_ts"//"synaptics_i2c_rmi"//"synaptics-rmi-ts"// 
+#define TOUCH_MAJOR_MAX           200
+#define WIDTH_MAJOR_MAX           200
+//FT5X0X_REG_PMODE
+#define PMODE_ACTIVE              0x00
+#define PMODE_MONITOR             0x01
+#define PMODE_STANDBY             0x02
+#define PMODE_HIBERNATE           0x03
+
+
+struct ts_event {
+       u16     x1;
+       u16     y1;
+       u16     x2;
+       u16     y2;
+       u16     x3;
+       u16     y3;
+       u16     x4;
+       u16     y4;
+       u16     x5;
+       u16     y5;
+       u16     pressure;
+    s16  touch_ID1;
+       s16  touch_ID2;
+    s16  touch_ID3;
+    s16  touch_ID4;
+       s16  touch_ID5;
+       u8   touch_point;
+       u8   status;
+};
+
+struct tp_event {
+       u16     x;
+       u16     y;
+    s16 id;
+       u16     pressure;
+       u8  touch_point;
+       u8  flag;
+};
+
+struct ft5x0x_ts_data {
+       struct i2c_client *client;
+       struct input_dev        *input_dev;
+       int    irq;
+       int     (*platform_sleep)(void);
+    int     (*platform_wakeup)(void);
+       struct ts_event         event;
+       struct work_struct      pen_event_work;
+       struct workqueue_struct *ts_workqueue;
+#ifdef CONFIG_HAS_EARLYSUSPEND
+       struct early_suspend ft5306_early_suspend;
+#endif
+};
+static struct i2c_client *this_client;
+
+/***********************************************************************/
+
+#define    FTS_PACKET_LENGTH        128
+
+
+static u8 CTPM_FW[]=
+{
+#include "ft_app_5306.i"
+};
+
+typedef enum
+{
+    ERR_OK,
+    ERR_MODE,
+    ERR_READID,
+    ERR_ERASE,
+    ERR_STATUS,
+    ERR_ECC,
+    ERR_DL_ERASE_FAIL,
+    ERR_DL_PROGRAM_FAIL,
+    ERR_DL_VERIFY_FAIL
+}E_UPGRADE_ERR_TYPE;
+
+/***********************************************************************/
+
+/***********************************************************************
+    [function]: 
+                          callback:                send data to ctpm by i2c interface;
+    [parameters]:
+                           txdata[in]:              data buffer which is used to send data;
+                           length[in]:              the length of the data buffer;
+    [return]:
+                           FTS_TRUE:              success;
+                           FTS_FALSE:             fail;
+************************************************************************/
+static int fts_i2c_txdata(u8 *txdata, int length)
+{
+       int ret;
+
+       struct i2c_msg msg;
+
+      msg.addr = this_client->addr;
+      msg.flags = 0;
+      msg.len = length;
+      msg.buf = txdata;
+      msg.scl_rate = FT5306_IIC_SPEED;
+       ret = i2c_transfer(this_client->adapter, &msg, 1);
+       if (ret < 0)
+               pr_err("%s i2c write error: %d\n", __func__, ret);
+
+       return ret;
+}
+
+/***********************************************************************
+    [function]: 
+                          callback:               write data to ctpm by i2c interface;
+    [parameters]:
+                           buffer[in]:             data buffer;
+                           length[in]:            the length of the data buffer;
+    [return]:
+                           FTS_TRUE:            success;
+                           FTS_FALSE:           fail;
+************************************************************************/
+static bool  i2c_write_interface(u8* pbt_buf, int dw_lenth)
+{
+    int ret;
+    ret=i2c_master_send(this_client, pbt_buf, dw_lenth);
+    if(ret<=0)
+    {
+        FTprintk("[TSP]i2c_write_interface error line = %d, ret = %d\n", __LINE__, ret);
+        return false;
+    }
+
+    return true;
+}
+
+/***********************************************************************
+    [function]: 
+                          callback:                read register value ftom ctpm by i2c interface;
+    [parameters]:
+                        reg_name[in]:         the register which you want to write;
+                           tx_buf[in]:              buffer which is contained of the writing value;
+    [return]:
+                           FTS_TRUE:              success;
+                           FTS_FALSE:             fail;
+************************************************************************/
+static bool fts_register_write(u8 reg_name, u8* tx_buf)
+{
+       u8 write_cmd[2] = {0};
+
+       write_cmd[0] = reg_name;
+       write_cmd[1] = *tx_buf;
+
+       /*call the write callback function*/
+       return i2c_write_interface(write_cmd, 2);
+}
+
+/***********************************************************************
+[function]: 
+                      callback:         send a command to ctpm.
+[parameters]:
+                         btcmd[in]:       command code;
+                         btPara1[in]:     parameter 1;    
+                         btPara2[in]:     parameter 2;    
+                         btPara3[in]:     parameter 3;    
+                      num[in]:         the valid input parameter numbers, 
+                                           if only command code needed and no 
+                                           parameters followed,then the num is 1;    
+[return]:
+                         FTS_TRUE:      success;
+                         FTS_FALSE:     io fail;
+************************************************************************/
+static bool cmd_write(u8 btcmd,u8 btPara1,u8 btPara2,u8 btPara3,u8 num)
+{
+    u8 write_cmd[4] = {0};
+
+    write_cmd[0] = btcmd;
+    write_cmd[1] = btPara1;
+    write_cmd[2] = btPara2;
+    write_cmd[3] = btPara3;
+    return i2c_write_interface(write_cmd, num);
+}
+
+/***********************************************************************
+    [function]: 
+                          callback:              read data from ctpm by i2c interface;
+    [parameters]:
+                           buffer[in]:            data buffer;
+                           length[in]:           the length of the data buffer;
+    [return]:
+                           FTS_TRUE:            success;
+                           FTS_FALSE:           fail;
+************************************************************************/
+static bool i2c_read_interface(u8* pbt_buf, int dw_lenth)
+{
+    int ret;
+    
+    ret=i2c_master_recv(this_client, pbt_buf, dw_lenth);
+
+    if(ret<=0)
+    {
+        FTprintk("[TSP]i2c_read_interface error\n");
+        return false;
+    }
+  
+    return true;
+}
+
+
+/***********************************************************************
+[function]: 
+                      callback:         read a byte data  from ctpm;
+[parameters]:
+                         buffer[in]:       read buffer;
+                         length[in]:      the size of read data;    
+[return]:
+                         FTS_TRUE:      success;
+                         FTS_FALSE:     io fail;
+************************************************************************/
+static bool byte_read(u8* buffer, int length)
+{
+    return i2c_read_interface(buffer, length);
+}
+
+/***********************************************************************
+[function]: 
+                      callback:         write a byte data  to ctpm;
+[parameters]:
+                         buffer[in]:       write buffer;
+                         length[in]:      the size of write data;    
+[return]:
+                         FTS_TRUE:      success;
+                         FTS_FALSE:     io fail;
+************************************************************************/
+static bool byte_write(u8* buffer, int length)
+{
+    
+    return i2c_write_interface(buffer, length);
+}
+
+/***********************************************************************
+    [function]: 
+                          callback:                 read register value ftom ctpm by i2c interface;
+    [parameters]:
+                        reg_name[in]:         the register which you want to read;
+                           rx_buf[in]:              data buffer which is used to store register value;
+                           rx_length[in]:          the length of the data buffer;
+    [return]:
+                           FTS_TRUE:              success;
+                           FTS_FALSE:             fail;
+************************************************************************/
+static bool fts_register_read(u8 reg_name, u8* rx_buf, int rx_length)
+{
+       u8 read_cmd[2]= {0};
+       u8 cmd_len      = 0;
+
+       read_cmd[0] = reg_name;
+       cmd_len = 1;    
+
+       /*send register addr*/
+       if(!i2c_write_interface(&read_cmd[0], cmd_len))
+       {
+               return false;
+       }
+
+       /*call the read callback function to get the register value*/           
+       if(!i2c_read_interface(rx_buf, rx_length))
+       {
+               return false;
+       }
+       return true;
+}
+
+
+
+/***********************************************************************
+[function]: 
+                        callback:          burn the FW to ctpm.
+[parameters]:
+                           pbt_buf[in]:     point to Head+FW ;
+                           dw_lenth[in]:   the length of the FW + 6(the Head length);    
+[return]:
+                           ERR_OK:          no error;
+                           ERR_MODE:      fail to switch to UPDATE mode;
+                           ERR_READID:   read id fail;
+                           ERR_ERASE:     erase chip fail;
+                           ERR_STATUS:   status error;
+                           ERR_ECC:        ecc error.
+************************************************************************/
+E_UPGRADE_ERR_TYPE  fts_ctpm_fw_upgrade(u8* pbt_buf, int dw_lenth)
+{
+    u8  cmd,reg_val[2] = {0};
+       u8  buffer[2] = {0};
+    u8  packet_buf[FTS_PACKET_LENGTH + 6];
+    u8  auc_i2c_write_buf[10];
+    u8  bt_ecc;
+       
+    int  j,temp,lenght,i_ret,packet_number, i = 0;
+    int  i_is_new_protocol = 0;
+       
+
+    /******write 0xaa to register 0xfc******/
+    cmd=0xaa;
+    fts_register_write(0xfc,&cmd);
+    mdelay(50);
+       
+     /******write 0x55 to register 0xfc******/
+    cmd=0x55;
+    fts_register_write(0xfc,&cmd);
+    FTprintk("[TSP] Step 1: Reset CTPM test\n");
+   
+    mdelay(10);   
+
+
+    /*******Step 2:Enter upgrade mode ****/
+    FTprintk("\n[TSP] Step 2:enter new update mode\n");
+    auc_i2c_write_buf[0] = 0x55;
+    auc_i2c_write_buf[1] = 0xaa;
+    do
+    {
+        i ++;
+        i_ret = fts_i2c_txdata(auc_i2c_write_buf, 2);
+        mdelay(5);
+    }while(i_ret <= 0 && i < 10 );
+
+    if (i > 1)
+    {
+        i_is_new_protocol = 1;
+    }
+
+    /********Step 3:check READ-ID********/        
+    cmd_write(0x90,0x00,0x00,0x00,4);
+    byte_read(reg_val,2);
+    if (reg_val[0] == 0x79 && reg_val[1] == 0x3)
+    {
+        FTprintk("[TSP] Step 3: CTPM ID,ID1 = 0x%x,ID2 = 0x%x\n",reg_val[0],reg_val[1]);
+    }
+    else
+    {
+        return ERR_READID;
+        //i_is_new_protocol = 1;
+    }
+    
+
+     /*********Step 4:erase app**********/
+    if (i_is_new_protocol)
+    {
+        cmd_write(0x61,0x00,0x00,0x00,1);
+    }
+    else
+    {
+        cmd_write(0x60,0x00,0x00,0x00,1);
+    }
+    mdelay(1500);
+    FTprintk("[TSP] Step 4: erase. \n");
+
+
+
+    /*Step 5:write firmware(FW) to ctpm flash*/
+    bt_ecc = 0;
+    FTprintk("[TSP] Step 5: start upgrade. \n");
+    dw_lenth = dw_lenth - 8;
+    packet_number = (dw_lenth) / FTS_PACKET_LENGTH;
+    packet_buf[0] = 0xbf;
+    packet_buf[1] = 0x00;
+       FTprintk("[TSP]  packet_number = %d\n",packet_number);
+    for (j=0;j<packet_number;j++)
+    {
+        temp = j * FTS_PACKET_LENGTH;
+        packet_buf[2] = (u8)(temp>>8);
+        packet_buf[3] = (u8)temp;
+        lenght = FTS_PACKET_LENGTH;
+        packet_buf[4] = (u8)(lenght>>8);
+        packet_buf[5] = (u8)lenght;
+
+        for (i=0;i<FTS_PACKET_LENGTH;i++)
+        {
+            packet_buf[6+i] = pbt_buf[j*FTS_PACKET_LENGTH + i]; 
+            bt_ecc ^= packet_buf[6+i];
+        }
+        
+        byte_write(&packet_buf[0],FTS_PACKET_LENGTH + 6);
+        mdelay(FTS_PACKET_LENGTH/6 + 1);
+        if ((j * FTS_PACKET_LENGTH % 1024) == 0)
+        {
+              FTprintk("[TSP] upgrade the 0x%x th byte.\n", ((unsigned int)j) * FTS_PACKET_LENGTH);
+        }
+    }
+
+    if ((dw_lenth) % FTS_PACKET_LENGTH > 0)
+    {
+        temp = packet_number * FTS_PACKET_LENGTH;
+        packet_buf[2] = (u8)(temp>>8);
+        packet_buf[3] = (u8)temp;
+
+        temp = (dw_lenth) % FTS_PACKET_LENGTH;
+        packet_buf[4] = (u8)(temp>>8);
+        packet_buf[5] = (u8)temp;
+
+        for (i=0;i<temp;i++)
+        {
+            packet_buf[6+i] = pbt_buf[ packet_number*FTS_PACKET_LENGTH + i]; 
+            bt_ecc ^= packet_buf[6+i];
+        }
+
+        byte_write(&packet_buf[0],temp+6);    
+        mdelay(20);
+    }
+
+    /***********send the last six byte**********/
+    for (i = 0; i<6; i++)
+    {
+        temp = 0x6ffa + i;
+        packet_buf[2] = (u8)(temp>>8);
+        packet_buf[3] = (u8)temp;
+        temp =1;
+        packet_buf[4] = (u8)(temp>>8);
+        packet_buf[5] = (u8)temp;
+        packet_buf[6] = pbt_buf[ dw_lenth + i]; 
+        bt_ecc ^= packet_buf[6];
+
+        byte_write(&packet_buf[0],7);  
+        mdelay(20);
+    }
+
+    /********send the opration head************/
+    cmd_write(0xcc,0x00,0x00,0x00,1);
+    byte_read(reg_val,1);
+    FTprintk("[TSP] Step 6:  ecc read 0x%x, new firmware 0x%x. \n", reg_val[0], bt_ecc);
+    if(reg_val[0] != bt_ecc)
+    {
+        return ERR_ECC;
+    }
+
+    /*******Step 7: reset the new FW**********/
+    cmd_write(0x07,0x00,0x00,0x00,1);
+       mdelay(100);//100ms     
+       fts_register_read(0xfc, buffer, 1);     
+       if (buffer[0] == 1)
+       {
+       cmd=4;
+       fts_register_write(0xfc, &cmd);
+       mdelay(2500);//2500ms   
+        do     
+        {      
+        fts_register_read(0xfc, buffer, 1);    
+        mdelay(100);//100ms    
+        }while (buffer[0] != 1);                       
+       }
+    return ERR_OK;
+}
+
+
+/***********************************************************************/
+
+int fts_ctpm_fw_upgrade_with_i_file(void)
+{
+   u8*     pbt_buf = 0;
+   int i_ret;
+    
+   pbt_buf = CTPM_FW;
+   i_ret =  fts_ctpm_fw_upgrade(pbt_buf,sizeof(CTPM_FW));
+   
+   return i_ret;
+}
+
+/***********************************************************************/
+
+unsigned char fts_ctpm_get_upg_ver(void)
+{
+    unsigned int ui_sz;
+       
+    ui_sz = sizeof(CTPM_FW);
+    if (ui_sz > 2)
+    {
+        return CTPM_FW[ui_sz - 2];
+    }
+    else
+        return 0xff; 
+ 
+}
+
+/*read the it7260 register ,used i2c bus*/
+static int ft5306_read_regs(struct i2c_client *client, u8 reg, u8 *buf, unsigned len)
+{
+       int ret; 
+       ret = i2c_master_reg8_recv(client, reg, buf, len, FT5306_IIC_SPEED);
+       return ret; 
+}
+
+/* set the it7260 registe,used i2c bus*/
+static int ft5306_set_regs(struct i2c_client *client, u8 reg, u8 *buf, unsigned short len)
+{
+       int ret; 
+       ret = i2c_master_reg8_send(client, reg, buf, (int)len, FT5306_IIC_SPEED);
+       return ret;
+}
+
+static void ft5306_queue_work(struct work_struct *work)
+{
+       struct ft5x0x_ts_data *data = container_of(work, struct ft5x0x_ts_data, pen_event_work);
+       struct tp_event event;
+       u8 start_reg=0x0;
+       u8 buf[32] = {0};
+       int ret,i,offset,points;
+       static u8 points_last_flag[MAX_POINT]={0};
+       struct tp_event  current_events[MAX_POINT];
+               
+#if CONFIG_FT5X0X_MULTITOUCH
+       ret = ft5306_read_regs(data->client,start_reg, buf, 6*MAX_POINT+1);
+#else
+       ret = ft5306_read_regs(data->client,start_reg, buf, 7);
+#endif
+       if (ret < 0) {
+               dev_err(&data->client->dev, "ft5306_read_regs fail:%d!\n",ret);
+               enable_irq(data->irq);
+               return;
+       }
+#if 0
+       for (i=0; i<32; i++) {
+               FTprintk("buf[%d] = 0x%x \n", i, buf[i]);
+       }
+#endif
+       
+       points = buf[2] & 0x07;
+       //dev_info(&data->client->dev, "ft5306_read_and_report_data points = %d\n",points);
+       if (points == 0) {
+#if   CONFIG_FT5X0X_MULTITOUCH
+               //input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, 0);
+               //input_report_abs(data->input_dev, ABS_MT_WIDTH_MAJOR, 0);
+               
+               for(i=0;i<MAX_POINT;i++)
+               {
+                       if(points_last_flag[i]!=0)
+                       {
+                               printk("Point UP event.id=%d\n",i);
+                               input_mt_slot(data->input_dev, i);
+                               input_mt_report_slot_state(data->input_dev, MT_TOOL_FINGER, false);                                     
+                       }
+               }
+
+               memset(points_last_flag, 0, sizeof(points_last_flag));
+               //input_mt_sync(data->input_dev);
+#else
+               input_report_abs(data->input_dev, ABS_PRESSURE, 0);
+               input_report_key(data->input_dev, BTN_TOUCH, 0);
+#endif
+               input_sync(data->input_dev);
+               enable_irq(data->irq);
+               return; 
+       }
+       memset(&event, 0, sizeof(struct tp_event));
+#if CONFIG_FT5X0X_MULTITOUCH
+  memset(current_events, 0, sizeof(current_events));
+  
+       for(i=0;i<points;i++){
+               offset = i*6+3;
+               event.x = (((s16)(buf[offset+0] & 0x0F))<<8) | ((s16)buf[offset+1]);
+               event.y = (((s16)(buf[offset+2] & 0x0F))<<8) | ((s16)buf[offset+3]);
+               event.id = (s16)(buf[offset+2] & 0xF0)>>4;
+               event.flag = ((buf[offset+0] & 0xc0) >> 6);
+               event.pressure = 200;
+               FTprintk("x=%d, y=%d event.id=%d event.flag=%d\n",event.x,event.y,event.id,event.flag);
+               if(event.x<=SCREEN_MAX_X && event.y<=SCREEN_MAX_Y+60){
+                       //dev_info(&data->client->dev, 
+                       //      "ft5306 multiple report event[%d]:x = %d,y = %d,id = %d,flag = %d,pressure = %d\n",
+                       //      i,event.x,event.y,event.id,event.flag,event.pressure);
+               if(event.flag)
+                       memcpy(&current_events[event.id], &event, sizeof(event));
+                       //points_current[event.id] = event.flag;                        
+               }
+       }
+       
+       for(i=0;i<MAX_POINT;i++)
+       {
+                 if((current_events[i].flag == 0) && (points_last_flag[i] != 0))
+                       {
+               FTprintk("Point UP event.id=%d\n",i);
+                                       input_mt_slot(data->input_dev, i);
+                                       input_mt_report_slot_state(data->input_dev, MT_TOOL_FINGER, false);                                             
+                       }
+                       else  if(current_events[i].flag)        
+                       {       
+                               FTprintk("Point DN event.id=%d\n",i);
+                                       input_mt_slot(data->input_dev, i);
+                                       input_mt_report_slot_state(data->input_dev, MT_TOOL_FINGER, true);
+                                       input_report_abs(data->input_dev, ABS_MT_TOUCH_MAJOR, 1);
+                                       //input_report_abs(data->input_dev, ABS_MT_PRESSURE, event.pressure);
+                                       input_report_abs(data->input_dev, ABS_MT_POSITION_X,  current_events[i].x);
+                                       input_report_abs(data->input_dev, ABS_MT_POSITION_Y,  current_events[i].y);                                                                     
+                       }               
+                       points_last_flag[i] =   current_events[i].flag;
+       }
+#else
+       event.x = (s16)(buf[3] & 0x0F)<<8 | (s16)buf[4];
+       event.y = (s16)(buf[5] & 0x0F)<<8 | (s16)buf[6];
+       event.pressure =200;
+       input_report_abs(data->input_dev, ABS_X, event.x);
+       input_report_abs(data->input_dev, ABS_Y, event.y);
+       //input_report_abs(data->input_dev, ABS_PRESSURE, event.pressure);
+       input_report_key(data->input_dev, BTN_TOUCH, 1);
+       
+       
+       //dev_info(&data->client->dev, "ft5306 single report event:x = %d,y = %d\n",event.x,event.y);
+#endif
+       //dev_info(&data->client->dev, "ft5306 sync\n",event.x,event.y);
+       input_sync(data->input_dev);
+       enable_irq(data->irq);
+       return;
+}
+
+static irqreturn_t ft5306_interrupt(int irq, void *dev_id)
+{
+       struct ft5x0x_ts_data *ft5x0x_ts = dev_id;
+       FTprintk("[TSP]  ft5306_interrupt\n");
+       disable_irq_nosync(ft5x0x_ts->irq);
+       if (!work_pending(&ft5x0x_ts->pen_event_work)) 
+               queue_work(ft5x0x_ts->ts_workqueue, &ft5x0x_ts->pen_event_work);
+       return IRQ_HANDLED;
+}
+#ifdef CONFIG_HAS_EARLYSUSPEND
+
+static int ft5306_suspend(struct early_suspend *h)
+{
+       struct ft5x0x_ts_data *ft5x0x_ts;
+       char buf_w[1] = {3};
+       int err;
+    ft5x0x_ts = container_of(h, struct ft5x0x_ts_data, ft5306_early_suspend);
+       FTprintk("TSP ft5306_suspend\n");
+       //if (ft5x0x_ts->platform_sleep){ 
+       //      ft5x0x_ts->platform_sleep();
+       //}
+               err = ft5306_set_regs(this_client,0xA5,buf_w,1);
+       if (err>0)
+               printk("ft5306_set_regs OK!!\n");
+       disable_irq(ft5x0x_ts->irq);
+       return 0;
+}
+
+
+static int ft5306_resume(struct early_suspend *h)
+{
+       struct ft5x0x_ts_data *ft5x0x_ts;       
+       ft5x0x_ts = container_of(h, struct ft5x0x_ts_data, ft5306_early_suspend);
+       FTprintk("TSP ft5306_resume\n");
+       enable_irq(ft5x0x_ts->irq);
+       //if (ft5x0x_ts->platform_wakeup)                              
+               //ft5x0x_ts->platform_wakeup();
+       gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
+       msleep(10);
+       gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
+       return 0;
+}
+#endif
+
+static int __devexit ft5306_remove(struct i2c_client *client)
+{
+       struct ft5x0x_ts_data *ft5x0x_ts = i2c_get_clientdata(client);
+
+       free_irq(ft5x0x_ts->irq, ft5x0x_ts);
+       input_unregister_device(ft5x0x_ts->input_dev);
+       kfree(ft5x0x_ts);
+       cancel_work_sync(&ft5x0x_ts->pen_event_work);
+       destroy_workqueue(ft5x0x_ts->ts_workqueue);
+       i2c_set_clientdata(client, NULL);
+#ifdef CONFIG_HAS_EARLYSUSPEND
+    unregister_early_suspend(&ft5x0x_ts->ft5306_early_suspend);
+#endif 
+    this_client = NULL;
+       return 0;
+}
+
+static int  ft5306_probe(struct i2c_client *client ,const struct i2c_device_id *id)
+{
+       struct ft5x0x_ts_data *ft5x0x_ts;
+       struct input_dev *input_dev;
+       struct ft5406_platform_data *pdata = client->dev.platform_data;
+       int err = 0;
+       int ret = 0;
+       int retry = 0;
+       u8 buf_w[1];
+       u8 buf_r[1];
+       const u8 buf_test[1] = {0};
+    unsigned char reg_value;
+    unsigned char reg_version;
+
+       dev_info(&client->dev, "ft5306_ts_probe!\n");
+       if (!pdata) {
+               dev_err(&client->dev, "platform data is required!\n");
+               return -EINVAL;
+       }
+
+       if (pdata->init_platform_hw)                              
+               pdata->init_platform_hw();
+       if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)){
+               dev_err(&client->dev, "Must have I2C_FUNC_I2C.\n");
+               return -ENODEV;
+       }
+       
+       ft5x0x_ts = kzalloc(sizeof(*ft5x0x_ts), GFP_KERNEL);
+       ft5x0x_ts->platform_wakeup = pdata->platform_wakeup;
+       ft5x0x_ts->platform_sleep = pdata->platform_sleep;      
+       if (!ft5x0x_ts) {
+               return -ENOMEM;
+       }
+
+       while(retry < 5)
+       {
+               ret=ft5306_set_regs(client,FT5X0X_REG_PMODE, buf_test,1);
+               if(ret > 0)break;
+               retry++;
+       }
+       if(ret <= 0)
+       {
+               FTprintk("FT5306 I2C TEST ERROR!\n");
+               err = -ENODEV;
+               goto exit_i2c_test_fail;
+       }
+       
+       input_dev = input_allocate_device();
+       if (!input_dev) {
+               err = -ENOMEM;
+               FTprintk("failed to allocate input device\n");
+               goto exit_input_dev_alloc_failed;
+       }
+       ft5x0x_ts->client = this_client = client;
+       ft5x0x_ts->irq = client->irq;
+       ft5x0x_ts->input_dev = input_dev;
+
+  #if   CONFIG_FT5X0X_MULTITOUCH
+       __set_bit(INPUT_PROP_DIRECT, input_dev->propbit);
+       __set_bit(EV_ABS, input_dev->evbit);    
+
+       input_mt_init_slots(input_dev, MAX_POINT);
+       input_set_abs_params(input_dev, ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0);      
+       input_set_abs_params(input_dev, ABS_MT_POSITION_X, 0, SCREEN_MAX_X, 0, 0);
+       input_set_abs_params(input_dev, ABS_MT_POSITION_Y, 0, SCREEN_MAX_Y, 0, 0);
+       //input_set_abs_params(input_dev, ABS_MT_TRACKING_ID, 0, MAX_POINT, 0, 0);
+       //input_set_abs_params(input_dev, ABS_MT_PRESSURE, 0, 255, 0, 0);
+       
+#else
+       set_bit(ABS_X, input_dev->absbit);
+       set_bit(ABS_Y, input_dev->absbit);
+       set_bit(ABS_PRESSURE, input_dev->absbit);
+       set_bit(BTN_TOUCH, input_dev->keybit);
+       input_set_abs_params(input_dev, ABS_X, 0, SCREEN_MAX_X, 0, 0);
+       input_set_abs_params(input_dev, ABS_Y, 0, SCREEN_MAX_Y, 0, 0);
+       //input_set_abs_params(input_dev, ABS_PRESSURE, 0, PRESS_MAX, 0 , 0);
+#endif
+
+       //input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); 
+       //input_dev->keybit[BIT_WORD(BTN_START)] = BIT_MASK(BTN_START);
+       //set_bit(EV_ABS, input_dev->evbit);
+       //set_bit(EV_KEY, input_dev->evbit);
+       
+       input_dev->name         = "ft5x0x_ts-touchscreen";              //dev_name(&client->dev)
+       err = input_register_device(input_dev);
+       if (err) {
+               FTprintk("ft5306_ts_probe: failed to register input device: \n");
+               goto exit_input_register_device_failed;
+       }
+
+       if (!ft5x0x_ts->irq) {
+               err = -ENODEV;
+               dev_err(&ft5x0x_ts->client->dev, "no IRQ?\n");
+               goto exit_no_irq_fail;
+       }else{
+               ft5x0x_ts->irq = gpio_to_irq(ft5x0x_ts->irq);
+       }
+
+       INIT_WORK(&ft5x0x_ts->pen_event_work, ft5306_queue_work);
+       ft5x0x_ts->ts_workqueue = create_singlethread_workqueue("ft5x0x_ts");
+       if (!ft5x0x_ts->ts_workqueue) {
+               err = -ESRCH;
+               goto exit_create_singlethread;
+       }
+
+       /***wait CTP to bootup normally***/
+       msleep(200); 
+#if 1  //write firmware 
+       fts_register_read(FT5X0X_REG_FIRMID, &reg_version,1);
+       FTprintk("[TSP] firmware version = 0x%2x\n", reg_version);
+       if (fts_ctpm_get_upg_ver() != reg_version)  
+       {
+         FTprintk("[TSP] start upgrade new verison 0x%2x\n", fts_ctpm_get_upg_ver());
+         msleep(200);
+         err =  fts_ctpm_fw_upgrade_with_i_file();
+         if (err == 0)
+         {
+                 FTprintk("[TSP] ugrade successfuly.\n");
+                 msleep(300);
+                 fts_register_read(FT5X0X_REG_FIRMID, &reg_value,1);
+                 FTprintk("FTS_DBG from old version 0x%2x to new version = 0x%2x\n", reg_version, reg_value);
+         }
+         else
+         {
+                 FTprintk("[TSP]  ugrade fail err=%d, line = %d.\n",err, __LINE__);
+         }
+         msleep(4000);
+       }
+#endif
+       ret = request_irq(ft5x0x_ts->irq, ft5306_interrupt, IRQF_TRIGGER_FALLING, client->dev.driver->name, ft5x0x_ts);
+       if (ret < 0) {
+               dev_err(&client->dev, "irq %d busy?\n", ft5x0x_ts->irq);
+               goto exit_irq_request_fail;
+       }
+       i2c_set_clientdata(client, ft5x0x_ts);
+#ifdef CONFIG_HAS_EARLYSUSPEND
+       ft5x0x_ts->ft5306_early_suspend.suspend =ft5306_suspend;
+       ft5x0x_ts->ft5306_early_suspend.resume =ft5306_resume;
+       ft5x0x_ts->ft5306_early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 1;;
+       register_early_suspend(&ft5x0x_ts->ft5306_early_suspend);
+#endif
+       buf_w[0] = 6;
+       err = ft5306_set_regs(client,0x88,buf_w,1);
+       buf_r[0] = 0;
+       err = ft5306_read_regs(client,0x88,buf_r,1);
+       FTprintk("read buf[0x88] = %d\n", buf_r[0]);
+    return 0;
+
+       i2c_set_clientdata(client, NULL);
+       free_irq(ft5x0x_ts->irq,ft5x0x_ts);
+exit_irq_request_fail:
+       cancel_work_sync(&ft5x0x_ts->pen_event_work);
+       destroy_workqueue(ft5x0x_ts->ts_workqueue);
+exit_create_singlethread:
+exit_no_irq_fail:
+       input_unregister_device(input_dev);
+exit_input_register_device_failed:
+       input_free_device(input_dev);
+exit_input_dev_alloc_failed:
+exit_i2c_test_fail:
+       if (pdata->exit_platform_hw)                              
+               pdata->exit_platform_hw();
+       kfree(ft5x0x_ts);
+       return err;
+}
+
+
+
+static struct i2c_device_id ft5306_idtable[] = {
+       { FT5X0X_NAME, 0 },
+       { }
+};
+
+MODULE_DEVICE_TABLE(i2c, ft5306_idtable);
+
+static struct i2c_driver ft5306_driver  = {
+       .driver = {
+               .owner  = THIS_MODULE,
+               .name   = FT5X0X_NAME
+       },
+       .id_table       = ft5306_idtable,
+       .probe      = ft5306_probe,
+    .suspend   = ft5306_suspend,
+       .resume     = ft5306_resume,
+       .remove         = __devexit_p(ft5306_remove),
+};
+
+static int __init ft5306_ts_init(void)
+{
+       return i2c_add_driver(&ft5306_driver);
+}
+
+static void __exit ft5306_ts_exit(void)
+{
+       FTprintk("Touchscreen driver of ft5306 exited.\n");
+       i2c_del_driver(&ft5306_driver);
+}
+
+
+/***********************************************************************/
+
+module_init(ft5306_ts_init);
+module_exit(ft5306_ts_exit);
+
+MODULE_AUTHOR("<wenfs@Focaltech-systems.com>");
+MODULE_DESCRIPTION("FocalTech ft5x0x TouchScreen driver");
+

diff --git a/drivers/input/touchscreen/ft_app_5306.i b/drivers/input/touchscreen/ft_app_5306.i
new file mode 100755 (executable)
index 0000000..b424921
--- /dev/null
+++ b/drivers/input/touchscreen/ft_app_5306.i
@@ -0,0 +1,1636 @@
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+0xa4,0xff,0xae,0xf0,0xab,0x27,0x25,0x29,0xf9,0xe5,0x28,0x3e,0xfa,0xec,0x8d,0xf0,\r
+0x2, 0x3, 0x5b,0x90,0x0, 0x2a,0x12,0x1, 0x65,0xff,0xe5,0x2c,0x75,0xf0,0x7, 0xa4,\r
+0x24,0x39,0xf5,0x82,0xe4,0x34,0xa, 0xf5,0x83,0x22,0x33,0xfe,0x74,0x36,0x2f,0xf5,\r
+0x82,0x74,0xa, 0x3e,0xf5,0x83,0x22,0x90,0x0, 0x20,0xab,0x36,0xaa,0x37,0xa9,0x38,\r
+0x2, 0x1, 0x65,0xa3,0xf0,0x75,0x24,0x1, 0x75,0x25,0x0, 0x75,0x26,0x0, 0x75,0x27,\r
+0x1, 0x75,0x28,0x0, 0x75,0x29,0x83,0x75,0x2a,0x1, 0x22,0xfc,0xfd,0xfa,0xf9,0xf8,\r
+0x12,0x3, 0x88,0x8f,0x34,0x8e,0x33,0x8d,0x32,0x8c,0x31,0x78,0x8, 0x12,0x4, 0xcc,\r
+0x8f,0x34,0x8e,0x33,0x8d,0x32,0x8c,0x31,0x22,0x90,0x0, 0x81,0x12,0x1, 0x65,0xff,\r
+0x90,0x0, 0x80,0x12,0x1, 0x65,0xfd,0x2f,0xff,0xe4,0x33,0xfe,0xe5,0x3c,0xc3,0x9f,\r
+0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x22,0xe5,0x30,0x95,0x36,0xe5,0x35,0x64,0x80,\r
+0xf8,0xe5,0x2f,0x64,0x80,0x98,0x22,0x12,0x2, 0xb7,0xff,0xe5,0xf0,0xc4,0xf8,0x54,\r
+0xf0,0xc8,0x68,0xfc,0xef,0xc4,0x54,0xf, 0x48,0xfd,0xe5,0x2e,0x75,0xf0,0x7, 0xa4,\r
+0xff,0xae,0xf0,0xab,0x21,0x25,0x23,0xf9,0x22,0x90,0x3, 0x80,0x75,0xf0,0x20,0x2, \r
+0x5, 0x40,0xa8,0x1, 0xfc,0xad,0x27,0x7b,0x1, 0x7a,0xa, 0x79,0x35,0x7e,0x0, 0x2, \r
+0x1, 0x26,0xa3,0xf0,0x75,0x24,0x1, 0x75,0x25,0x8, 0x75,0x26,0x28,0x75,0x27,0x1, \r
+0x75,0x28,0xa, 0x75,0x29,0x2d,0x7b,0x1, 0x22,0xaf,0x3d,0xef,0x33,0x95,0xe0,0xfe,\r
+0xef,0x24,0x1, 0xff,0xe4,0x3e,0xa2,0xe7,0x13,0xfe,0xef,0x13,0x22,0x7e,0x0, 0xe5,\r
+0x29,0x24,0x23,0xf9,0xe4,0x35,0x28,0xfa,0xe9,0x2f,0xf9,0xee,0x3a,0xfa,0x22,0xe5,\r
+0x2c,0x75,0xf0,0x7, 0xa4,0x24,0x37,0xf5,0x82,0xe4,0x34,0xa, 0xf5,0x83,0x22,0xe5,\r
+0x46,0xa2,0xe7,0x13,0xfe,0xe5,0x47,0x13,0xff,0xee,0x33,0x95,0xe0,0xfd,0xfc,0x22,\r
+0x90,0x3, 0x80,0x75,0xf0,0x20,0x12,0x5, 0x40,0x75,0xf0,0x2, 0xe5,0x24,0x22,0xab,\r
+0x27,0xe5,0x29,0x24,0x4f,0xf9,0xe4,0x35,0x28,0xfa,0x2, 0x1, 0x4c,0xf9,0xe4,0x3a,\r
+0xfa,0x12,0x2, 0x8c,0xc4,0xf8,0x54,0xf, 0xc8,0x68,0xff,0xe5,0xf0,0xc4,0x54,0xf0,\r
+0x48,0x8f,0xf0,0x2, 0x3, 0x3c,0x24,0xff,0xff,0xe4,0x34,0xff,0xcf,0xc3,0x95,0x3c,\r
+0xcf,0x95,0x3b,0xfe,0xd3,0xef,0x94,0x0, 0xee,0x94,0x0, 0x22,0xf9,0xe4,0x3a,0xfa,\r
+0x12,0x2, 0x8c,0xc3,0x95,0x2b,0xff,0xe5,0xf0,0x95,0x2a,0x8f,0xf0,0x2, 0x3, 0x3c,\r
+0x12,0x1, 0x65,0xc3,0x13,0xff,0x90,0xa, 0x85,0xe0,0x22,0xe5,0x3a,0x25,0xe0,0xff,\r
+0xe5,0x39,0x33,0xfe,0xab,0x2a,0xe5,0x2c,0x2f,0xf9,0xe5,0x2b,0x3e,0x22,0xf5,0x83,\r
+0xe0,0xfc,0xa3,0xe0,0xfd,0xc3,0xef,0x22,0xab,0x21,0xe5,0x23,0x2f,0xf9,0xe5,0x22,\r
+0x3e,0xfa,0x22,0x90,0x8, 0x1d,0x74,0x1, 0xf0,0xa3,0x74,0xb, 0xf0,0x22,0xff,0x25,\r
+0xe0,0x24,0xc8,0xf5,0x82,0xe4,0x34,0xa, 0x22,0xe9,0x24,0x80,0xf9,0xea,0x34,0x3, \r
+0xaf,0x1, 0x22,0xe9,0x24,0x30,0xf9,0xe4,0x3a,0xfa,0xe5,0x3c,0x75,0xf0,0x8, 0x22,\r
+0xe5,0x2b,0x24,0x23,0xf5,0x82,0xe4,0x35,0x2a,0xf5,0x83,0xe5,0x82,0x25,0x25,0x22,\r
+0xc3,0x13,0x75,0x3b,0x0, 0xf5,0x3c,0xd3,0x94,0x0, 0xe5,0x3b,0x94,0x0, 0x22,0xf5,\r
+0x30,0xf5,0x31,0xf5,0x32,0xf5,0x33,0xf5,0x34,0xf5,0x35,0xf5,0x36,0x22,0xfd,0xfc,\r
+0xab,0x34,0xaa,0x33,0xa9,0x32,0xa8,0x31,0xc3,0x2, 0x4, 0xbb,0x74,0x89,0x2d,0xf5,\r
+0x82,0xe4,0x34,0xa, 0xf5,0x83,0x22,0x78,0x1, 0x12,0x4, 0xcc,0xa8,0x4, 0xa9,0x5, \r
+0xaa,0x6, 0xab,0x7, 0x22,0x12,0x2, 0xb7,0xd3,0x9d,0xe5,0xf0,0x9c,0xe5,0x2d,0x75,\r
+0xf0,0x7, 0x22,0xe0,0xff,0xa3,0xe0,0x90,0x0, 0x5, 0xcf,0x8f,0xf0,0x2, 0x3, 0x5b,\r
+0xff,0xe9,0x24,0x58,0xf9,0xe4,0x3a,0xfa,0xe9,0x2f,0xf9,0xea,0x3e,0x22,0x90,0x0, \r
+0x52,0xe4,0x12,0x1, 0xd7,0x90,0x0, 0x53,0x22,0xff,0xc3,0xe5,0x2b,0x9f,0xe5,0x2a,\r
+0x9e,0x22,0x90,0x0, 0x10,0x12,0x1, 0x65,0xc3,0x13,0x90,0xa, 0x85,0xf0,0x22,0x12,\r
+0x1, 0xd7,0x90,0x0, 0x80,0x22,0x75,0x27,0x1, 0x75,0x28,0x0, 0x75,0x29,0x0, 0x75,\r
+0x2a,0x1, 0x22,0xc3,0x13,0x24,0x37,0xf5,0x82,0xe4,0x34,0xb, 0xf5,0x83,0xe0,0x22,\r
+0x74,0xb, 0x25,0x2c,0xf5,0x82,0xe4,0x34,0xb, 0xf5,0x83,0xe0,0x22,0x12,0x17,0xd4,\r
+0x8e,0x2a,0x8f,0x2b,0xe5,0x2b,0xa8,0x2c,0x8, 0x22,0x74,0x7f,0xf0,0xa3,0x74,0xff,\r
+0xf0,0x22,0x7e,0x0, 0x7f,0x23,0x2, 0x1, 0x26,0x12,0x2, 0xb7,0xac,0xf0,0xc3,0x9f,\r
+0x22,0x33,0xfe,0xed,0x33,0x95,0xe0,0xfc,0xd3,0xed,0x9f,0xee,0x22,0xab,0x33,0xe5,\r
+0x35,0x24,0x80,0xf9,0xe5,0x34,0x34,0x3, 0x22,0xab,0x21,0xe5,0x23,0x24,0xa, 0xf9,\r
+0xe4,0x35,0x22,0xfa,0x22,0x74,0x85,0x2f,0xf5,0x82,0x74,0xa, 0x3e,0xf5,0x83,0x22,\r
+0xab,0x27,0xe5,0x29,0x24,0x23,0xf9,0xe4,0x35,0x28,0x22,0x12,0x0, 0x6, 0xc3,0xef,\r
+0x94,0xa, 0xee,0x64,0x80,0x22,0x74,0x86,0x2f,0xf5,0x82,0x74,0xa, 0x3e,0xf5,0x83,\r
+0x22,0x12,0x1, 0xd7,0x90,0x0, 0x81,0xe4,0x2, 0x1, 0xd7,0x12,0x2, 0xb7,0xc3,0x9f,\r
+0xff,0xe5,0xf0,0x9e,0xfe,0x22,0x2d,0xfd,0xee,0x3c,0xfc,0xc3,0x64,0x80,0x94,0x80,\r
+0x22,0x12,0x2, 0xb7,0xff,0xe5,0x2b,0x22,0x12,0x1, 0x4c,0xfd,0x12,0x0, 0x4e,0xe5,\r
+0x2c,0x22,0x90,0x0, 0x2d,0x75,0xf0,0x2, 0x22,0x74,0xa, 0x3e,0xf5,0x83,0xed,0xf0,\r
+0x5, 0x2d,0x22,0x3e,0xf5,0x83,0xec,0x8d,0xf0,0x2, 0x2, 0x60,0xe5,0x3c,0x25,0xe0,\r
+0xff,0xe5,0x3b,0x33,0xfe,0x22,0x90,0x0, 0x86,0x2, 0x1, 0x65,0x8b,0x27,0x8a,0x28,\r
+0x89,0x29,0x22,0xf5,0x82,0xe4,0x34,0xb, 0xf5,0x83,0xe4,0xf0,0x22,0x75,0x24,0x1, \r
+0x75,0x25,0xa, 0x75,0x26,0x2d,0x22,0x8b,0x21,0x8a,0x22,0x89,0x23,0xe4,0xf5,0x24,\r
+0x22,0xed,0x12,0x1, 0xd7,0x5, 0x2e,0xe5,0x2e,0x22,0x12,0x1, 0x4c,0xff,0xe5,0x2d,\r
+0xc3,0x9f,0x22,0x9d,0xff,0xee,0x9c,0xfe,0x2, 0x0, 0x6, 0xe5,0x3a,0x25,0xe0,0xff,\r
+0xe5,0x39,0x33,0x22,0xfe,0xa3,0xe0,0xff,0x12,0x0, 0x6, 0xd3,0x22,0xfe,0xa3,0xe0,\r
+0xff,0xc3,0xed,0x9f,0xee,0x22,0xe5,0x26,0x24,0xa, 0xf9,0xe4,0x35,0x25,0x22,0xe5,\r
+0x29,0x24,0x26,0xf9,0xe4,0x35,0x28,0x22,0x90,0x0, 0x80,0x12,0x1, 0x65,0xfd,0x22,\r
+0xe0,0xfc,0xa3,0xe0,0xc3,0x9f,0xec,0x22,0xe0,0xfc,0xa3,0xe0,0xd3,0x9f,0xec,0x22,\r
+0xee,0xf0,0xa3,0xef,0xf0,0x5, 0x2c,0x22,0x74,0x36,0x2d,0xf5,0x82,0x74,0xa, 0x22,\r
+0x90,0x0, 0x9, 0x12,0x2, 0xb7,0xfd,0x22,0x8f,0x82,0xf5,0x83,0x2, 0x1, 0x65,0xe5,\r
+0x3e,0x24,0x1, 0xff,0xe4,0x33,0x22,0xe5,0x30,0x25,0xe0,0xff,0xe5,0x2f,0x22,0xfd,\r
+0x12,0x0, 0x4e,0xe4,0xf5,0x2c,0x22,0xff,0xab,0x29,0xe5,0x2b,0x24,0x1c,0x22,0x12,\r
+0x1, 0x65,0xc3,0x13,0xf5,0x41,0x22,0x74,0x21,0xf0,0xa3,0x74,0x34,0xf0,0x22,0x66,\r
+0x2f,0x99,0xd0,0xb0,0x4f,0x5, 0xfa,
\ No newline at end of file

diff --git a/drivers/video/display/screen/Kconfig b/drivers/video/display/screen/Kconfig
old mode 100755 (executable)
new mode 100644 (file)
index 2ec2120..93b615a
--- a/drivers/video/display/screen/Kconfig
+++ b/drivers/video/display/screen/Kconfig
@@ -64,6 +64,8 @@ config LCD_AT070TN93
        bool "RGB AT070TN93"
 config LCD_TX23D88VM
        bool "HITACHI LVDS TX23D88VM (1200x800)"
+config LCD_A050VL01
+       bool "RGB A050VL01"
 endchoice
 
 

diff --git a/drivers/video/display/screen/Makefile b/drivers/video/display/screen/Makefile
old mode 100755 (executable)
new mode 100644 (file)
index 0abb52a..fb11119
--- a/drivers/video/display/screen/Makefile
+++ b/drivers/video/display/screen/Makefile
@@ -33,3 +33,4 @@ obj-$(CONFIG_LCD_MCU_TFT480800_25_E) += lcd_mcu_tft480800_25_e.o
 obj-$(CONFIG_LCD_AT070TNA2)    += lcd_AT070TNA2.o
 obj-$(CONFIG_LCD_TX23D88VM) += lcd_tx23d88vm.o
 obj-$(CONFIG_LCD_AT070TN93)    += lcd_at070tn93.o
+obj-$(CONFIG_LCD_A050VL01)    += lcd_A050VL01.o

diff --git a/drivers/video/display/screen/lcd_A050VL01.c b/drivers/video/display/screen/lcd_A050VL01.c
new file mode 100644 (file)
index 0000000..030eefa
--- /dev/null
+++ b/drivers/video/display/screen/lcd_A050VL01.c
@@ -0,0 +1,348 @@
+/* This Lcd Driver is HSD070IDW1 write by cst 2009.10.27 */
+#include <linux/fb.h>
+#include <linux/delay.h>
+#include "../../rk29_fb.h"
+#include <mach/gpio.h>
+#include <mach/iomux.h>
+#include <mach/board.h>
+#include "screen.h"
+
+
+/* Base */
+#define OUT_TYPE               SCREEN_RGB
+#define OUT_FACE               OUT_P888
+#define OUT_CLK                        23500000
+#define LCDC_ACLK       150000000     //29 lcdc axi DMA ƵÂÊ
+
+/* Timing */
+#define H_PW                   2
+#define H_BP                   2
+#define H_VD                   480
+#define H_FP                   2
+
+#define V_PW                   2
+#define V_BP                   2
+#define V_VD                   800 
+#define V_FP                   2
+
+/* Other */
+#define DCLK_POL               1
+#define SWAP_RB                        0
+
+#define LCD_WIDTH       480    //need modify
+#define LCD_HEIGHT      800
+
+#if 1
+#define RXD_PORT        RK29_PIN2_PC7
+#define TXD_PORT        gLcd_info->txd_pin
+#define CLK_PORT        gLcd_info->clk_pin
+#define CS_PORT         gLcd_info->cs_pin
+#define RESET_PORT      RK29_PIN6_PC6
+
+#define CS_OUT()        gpio_direction_output(CS_PORT, 1)
+#define CS_SET()        gpio_set_value(CS_PORT, GPIO_HIGH)
+#define CS_CLR()        gpio_set_value(CS_PORT, GPIO_LOW)
+#define CLK_OUT()       gpio_direction_output(CLK_PORT, 0) 
+#define CLK_SET()       gpio_set_value(CLK_PORT, GPIO_HIGH)
+#define CLK_CLR()       gpio_set_value(CLK_PORT, GPIO_LOW)
+#define TXD_OUT()       gpio_direction_output(TXD_PORT, 1)   
+#define TXD_SET()       gpio_set_value(TXD_PORT, GPIO_HIGH)
+#define TXD_CLR()       gpio_set_value(TXD_PORT, GPIO_LOW)
+#define RXD_IN()        gpio_direction_input(RXD_PORT)
+#define RXD_GET()          gpio_get_value(RXD_PORT)
+#endif
+
+static struct rk29lcd_info *gLcd_info = NULL;
+
+#define DRVDelayUs(i)   udelay(i*4)
+
+int init(void);
+int standby(u8 enable);
+
+void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
+{
+    /* screen type & face */
+    screen->type = OUT_TYPE;
+    screen->face = OUT_FACE;
+
+    /* Screen size */
+    screen->x_res = H_VD;
+    screen->y_res = V_VD;
+
+    screen->width = LCD_WIDTH;
+    screen->height = LCD_HEIGHT;
+
+    /* Timing */
+    screen->lcdc_aclk = LCDC_ACLK;
+    screen->pixclock = OUT_CLK;
+       screen->left_margin = H_BP;
+       screen->right_margin = H_FP;
+       screen->hsync_len = H_PW;
+       screen->upper_margin = V_BP;
+       screen->lower_margin = V_FP;
+       screen->vsync_len = V_PW;
+
+       /* Pin polarity */
+       screen->pin_hsync = 0;
+       screen->pin_vsync = 0;
+       screen->pin_den = 0;
+       screen->pin_dclk = DCLK_POL;
+
+       /* Swap rule */
+    screen->swap_rb = SWAP_RB;
+    screen->swap_rg = 0;
+    screen->swap_gb = 0;
+    screen->swap_delta = 0;
+    screen->swap_dumy = 0;
+
+    /* Operation function*/
+    screen->init = init;
+    /*screen->init = NULL;*/
+    screen->standby = standby;
+    if(lcd_info)
+        gLcd_info = lcd_info;
+}
+//cannot need init,so set screen->init = null at rk29_fb.c file
+
+#if 1
+void spi_screenreg_command(u16 command)
+{
+    u8 i,buff;
+
+    TXD_OUT();
+    CLK_OUT();
+    CS_OUT();
+    DRVDelayUs(2);
+    DRVDelayUs(2);
+
+    CS_SET();
+    TXD_SET();
+    CLK_SET();
+    DRVDelayUs(2);
+
+    buff = 0x20;
+    CS_CLR();
+    for(i = 0; i < 8; i++)
+    {
+        if(buff & (1<<(7-i)))
+            TXD_SET();
+        else
+            TXD_CLR();
+        CLK_CLR();
+               DRVDelayUs(2);
+               CLK_SET();
+               DRVDelayUs(2);
+    }
+    
+       for(i = 0; i < 8; i++)  //reg hight
+       {
+               if(command &(1<<(15-i)))
+                       TXD_SET();
+               else
+                       TXD_CLR();
+               CLK_CLR();
+               DRVDelayUs(2);
+               CLK_SET();
+               DRVDelayUs(2);
+       }
+    CS_SET();
+    CLK_CLR();
+       TXD_CLR();
+       DRVDelayUs(2);
+
+       buff = 0x00;
+    CS_CLR();
+    for(i = 0; i < 8; i++)
+    {
+        if(buff & (1<<(7-i)))
+            TXD_SET();
+        else
+            TXD_CLR();
+        CLK_CLR();
+               DRVDelayUs(2);
+               CLK_SET();
+               DRVDelayUs(2);
+    }
+    
+       for(i = 8; i < 16; i++)  //reg low
+       {
+               if(command &(1<<(15-i)))
+                       TXD_SET();
+               else
+                       TXD_CLR();
+               CLK_CLR();
+               DRVDelayUs(2);
+               CLK_SET();
+               DRVDelayUs(2);
+       }
+       CS_SET();
+       CLK_CLR();
+       TXD_CLR();
+       DRVDelayUs(2);
+}
+void spi_screenreg_command_data(u16 Addr, u16 Data)
+{
+    u8 i,buff;
+
+    TXD_OUT();
+    CLK_OUT();
+    CS_OUT();
+    DRVDelayUs(2);
+    DRVDelayUs(2);
+
+    CS_SET();
+    TXD_SET();
+    CLK_SET();
+    DRVDelayUs(2);
+
+    buff = 0x20;
+    CS_CLR();
+    for(i = 0; i < 8; i++)
+    {
+        if(buff & (1<<(7-i)))
+            TXD_SET();
+        else
+            TXD_CLR();
+        CLK_CLR();
+               DRVDelayUs(2);
+               CLK_SET();
+               DRVDelayUs(2);
+    }
+    
+       for(i = 0; i < 8; i++)  //reg hight
+       {
+               if(Addr &(1<<(15-i)))
+                       TXD_SET();
+               else
+                       TXD_CLR();
+               CLK_CLR();
+               DRVDelayUs(2);
+               CLK_SET();
+               DRVDelayUs(2);
+       }
+    CS_SET();
+    CLK_CLR();
+       TXD_CLR();
+       DRVDelayUs(2);
+
+       buff = 0x00;
+    CS_CLR();
+    for(i = 0; i < 8; i++)
+    {
+        if(buff & (1<<(7-i)))
+            TXD_SET();
+        else
+            TXD_CLR();
+        CLK_CLR();
+               DRVDelayUs(2);
+               CLK_SET();
+               DRVDelayUs(2);
+    }
+    
+       for(i = 8; i < 16; i++)  //reg low
+       {
+               if(Addr &(1<<(15-i)))
+                       TXD_SET();
+               else
+                       TXD_CLR();
+               CLK_CLR();
+               DRVDelayUs(2);
+               CLK_SET();
+               DRVDelayUs(2);
+       }
+    CS_SET();
+    CLK_CLR();
+       TXD_CLR();
+       DRVDelayUs(2);
+
+       buff = 0x40;
+    CS_CLR();
+    for(i = 0; i < 8; i++)
+    {
+        if(buff & (1<<(7-i)))
+            TXD_SET();
+        else
+            TXD_CLR();
+        CLK_CLR();
+               DRVDelayUs(2);
+               CLK_SET();
+               DRVDelayUs(2);
+    }
+
+       for(i = 0; i < 8; i++)  //data
+       {
+               if(Data &(1<<(7-i)))
+                       TXD_SET();
+               else
+                       TXD_CLR();
+        CLK_CLR();
+               DRVDelayUs(2);
+               CLK_SET();
+               DRVDelayUs(2);
+       }
+
+       CS_SET();
+       CLK_CLR();
+       TXD_CLR();
+       DRVDelayUs(2);
+
+}
+
+int init(void)
+{
+    if(gLcd_info)
+        gLcd_info->io_init();
+        
+#ifdef RESET_PORT
+    gpio_request(RESET_PORT, NULL);
+    gpio_direction_output(RESET_PORT, 0);
+    mdelay(2);
+    gpio_set_value(RESET_PORT, 1);
+    mdelay(10);
+    gpio_free(RESET_PORT);
+#endif
+
+    spi_screenreg_command(0x1100);
+    spi_screenreg_command_data(0xC000,0x8a);
+    spi_screenreg_command_data(0xC002,0x8a);
+    spi_screenreg_command_data(0xC200,0x02);
+    spi_screenreg_command_data(0xC202,0x32);
+    spi_screenreg_command_data(0xC100,0x40);
+    spi_screenreg_command_data(0xC700,0x8b);
+    mdelay(200);
+    spi_screenreg_command(0x2900);
+    spi_screenreg_command(0x2C00);
+    
+    if(gLcd_info)
+        gLcd_info->io_deinit();
+    return 0;
+}
+#endif
+
+extern void rk29_lcd_spim_spin_lock(void);
+extern void rk29_lcd_spim_spin_unlock(void);
+int standby(u8 enable)
+{
+       rk29_lcd_spim_spin_lock();
+       if(gLcd_info)
+               gLcd_info->io_init();
+       if(enable) {
+#ifdef RESET_PORT
+    gpio_request(RESET_PORT, NULL);
+    gpio_direction_output(RESET_PORT, 0);
+    mdelay(2);
+    gpio_set_value(RESET_PORT, 1);
+    mdelay(10);
+    gpio_free(RESET_PORT);
+#endif
+               spi_screenreg_command(0x2800);
+               spi_screenreg_command(0x1000);
+       } else {
+               init();
+       }
+       if(gLcd_info)
+               gLcd_info->io_deinit();
+       rk29_lcd_spim_spin_unlock();        
+    return 0;
+}
+