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clk: rockchip: rk3366: add sclk_pvtm_pmu
author
Xiao Feng
<xf@rock-chips.com>
Wed, 24 Feb 2016 03:37:34 +0000
(11:37 +0800)
committer
Xiao Feng
<xf@rock-chips.com>
Wed, 24 Feb 2016 03:38:36 +0000
(11:38 +0800)
Change-Id: Id24788b8d7caca776061dd4544ac90443a6be2ad
Signed-off-by: Xiao Feng <xf@rock-chips.com>
drivers/clk/rockchip/clk-rk3366.c
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diff --git
a/drivers/clk/rockchip/clk-rk3366.c
b/drivers/clk/rockchip/clk-rk3366.c
index cead6899e6cb4c72af184f9d8889d3071a5ee515..aa76b24a29aabe5f78b8b4cfde6236967308b9aa 100644
(file)
--- a/
drivers/clk/rockchip/clk-rk3366.c
+++ b/
drivers/clk/rockchip/clk-rk3366.c
@@
-425,6
+425,8
@@
static struct rockchip_clk_branch rk3366_clk_branches[] __initdata = {
COMPOSITE_NOMUX(0, "pclk_pd_pmu", "gpll", CLK_IGNORE_UNUSED,
RK3368_CLKSEL_CON(10), 0, 5, DFLAGS,
RK3368_CLKGATE_CON(7), 9, GFLAGS),
+ GATE(SCLK_PVTM_PMU, "sclk_pvtm_pmu", "xin24m", 0,
+ RK3368_CLKGATE_CON(7), 3, GFLAGS),
COMPOSITE(0, "sclk_gpu_core_src", mux_pll_src_cpll_gpll_usb_npll_p, 0,
RK3368_CLKSEL_CON(14), 6, 2, MFLAGS, 0, 5, DFLAGS,