UPSTREAM: clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for i2s_2ch

I2S_2CH set freq need to select parent and calculate parent freq.
so just mark it as the CLK_SET_RATE_PARENT flag.

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
 commit e8099067de751106d82333e29ce5b6a76ba653f6)

Change-Id: I1e7b75eba06fbe27079c3887170ce801da005ce0

diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c
index d276a55cbd39ae1be22c66e731a78f570b4a71c4..669a5e233caefbd6c82857003c3b0337c11907f5 100644 (file)
--- a/drivers/clk/rockchip/clk-rk3368.c
+++ b/drivers/clk/rockchip/clk-rk3368.c
@@ -362,7 +362,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
        COMPOSITE_FRAC(0, "i2s_2ch_frac", "i2s_2ch_src", CLK_SET_RATE_PARENT,
                        RK3368_CLKSEL_CON(54), 0,
                        RK3368_CLKGATE_CON(5), 14, GFLAGS),
-       COMPOSITE_NODIV(SCLK_I2S_2CH, "sclk_i2s_2ch", mux_i2s_2ch_p, 0,
+       COMPOSITE_NODIV(SCLK_I2S_2CH, "sclk_i2s_2ch", mux_i2s_2ch_p, CLK_SET_RATE_PARENT,
                        RK3368_CLKSEL_CON(53), 8, 2, MFLAGS,
                        RK3368_CLKGATE_CON(5), 15, GFLAGS),