SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), MVT::i32);
return DAG.getMemcpy(Chain, dl, Dst, Src, SizeNode, Flags.getByValAlign(),
- /*isVolatile*/false, /*AlwaysInline=*/false,
+ /*isVolatile*/false, /*AlwaysInline=*/true,
MachinePointerInfo(), MachinePointerInfo());
}
+++ /dev/null
-; RUN: llc < %s -march=x86-64 | FileCheck %s
-; RUN: llc < %s -march=x86 | FileCheck %s
-; CHECK: memcpy
-define void @foo([40000 x i32] *%P) nounwind {
- call void @bar([40000 x i32] * byval align 1 %P)
- ret void
-}
-
-declare void @bar([40000 x i32] *%P )
-
-; RUN: llc < %s -march=x86-64 | egrep {rep.movsq|memcpy} | count 2
-; RUN: llc < %s -march=x86 | egrep {rep.movsl|memcpy} | count 2
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
%struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64,
i64, i64, i64, i64, i64, i64, i64, i64,
-; RUN: llc < %s -march=x86-64 | egrep {rep.movsq|memcpy} | count 2
-; RUN: llc < %s -march=x86 | egrep {rep.movsl|memcpy} | count 2
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
%struct.s = type { i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32,
-; RUN: llc < %s -march=x86-64 | egrep {rep.movsq|memcpy} | count 2
-; RUN: llc < %s -march=x86 | egrep {rep.movsl|memcpy} | count 2
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
%struct.s = type { i16, i16, i16, i16, i16, i16, i16, i16,
i16, i16, i16, i16, i16, i16, i16, i16,
-; RUN: llc < %s -march=x86-64 | egrep {rep.movsq|memcpy} | count 2
-; RUN: llc < %s -march=x86 | egrep {rep.movsl|memcpy} | count 2
+; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2
+; RUN: llc < %s -march=x86 | grep rep.movsl | count 2
%struct.s = type { i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
entry:
; CHECK: main:
; CHECK: movl $1, (%esp)
-; CHECK: movl ${{36|144}},
-; CHECK: {{rep;movsl|memcpy}}
+; CHECK: leal 16(%esp), %edi
+; CHECK: movl $36, %ecx
+; CHECK: leal 160(%esp), %esi
+; CHECK: rep;movsl
%s = alloca %struct.S ; <%struct.S*> [#uses=2]
%tmp15 = getelementptr %struct.S* %s, i32 0, i32 0 ; <<2 x i64>*> [#uses=1]
store <2 x i64> < i64 8589934595, i64 1 >, <2 x i64>* %tmp15, align 16
; RUN: llc < %s -march=x86-64 -tailcallopt | grep TAILCALL
; Expect 2 rep;movs because of tail call byval lowering.
-; RUN: llc < %s -march=x86-64 -tailcallopt | egrep {rep|memcpy} | wc -l | grep 2
+; RUN: llc < %s -march=x86-64 -tailcallopt | grep rep | wc -l | grep 2
; A sequence of copyto/copyfrom virtual registers is used to deal with byval
; lowering appearing after moving arguments to registers. The following two
; checks verify that the register allocator changes those sequences to direct