LOAD COMPLEMENT instruction is not really two-addr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76031 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SystemZ/SystemZInstrFP.td b/lib/Target/SystemZ/SystemZInstrFP.td
index 5acd5b6424ddc1cad004b5b97c85a17ec1b323e5..0c9a239972fe91b097e3bff73cfcaf55d7f85ac0 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrFP.td
+++ b/lib/Target/SystemZ/SystemZInstrFP.td
@@ -69,18 +69,19 @@ def FMOV64mry : Pseudo<(outs), (ins rriaddr:$dst, FP64:$src),
 // Arithmetic Instructions
 
 
-let isTwoAddress = 1 in {
 let Defs = [PSW] in {
-
 def FNEG32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),
-                       "lcebr\t{$dst}",
+                       "lcebr\t{$dst, $src}",
                        [(set FP32:$dst, (fneg FP32:$src)),
                         (implicit PSW)]>;
 def FNEG64rr : Pseudo<(outs FP64:$dst), (ins FP64:$src),
-                       "lcdbr\t{$dst}",
+                       "lcdbr\t{$dst, $src}",
                        [(set FP64:$dst, (fneg FP64:$src)),
                         (implicit PSW)]>;
+}
 
+let isTwoAddress = 1 in {
+let Defs = [PSW] in {
 // FIXME: Add peephole for fneg(fabs) => load negative
 
 def FABS32rr : Pseudo<(outs FP32:$dst), (ins FP32:$src),