fsample_init_smc91x();
- if (gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0)
- BUG();
+ BUG_ON(gpio_request(FSAMPLE_NAND_RB_GPIO_PIN, "NAND ready") < 0);
gpio_direction_input(FSAMPLE_NAND_RB_GPIO_PIN);
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
h2_nand_resource.end += SZ_4K - 1;
- if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
- BUG();
+ BUG_ON(gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0);
gpio_direction_input(H2_NAND_RB_GPIO_PIN);
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
nand_resource.end += SZ_4K - 1;
- if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0)
- BUG();
+ BUG_ON(gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0);
gpio_direction_input(H3_NAND_RB_GPIO_PIN);
/* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
perseus2_init_smc91x();
- if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
- BUG();
+ BUG_ON(gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0);
gpio_direction_input(P2_NAND_RB_GPIO_PIN);
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);