printk(KERN_INFO msg); \\r
} while (0)\r
\r
+#define wdt_writel(v, offset) do { writel_relaxed(v, wdt_base + offset); dsb(); } while (0)\r
\r
/* functions */\r
void rk29_wdt_keepalive(void)\r
{\r
- writel(0x76, wdt_base + RK29_WDT_CRR);\r
+ if (wdt_base)\r
+ wdt_writel(0x76, RK29_WDT_CRR);\r
}\r
\r
static void __rk29_wdt_stop(void)\r
{\r
rk29_wdt_keepalive(); //feed dog\r
- writel(0x0a, wdt_base + RK29_WDT_CR);\r
+ wdt_writel(0x0a, RK29_WDT_CR);\r
}\r
\r
-void rk29_wdt_stop(void)\r
+static void rk29_wdt_stop(void)\r
{\r
__rk29_wdt_stop();\r
clk_disable(wdt_clock);\r
torr = 15;\r
}\r
DBG("%s:%d\n", __func__, torr);\r
- writel(torr, wdt_base + RK29_WDT_TORR);\r
+ wdt_writel(torr, RK29_WDT_TORR);\r
return 0;\r
}\r
\r
-void rk29_wdt_start(void)\r
+static void rk29_wdt_start(void)\r
{\r
- unsigned long wtcon = 0;\r
+ unsigned long wtcon;\r
clk_enable(wdt_clock);\r
rk29_wdt_set_heartbeat(tmr_margin);\r
- wtcon |= (RK29_WDT_EN << 0) | (RK29_RESPONSE_MODE << 1) | (RK29_RESET_PULSE << 2);\r
- writel(wtcon, wdt_base + RK29_WDT_CR);\r
+ wtcon = (RK29_WDT_EN << 0) | (RK29_RESPONSE_MODE << 1) | (RK29_RESET_PULSE << 2);\r
+ wdt_writel(wtcon, RK29_WDT_CR);\r
}\r
\r
/*\r
WATCHDOG_MINOR, ret);\r
goto err_clk;\r
}\r
- printk("watchdog misc directory:%s\n", rk29_wdt_miscdev.nodename);\r
if (tmr_atboot && started == 0) {\r
dev_info(dev, "starting watchdog timer\n");\r
rk29_wdt_start();\r