Fix pr4058 and pr4059. Do not split i64 or double arguments between r3 and
authorBob Wilson <bob.wilson@apple.com>
Tue, 19 May 2009 10:02:36 +0000 (10:02 +0000)
committerBob Wilson <bob.wilson@apple.com>
Tue, 19 May 2009 10:02:36 +0000 (10:02 +0000)
the stack.  Patch by Sandeep Patel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72106 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMCallingConv.td
test/CodeGen/ARM/arguments-nosplit-double.ll [new file with mode: 0644]
test/CodeGen/ARM/arguments-nosplit-i64.ll [new file with mode: 0644]

index 5cba810d472cd7e9cf1aa21d9d0b9ea5ad5e05b3..6cd786eed4d55a203ff5377ff6f0f25b010da616 100644 (file)
@@ -51,11 +51,14 @@ def CC_ARM_AAPCS : CallingConv<[
 
   // i64/f64 is passed in even pairs of GPRs
   // i64 is 8-aligned i32 here, so we may need to eat R1 as a pad register
+  // (and the same is true for f64 if VFP is not enabled)
   CCIfType<[i32], CCIfAlign<"8", CCAssignToRegWithShadow<[R0, R2], [R0, R1]>>>,
   CCIfType<[f64], CCCustom<"CC_ARM_AAPCS_Custom_f64">>,
 
   CCIfType<[f32], CCBitConvertToType<i32>>,
-  CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
+  CCIfType<[i32], CCIf<"State.getNextStackOffset() == 0 &&"
+                       "ArgFlags.getOrigAlign() != 8",
+                       CCAssignToReg<[R0, R1, R2, R3]>>>,
 
   CCIfType<[i32], CCAssignToStack<4, 4>>,
   CCIfType<[f64], CCAssignToStack<8, 8>>
diff --git a/test/CodeGen/ARM/arguments-nosplit-double.ll b/test/CodeGen/ARM/arguments-nosplit-double.ll
new file mode 100644 (file)
index 0000000..57ff95c
--- /dev/null
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | not grep r3
+; PR4059
+
+define i32 @f(i64 %z, i32 %a, double %b) {
+       %tmp = call i32 @g(double %b)
+       ret i32 %tmp
+}
+
+declare i32 @g(double)
diff --git a/test/CodeGen/ARM/arguments-nosplit-i64.ll b/test/CodeGen/ARM/arguments-nosplit-i64.ll
new file mode 100644 (file)
index 0000000..5464674
--- /dev/null
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-linux-gnueabi | not grep r3
+; PR4058
+
+define i32 @f(i64 %z, i32 %a, i64 %b) {
+       %tmp = call i32 @g(i64 %b)
+       ret i32 %tmp
+}
+
+declare i32 @g(i64)