gpio2 = &pioC;
tcb0 = &tcb0;
tcb1 = &tcb1;
+ i2c0 = &i2c0;
};
cpus {
cpu@0 {
status = "disabled";
};
+ i2c0: i2c@fffac000 {
+ compatible = "atmel,at91sam9260-i2c";
+ reg = <0xfffac000 0x100>;
+ interrupts = <11 4 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
adc0: adc@fffe0000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xfffe0000 0x100>;
gpio3 = &pioD;
gpio4 = &pioE;
tcb0 = &tcb0;
+ i2c0 = &i2c0;
};
cpus {
cpu@0 {
interrupts = <24 4 2>;
status = "disabled";
};
+
+ i2c0: i2c@fff88000 {
+ compatible = "atmel,at91sam9263-i2c";
+ reg = <0xfff88000 0x100>;
+ interrupts = <13 4 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
nand0: nand@40000000 {
ahb {
apb {
+ i2c0: i2c@fffac000 {
+ compatible = "atmel,at91sam9g20-i2c";
+ };
+
adc0: adc@fffe0000 {
atmel,adc-startup-time = <40>;
};
gpio4 = &pioE;
tcb0 = &tcb0;
tcb1 = &tcb1;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
};
cpus {
cpu@0 {
status = "disabled";
};
+ i2c0: i2c@fff84000 {
+ compatible = "atmel,at91sam9g10-i2c";
+ reg = <0xfff84000 0x100>;
+ interrupts = <12 4 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@fff88000 {
+ compatible = "atmel,at91sam9g10-i2c";
+ reg = <0xfff88000 0x100>;
+ interrupts = <13 4 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
adc0: adc@fffb0000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xfffb0000 0x100>;
gpio3 = &pioD;
tcb0 = &tcb0;
tcb1 = &tcb1;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
};
cpus {
cpu@0 {
atmel,use-dma-tx;
status = "disabled";
};
+
+ i2c0: i2c@f8010000 {
+ compatible = "atmel,at91sam9x5-i2c";
+ reg = <0xf8010000 0x100>;
+ interrupts = <9 4 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@f8014000 {
+ compatible = "atmel,at91sam9x5-i2c";
+ reg = <0xf8014000 0x100>;
+ interrupts = <10 4 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
nand0: nand@40000000 {
gpio3 = &pioD;
tcb0 = &tcb0;
tcb1 = &tcb1;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
};
cpus {
cpu@0 {
status = "disabled";
};
+ i2c0: i2c@f8010000 {
+ compatible = "atmel,at91sam9x5-i2c";
+ reg = <0xf8010000 0x100>;
+ interrupts = <9 4 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@f8014000 {
+ compatible = "atmel,at91sam9x5-i2c";
+ reg = <0xf8014000 0x100>;
+ interrupts = <10 4 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@f8018000 {
+ compatible = "atmel,at91sam9x5-i2c";
+ reg = <0xf8018000 0x100>;
+ interrupts = <11 4 6>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
adc0: adc@f804c000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xf804c000 0x100>;