powerpc/booke: Separate out restore_e5500/setup_e5500 routines.
authorVarun Sethi <Varun.Sethi@freescale.com>
Mon, 9 Jul 2012 13:01:51 +0000 (18:31 +0530)
committerKumar Gala <galak@kernel.crashing.org>
Wed, 12 Sep 2012 19:57:09 +0000 (14:57 -0500)
For the 64 bit case separate out e5500 cpu_setup and cpu_restore functions.
The cpu_setup function (for the primary core) is passed the cpu_spec
pointer, which is not there in case of the cpu_restore function. Also, in
our case we will have to manipulate the CPU_FTR_EMB_HV flag on the primary
core.

Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/kernel/cpu_setup_fsl_booke.S
arch/powerpc/kernel/exceptions-64e.S

index 021822daa8f67f587dafb1c0dc779c7c1a421582..1345e1bc748a643898eb6ced7115a47b6b34d7da 100644 (file)
@@ -105,17 +105,45 @@ _GLOBAL(__setup_cpu_e5500)
        mtlr    r5
        blr
 #endif
+
 #ifdef CONFIG_PPC_BOOK3E_64
-/* Right now, restore and setup are the same thing */
 _GLOBAL(__restore_cpu_e5500)
-_GLOBAL(__setup_cpu_e5500)
        mflr    r4
        bl      __e500_icache_setup
        bl      __e500_dcache_setup
        bl      .__setup_base_ivors
        bl      .setup_perfmon_ivor
        bl      .setup_doorbell_ivors
+       /*
+        * We only want to touch IVOR38-41 if we're running on hardware
+        * that supports category E.HV.  The architectural way to determine
+        * this is MMUCFG[LPIDSIZE].
+        */
+       mfspr   r10,SPRN_MMUCFG
+       rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
+       beq     1f
        bl      .setup_ehv_ivors
+1:
        mtlr    r4
        blr
+
+_GLOBAL(__setup_cpu_e5500)
+       mflr    r5
+       bl      __e500_icache_setup
+       bl      __e500_dcache_setup
+       bl      .__setup_base_ivors
+       bl      .setup_perfmon_ivor
+       bl      .setup_doorbell_ivors
+       /*
+        * We only want to touch IVOR38-41 if we're running on hardware
+        * that supports category E.HV.  The architectural way to determine
+        * this is MMUCFG[LPIDSIZE].
+        */
+       mfspr   r10,SPRN_MMUCFG
+       rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
+       beq     1f
+       bl      .setup_ehv_ivors
+1:
+       mtlr    r5
+       blr
 #endif
index 87a82fbdf05afa1791deae718e81d4e5bfb63db2..4684e33a26c3a156ec8d7130a0776034f88c4b5b 100644 (file)
@@ -1356,25 +1356,11 @@ _GLOBAL(setup_perfmon_ivor)
 _GLOBAL(setup_doorbell_ivors)
        SET_IVOR(36, 0x280) /* Processor Doorbell */
        SET_IVOR(37, 0x2a0) /* Processor Doorbell Crit */
-
-       /* Check MMUCFG[LPIDSIZE] to determine if we have category E.HV */
-       mfspr   r10,SPRN_MMUCFG
-       rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
-       beqlr
-
-       SET_IVOR(38, 0x2c0) /* Guest Processor Doorbell */
-       SET_IVOR(39, 0x2e0) /* Guest Processor Doorbell Crit/MC */
        blr
 
 _GLOBAL(setup_ehv_ivors)
-       /*
-        * We may be running as a guest and lack E.HV even on a chip
-        * that normally has it.
-        */
-       mfspr   r10,SPRN_MMUCFG
-       rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
-       beqlr
-
        SET_IVOR(40, 0x300) /* Embedded Hypervisor System Call */
        SET_IVOR(41, 0x320) /* Embedded Hypervisor Privilege */
+       SET_IVOR(38, 0x2c0) /* Guest Processor Doorbell */
+       SET_IVOR(39, 0x2e0) /* Guest Processor Doorbell Crit/MC */
        blr