staging: slicoss: fix 64-bit isr address bug

This patch fixes a bug that only manifests when the physical address of
the interrupt status register is >4GB. Specifically, the driver was only
telling the device about the lower 32 bits of the ISR. This patch adds
the upper 32 bits.

Signed-off-by: David Matlack <dmatlack@google.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/slicoss/slicoss.c b/drivers/staging/slicoss/slicoss.c
index fea584517e7807b91f50199d1a1389f16c304b39..fde0ff97f5fb2054ce2497f9e120c0ee72d7c51f 100644 (file)
--- a/drivers/staging/slicoss/slicoss.c
+++ b/drivers/staging/slicoss/slicoss.c
@@ -2814,7 +2814,8 @@ static int slic_card_init(struct sliccard *card, struct adapter *adapter)
 
                spin_lock_irqsave(&adapter->bit64reglock.lock,
                                        adapter->bit64reglock.flags);
-               slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
+               slic_reg32_write(&slic_regs->slic_addr_upper,
+                                SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
                slic_reg32_write(&slic_regs->slic_isp,
                                 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
                spin_unlock_irqrestore(&adapter->bit64reglock.lock,