drm/radeon/kms: fix handling of tex lookup disable in cs checker on r2xx
authorAlex Deucher <alexdeucher@gmail.com>
Wed, 27 Oct 2010 05:02:35 +0000 (01:02 -0400)
committerGreg Kroah-Hartman <gregkh@suse.de>
Thu, 9 Dec 2010 21:32:23 +0000 (13:32 -0800)
commit 43b93fbffc2c080dba2e84df6fce8d7e6c0a2581 upstream.

There are cases when multiple texture units have to be enabled,
but not actually used to sample.  This patch checks to see if
the lookup_disable bit is set and if so, skips the texture check.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=25544

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r100_track.h
drivers/gpu/drm/radeon/r200.c
drivers/gpu/drm/radeon/radeon_reg.h

index a20fe2376d667884a45ce415bd2ca3a22725d3d1..0ba4163ee0a49242b1c1f889dcb74264b892f7d1 100644 (file)
@@ -3228,6 +3228,8 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev,
        for (u = 0; u < track->num_texture; u++) {
                if (!track->textures[u].enabled)
                        continue;
+               if (track->textures[u].lookup_disable)
+                       continue;
                robj = track->textures[u].robj;
                if (robj == NULL) {
                        DRM_ERROR("No texture bound to unit %u\n", u);
@@ -3462,6 +3464,7 @@ void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track
                track->textures[i].robj = NULL;
                /* CS IB emission code makes sure texture unit are disabled */
                track->textures[i].enabled = false;
+               track->textures[i].lookup_disable = false;
                track->textures[i].roundup_w = true;
                track->textures[i].roundup_h = true;
                if (track->separate_cube)
index f47cdca1c004400586d8eafcad3175d509a504fc..af65600e65648eeefbe87deb90c5be3b976a3c6a 100644 (file)
@@ -46,6 +46,7 @@ struct r100_cs_track_texture {
        unsigned                height_11;
        bool                    use_pitch;
        bool                    enabled;
+       bool                    lookup_disable;
        bool                    roundup_w;
        bool                    roundup_h;
        unsigned                compress_format;
index 0266d72e0a4cacaa8e52a79c85e6536e11b5df09..d2408c395619b6bd81b47ad282c3363411b975f8 100644 (file)
@@ -447,6 +447,8 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                        track->textures[i].width = 1 << ((idx_value >> RADEON_TXFORMAT_WIDTH_SHIFT) & RADEON_TXFORMAT_WIDTH_MASK);
                        track->textures[i].height = 1 << ((idx_value >> RADEON_TXFORMAT_HEIGHT_SHIFT) & RADEON_TXFORMAT_HEIGHT_MASK);
                }
+               if (idx_value & R200_TXFORMAT_LOOKUP_DISABLE)
+                       track->textures[i].lookup_disable = true;
                switch ((idx_value & RADEON_TXFORMAT_FORMAT_MASK)) {
                case R200_TXFORMAT_I8:
                case R200_TXFORMAT_RGB332:
index c332f46340d5f632122fc82b0c49111b51f11b52..64928814de53f1a4bf6c7c76eb0889ac14161b9a 100644 (file)
 #       define R200_TXFORMAT_ST_ROUTE_STQ5     (5 << 24)
 #       define R200_TXFORMAT_ST_ROUTE_MASK     (7 << 24)
 #       define R200_TXFORMAT_ST_ROUTE_SHIFT    24
+#       define R200_TXFORMAT_LOOKUP_DISABLE    (1 << 27)
 #       define R200_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28)
 #       define R200_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29)
 #       define R200_TXFORMAT_CUBIC_MAP_ENABLE          (1 << 30)