del rga soft reset && add use MMU hardware map

diff --git a/drivers/video/rockchip/rga/rga_drv.c b/drivers/video/rockchip/rga/rga_drv.c
index 06fdf674639e2b1e2a84650092642d31bebc4657..507751400069c3c52c819a9829f20b6736337b3a 100755 (executable)
--- a/drivers/video/rockchip/rga/rga_drv.c
+++ b/drivers/video/rockchip/rga/rga_drv.c
@@ -577,22 +577,19 @@ static void rga_try_set_reg(void)
             reg = list_entry(rga_service.waiting.next, struct rga_reg, status_link);\r
 \r
             rga_power_on();\r
-            udelay(3);\r
+            udelay(1);\r
 \r
             rga_copy_reg(reg, 0);\r
-            rga_reg_from_wait_to_run(reg);\r
+            rga_reg_from_wait_to_run(reg);            \r
 \r
             dmac_flush_range(&rga_service.cmd_buff[0], &rga_service.cmd_buff[28]);\r
             outer_flush_range(virt_to_phys(&rga_service.cmd_buff[0]),virt_to_phys(&rga_service.cmd_buff[28]));\r
 \r
             #if defined(CONFIG_ARCH_RK30)\r
             rga_soft_reset();\r
-            #elif defined(CONFIG_ARCH_RK31)\r
-            rga_soft_reset();\r
             #endif\r
 \r
-            rga_soft_reset();\r
-            \r
+            rga_write(0x0, RGA_SYS_CTRL);                        \r
             rga_write(0, RGA_MMU_CTRL);\r
 \r
             /* CMD buff */\r
@@ -604,7 +601,7 @@ static void rga_try_set_reg(void)
                 uint32_t i;\r
                 uint32_t *p;\r
                 p = rga_service.cmd_buff;\r
-                printk(KERN_DEBUG "CMD_REG\n");\r
+                printk("CMD_REG\n");\r
                 for (i=0; i<7; i++)\r
                     printk("%.8x %.8x %.8x %.8x\n", p[0 + i*4], p[1+i*4], p[2 + i*4], p[3 + i*4]);\r
             }\r
@@ -622,17 +619,13 @@ static void rga_try_set_reg(void)
 #if RGA_TEST\r
             {\r
                 uint32_t i;\r
-                printk(KERN_DEBUG "CMD_READ_BACK_REG\n");\r
+                printk("CMD_READ_BACK_REG\n");\r
                 for (i=0; i<7; i++)\r
-                    printk(KERN_DEBUG "%.8x %.8x %.8x %.8x\n", rga_read(0x100 + i*16 + 0),\r
+                    printk("%.8x %.8x %.8x %.8x\n", rga_read(0x100 + i*16 + 0),\r
                             rga_read(0x100 + i*16 + 4), rga_read(0x100 + i*16 + 8), rga_read(0x100 + i*16 + 12));\r
             }\r
 #endif\r
         }\r
-//        else\r
-//        {\r
-//          rga_power_off();\r
-//        }\r
     }\r
 }\r
 \r
@@ -774,12 +767,10 @@ static int rga_blit(rga_session *session, struct rga_req *req)
     int ret = -1;\r
     int num = 0;\r
     struct rga_reg *reg;\r
-    struct rga_req *req2;\r
+    struct rga_req req2;\r
 \r
     uint32_t saw, sah, daw, dah;\r
 \r
-    req2 = NULL;\r
-\r
     saw = req->src.act_w;\r
     sah = req->src.act_h;\r
     daw = req->dst.act_w;\r
@@ -789,11 +780,7 @@ static int rga_blit(rga_session *session, struct rga_req *req)
     {\r
         if((req->render_mode == bitblt_mode) && (((saw>>1) >= daw) || ((sah>>1) >= dah)))\r
         {\r
-            /* generate 2 cmd for pre scale */\r
-            req2 = kzalloc(sizeof(struct rga_req), GFP_KERNEL);\r
-            if(NULL == req2) {\r
-                return -EFAULT;\r
-            }\r
+            /* generate 2 cmd for pre scale */            \r
 \r
             ret = rga_check_param(req);\r
                if(ret == -EINVAL) {\r
@@ -801,7 +788,7 @@ static int rga_blit(rga_session *session, struct rga_req *req)
                 break;\r
                }\r
 \r
-            ret = RGA_gen_two_pro(req, req2);\r
+            ret = RGA_gen_two_pro(req, &req2);\r
             if(ret == -EINVAL) {\r
                 break;\r
             }\r
@@ -812,22 +799,18 @@ static int rga_blit(rga_session *session, struct rga_req *req)
                 break;\r
                }\r
 \r
-            ret = rga_check_param(req2);\r
+            ret = rga_check_param(&req2);\r
                if(ret == -EINVAL) {\r
                 printk("req 2 argument is inval\n");\r
                 break;\r
                }\r
 \r
-            reg = rga_reg_init_2(session, req, req2);\r
+            reg = rga_reg_init_2(session, req, &req2);\r
             if(reg == NULL) {\r
                 break;\r
             }\r
             num = 2;\r
-\r
-            if(NULL != req2)\r
-            {\r
-                kfree(req2);\r
-            }\r
+            \r
         }\r
         else\r
         {\r
@@ -859,11 +842,6 @@ static int rga_blit(rga_session *session, struct rga_req *req)
     }\r
     while(0);\r
 \r
-    if(NULL != req2)\r
-    {\r
-        kfree(req2);\r
-    }\r
-\r
     return -EFAULT;\r
 }\r
 \r
@@ -973,7 +951,7 @@ static long rga_ioctl(struct file *file, uint32_t cmd, unsigned long arg)
             }\r
             else\r
             {\r
-                ret = rga_blit_async(session, req);\r
+                ret = rga_blit_sync(session, req);\r
             }\r
                        break;\r
                case RGA_FLUSH:\r
@@ -1104,8 +1082,6 @@ static int __devinit rga_drv_probe(struct platform_device *pdev)
        rga_service.last_prc_src_format = 1; /* default is yuv first*/\r
        rga_service.enable = false;\r
 \r
-    printk("rga_drv_probe\n");\r
-\r
        data = kzalloc(sizeof(struct rga_drvdata), GFP_KERNEL);\r
        if(NULL == data)\r
        {\r
@@ -1305,6 +1281,9 @@ void rga_test_0(void)
     struct rga_req req;\r
     rga_session session;\r
     unsigned int *src, *dst;\r
+    uint32_t i, j;\r
+    uint8_t *p;\r
+    uint8_t t;\r
 \r
     struct fb_info *fb;\r
 \r
@@ -1325,11 +1304,186 @@ void rga_test_0(void)
     src = src_buf;\r
     dst = dst_buf;\r
 \r
-    memset(src_buf, 0xff, 320*240*4);\r
+    memset(src_buf, 0x80, 320*240*4);\r
+\r
+    dmac_flush_range(&src_buf[0], &src_buf[320*240]);\r
+    outer_flush_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[320*240]));\r
+\r
+   \r
+    #if 0\r
+    memset(src_buf, 0x80, 800*480*4);\r
+    memset(dst_buf, 0xcc, 800*480*4);\r
+\r
+    dmac_flush_range(&dst_buf[0], &dst_buf[800*480]);\r
+    outer_flush_range(virt_to_phys(&dst_buf[0]),virt_to_phys(&dst_buf[800*480]));\r
+    #endif\r
+\r
+    req.src.act_w = 320;\r
+    req.src.act_h = 240;\r
+\r
+    req.src.vir_w = 320;\r
+    req.src.vir_h = 240;\r
+    req.src.yrgb_addr = (uint32_t)src;\r
+    req.src.uv_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.v_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.format = 0;\r
+\r
+    req.dst.act_w = 320;\r
+    req.dst.act_h = 240;\r
+\r
+    req.dst.vir_w = 1024;\r
+    req.dst.vir_h = 768;\r
+    req.dst.x_offset = 0;\r
+    req.dst.y_offset = 0;\r
+    req.dst.yrgb_addr = (uint32_t)dst;\r
+\r
+    //req.dst.format = RK_FORMAT_RGB_565;\r
+\r
+    req.clip.xmin = 0;\r
+    req.clip.xmax = 1023;\r
+    req.clip.ymin = 0;\r
+    req.clip.ymax = 767;\r
+\r
+    //req.render_mode = color_fill_mode;\r
+    //req.fg_color = 0x80ffffff;\r
+\r
+    //req.rotate_mode = 1;\r
+    //req.scale_mode = 2;\r
+\r
+    //req.alpha_rop_flag = 1;\r
+    //req.alpha_rop_mode = 0x19;\r
+    req.PD_mode = 3;\r
+\r
+    req.sina = 0;\r
+    req.cosa = 65536;\r
+\r
+    req.mmu_info.mmu_flag = 0x21;\r
+    req.mmu_info.mmu_en = 1;\r
+\r
+    rga_blit_sync(&session, &req);\r
+\r
+    dmac_inv_range(&dst_buf[0], &dst_buf[320*240]);\r
+    outer_inv_range(virt_to_phys(&dst_buf[0]),virt_to_phys(&dst_buf[320*240]));\r
+\r
+    for(j=0; j<17; j++)\r
+    {\r
+        for(i=0; i<8; i++)\r
+        {\r
+            printk("%.8x, ", dst_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+\r
+        for(i=8; i<16; i++)\r
+        {\r
+            printk("%.8x, ", dst_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+    }\r
+\r
+    p = (uint8_t *)src_buf;\r
+    p = p + 16 * 4;\r
+\r
+    for(i=0; i<16; i++)\r
+        src_buf[i] = 0;\r
+\r
+    for(j=0; j<16; j++)\r
+    {\r
+        for(i=0; i<16; i++)\r
+        {\r
+            t = j*16 + i;\r
+            src_buf[(j+1)*16 + i] = (t<<24)|(t<<16)|(t<<8)|t;\r
+        }\r
+    }\r
+\r
+    dmac_flush_range(&src_buf[0], &src_buf[320*240]);\r
+    outer_flush_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[320*240]));\r
+\r
+    dmac_inv_range(&src_buf[0], &src_buf[320*240]);\r
+    outer_inv_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[320*240]));\r
+\r
+    printk("SRC DATA \n");\r
+    for(j=0; j<17; j++)\r
+    {\r
+        for(i=0; i<8; i++)\r
+        {\r
+            printk("%.8x, ", src_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+\r
+        for(i=8; i<16; i++)\r
+        {\r
+            printk("%.8x, ", src_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+    }    \r
+\r
+    req.src.act_w = 320;\r
+    req.src.act_h = 240;\r
+\r
+    req.src.vir_w = 320;\r
+    req.src.vir_h = 240;\r
+    req.src.yrgb_addr = (uint32_t)src;\r
+    req.src.uv_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.v_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.format = 0;\r
+\r
+    req.dst.act_w = 320;\r
+    req.dst.act_h = 240;\r
+\r
+    req.dst.vir_w = 1024;\r
+    req.dst.vir_h = 768;\r
+    req.dst.x_offset = 0;\r
+    req.dst.y_offset = 0;\r
+    req.dst.yrgb_addr = (uint32_t)(dst);\r
+\r
+    //req.dst.format = RK_FORMAT_RGB_565;\r
+\r
+    req.clip.xmin = 0;\r
+    req.clip.xmax = 1023;\r
+    req.clip.ymin = 0;\r
+    req.clip.ymax = 767;\r
+\r
+    //req.render_mode = color_fill_mode;\r
+    //req.fg_color = 0x80ffffff;\r
+\r
+    //req.rotate_mode = 1;\r
+    //req.scale_mode = 2;\r
+\r
+    req.alpha_rop_flag = 0x19;\r
+    req.alpha_rop_mode = 0x1;\r
+    req.PD_mode = 3;\r
+\r
+    req.sina = 0;\r
+    req.cosa = 65536;\r
+\r
+    req.mmu_info.mmu_flag = 0x21;\r
+    req.mmu_info.mmu_en = 1;\r
+    \r
+    rga_blit_sync(&session, &req);\r
+\r
+    dmac_inv_range(&dst_buf[0], &dst_buf[320*240]);\r
+    outer_inv_range(virt_to_phys(&dst_buf[0]),virt_to_phys(&dst_buf[320*240]));\r
+\r
+    for(j=0; j<17; j++)\r
+    {\r
+        for(i=0; i<8; i++)\r
+        {\r
+            printk("%.8x, ", dst_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+        for(i=8; i<16; i++)\r
+        {\r
+            printk("%.8x, ", dst_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+    }\r
+\r
+    memset(src_buf, 0x80, 320*240*4);\r
 \r
-    dmac_flush_range(&src_buf[0], &src_buf[1920*1080]);\r
-    outer_flush_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[1024*1024]));\r
+    dmac_flush_range(&src_buf[0], &src_buf[320*240]);\r
+    outer_flush_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[320*240]));\r
 \r
+   \r
     #if 0\r
     memset(src_buf, 0x80, 800*480*4);\r
     memset(dst_buf, 0xcc, 800*480*4);\r
@@ -1343,7 +1497,7 @@ void rga_test_0(void)
 \r
     req.src.vir_w = 320;\r
     req.src.vir_h = 240;\r
-    req.src.yrgb_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.yrgb_addr = (uint32_t)(src);\r
     req.src.uv_addr = (uint32_t)virt_to_phys(src);\r
     req.src.v_addr = (uint32_t)virt_to_phys(src);\r
     req.src.format = 0;\r
@@ -1355,7 +1509,7 @@ void rga_test_0(void)
     req.dst.vir_h = 768;\r
     req.dst.x_offset = 0;\r
     req.dst.y_offset = 0;\r
-    req.dst.yrgb_addr = (uint32_t)virt_to_phys(dst);\r
+    req.dst.yrgb_addr = (uint32_t)(dst);\r
 \r
     //req.dst.format = RK_FORMAT_RGB_565;\r
 \r
@@ -1370,22 +1524,137 @@ void rga_test_0(void)
     //req.rotate_mode = 1;\r
     //req.scale_mode = 2;\r
 \r
-    //req.alpha_rop_flag = 0;\r
-    //req.alpha_rop_mode = 0x1;\r
+    req.alpha_rop_flag = 0;\r
+    req.alpha_rop_mode = 0x0;\r
 \r
     req.sina = 0;\r
     req.cosa = 65536;\r
 \r
-    //req.mmu_info.mmu_flag = 0x21;\r
-    //req.mmu_info.mmu_en = 1;\r
+    req.mmu_info.mmu_flag = 0x21;\r
+    req.mmu_info.mmu_en = 1;\r
+\r
+    rga_blit_sync(&session, &req);\r
+\r
+    dmac_inv_range(&dst_buf[0], &dst_buf[320*240]);\r
+    outer_inv_range(virt_to_phys(&dst_buf[0]),virt_to_phys(&dst_buf[320*240]));\r
+\r
+    for(j=0; j<17; j++)\r
+    {\r
+        for(i=0; i<8; i++)\r
+        {\r
+            printk("%.8x, ", dst_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+\r
+        for(i=8; i<16; i++)\r
+        {\r
+            printk("%.8x, ", dst_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+    }\r
+\r
+    p = (uint8_t *)src_buf;\r
+    p = p + 16 * 4;\r
+\r
+    for(i=0; i<16; i++)\r
+        src_buf[i] = 0;\r
+\r
+    for(j=0; j<16; j++)\r
+    {\r
+        for(i=0; i<16; i++)\r
+        {\r
+            t = j*16 + i;\r
+            src_buf[(j+1)*16 + i] = (t<<24)|(t<<16)|(t<<8)|t;\r
+        }\r
+    }\r
+\r
+    dmac_inv_range(&src_buf[0], &src_buf[320*240]);\r
+    outer_inv_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[320*240]));\r
+    printk("SRC DATA \n");\r
+    for(j=0; j<17; j++)\r
+    {\r
+        for(i=0; i<8; i++)\r
+        {\r
+            printk("%.8x, ", src_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+\r
+        for(i=8; i<16; i++)\r
+        {\r
+            printk("%.8x, ", src_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+    }\r
+\r
+    dmac_flush_range(&src_buf[0], &src_buf[320*240]);\r
+    outer_flush_range(virt_to_phys(&src_buf[0]),virt_to_phys(&src_buf[320*240]));\r
+\r
+    req.src.act_w = 320;\r
+    req.src.act_h = 240;\r
+\r
+    req.src.vir_w = 320;\r
+    req.src.vir_h = 240;\r
+    req.src.yrgb_addr = (uint32_t)(src);\r
+    req.src.uv_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.v_addr = (uint32_t)virt_to_phys(src);\r
+    req.src.format = 0;\r
+\r
+    req.dst.act_w = 320;\r
+    req.dst.act_h = 240;\r
+\r
+    req.dst.vir_w = 1024;\r
+    req.dst.vir_h = 768;\r
+    req.dst.x_offset = 0;\r
+    req.dst.y_offset = 0;\r
+    req.dst.yrgb_addr = (uint32_t)(dst);\r
+\r
+    //req.dst.format = RK_FORMAT_RGB_565;\r
+\r
+    req.clip.xmin = 0;\r
+    req.clip.xmax = 1023;\r
+    req.clip.ymin = 0;\r
+    req.clip.ymax = 767;\r
+\r
+    //req.render_mode = color_fill_mode;\r
+    //req.fg_color = 0x80ffffff;\r
+\r
+    //req.rotate_mode = 1;\r
+    //req.scale_mode = 2;\r
+\r
+    req.alpha_rop_flag = 0x19;\r
+    req.alpha_rop_mode = 0x1;\r
+    req.PD_mode = 3;\r
 \r
+    req.sina = 0;\r
+    req.cosa = 65536;\r
+\r
+    req.mmu_info.mmu_flag = 0x21;\r
+    req.mmu_info.mmu_en = 1;\r
+    \r
     rga_blit_sync(&session, &req);\r
 \r
+    dmac_inv_range(&dst_buf[0], &dst_buf[320*240]);\r
+    outer_inv_range(virt_to_phys(&dst_buf[0]),virt_to_phys(&dst_buf[320*240]));\r
+\r
+    for(j=0; j<17; j++)\r
+    {\r
+        for(i=0; i<8; i++)\r
+        {\r
+            printk("%.8x, ", dst_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+        for(i=8; i<16; i++)\r
+        {\r
+            printk("%.8x, ", dst_buf[j*16 + i]);            \r
+        }\r
+        printk("\n");\r
+    }\r
+\r
     #if 1\r
     fb->var.bits_per_pixel = 32;\r
     \r
-    fb->var.xres = 800;\r
-    fb->var.yres = 480;\r
+    fb->var.xres = 1024;\r
+    fb->var.yres = 768;\r
 \r
     fb->var.red.length = 8;\r
     fb->var.red.offset = 0;\r

diff --git a/drivers/video/rockchip/rga/rga_mmu_info.c b/drivers/video/rockchip/rga/rga_mmu_info.c
index 677e6d8d0c5ba63651f93d19caae7f7981feb17f..212231e42408f16956f511e361ce7419541d5f60 100755 (executable)
--- a/drivers/video/rockchip/rga/rga_mmu_info.c
+++ b/drivers/video/rockchip/rga/rga_mmu_info.c
@@ -24,8 +24,34 @@ extern rga_service_info rga_service;
 \r
 #define KERNEL_SPACE_VALID    0xc0000000\r
 \r
+#define V7_VATOPA_SUCESS_MASK  (0x1)\r
+#define V7_VATOPA_GET_PADDR(X) (X & 0xFFFFF000)\r
+#define V7_VATOPA_GET_INER(X)          ((X>>4) & 7)\r
+#define V7_VATOPA_GET_OUTER(X)         ((X>>2) & 3)\r
+#define V7_VATOPA_GET_SH(X)            ((X>>7) & 1)\r
+#define V7_VATOPA_GET_NS(X)            ((X>>9) & 1)\r
+#define V7_VATOPA_GET_SS(X)            ((X>>1) & 1)\r
+\r
+\r
 int mmu_flag = 0;\r
 \r
+unsigned int armv7_va_to_pa(unsigned int v_addr)\r
+{\r
+       unsigned int p_addr;\r
+       __asm__ volatile (      "mcr p15, 0, %1, c7, c8, 0\n" \r
+                                               "isb\n"\r
+                                               "dsb\n"\r
+                                               "mrc p15, 0, %0, c7, c4, 0\n"\r
+                                               : "=r" (p_addr)\r
+                                               : "r" (v_addr)\r
+                                               : "cc");\r
+\r
+       if (p_addr & V7_VATOPA_SUCESS_MASK)\r
+               return 0xFFFFFFFF;\r
+       else\r
+               return (V7_VATOPA_GET_SS(p_addr) ? 0xFFFFFFFF : V7_VATOPA_GET_PADDR(p_addr));\r
+}\r
+\r
 static int rga_mem_size_cal(uint32_t Mem, uint32_t MemSize, uint32_t *StartAddr) \r
 {\r
     uint32_t start, end;\r
@@ -222,6 +248,7 @@ static int rga_MapUserMemory(struct page **pages,
     uint32_t i;\r
     uint32_t status;\r
     uint32_t Address;\r
+    uint32_t temp;\r
     status = 0;\r
     Address = 0;\r
 \r
@@ -238,71 +265,25 @@ static int rga_MapUserMemory(struct page **pages,
                 NULL\r
                 );\r
         up_read(&current->mm->mmap_sem);\r
-\r
+                        \r
         if(result <= 0 || result < pageCount) \r
         {\r
-            struct vm_area_struct *vma;\r
+            status = 0;\r
 \r
             for(i=0; i<pageCount; i++)\r
-            {                \r
-                vma = find_vma(current->mm, (Memory + i) << PAGE_SHIFT);\r
-\r
-                if (vma && (vma->vm_flags & VM_PFNMAP) )\r
-                {\r
-                    do\r
-                    {\r
-                        pte_t       * pte;\r
-                        spinlock_t  * ptl;\r
-                        unsigned long pfn;                                                                        \r
-                        pgd_t * pgd;\r
-                        pud_t * pud;\r
-                        \r
-                        pgd = pgd_offset(current->mm, (Memory + i) << PAGE_SHIFT);\r
-\r
-                        if(pgd_val(*pgd) == 0)\r
-                        {\r
-                            printk("pgd value is zero \n");\r
-                            break;\r
-                        }\r
-                        \r
-                        pud = pud_offset(pgd, (Memory + i) << PAGE_SHIFT);\r
-                        if (pud)\r
-                        {\r
-                            pmd_t * pmd = pmd_offset(pud, (Memory + i) << PAGE_SHIFT);\r
-                            if (pmd)\r
-                            {\r
-                                pte = pte_offset_map_lock(current->mm, pmd, (Memory + i) << PAGE_SHIFT, &ptl);\r
-                                if (!pte)\r
-                                {\r
-                                    break;\r
-                                }\r
-                            }\r
-                            else\r
-                            {\r
-                                break;\r
-                            }\r
-                        }\r
-                        else\r
-                        {\r
-                            break;\r
-                        }\r
-\r
-                        pfn = pte_pfn(*pte);\r
-                        Address = ((pfn << PAGE_SHIFT) | (((unsigned long)((Memory + i) << PAGE_SHIFT)) & ~PAGE_MASK));                        \r
-                        pte_unmap_unlock(pte, ptl);                                                                        \r
-                    }\r
-                    while (0);\r
-\r
-                    pageTable[i] = Address;\r
-                }\r
-                else\r
+            {   \r
+                temp = armv7_va_to_pa((Memory + i) << PAGE_SHIFT);\r
+                if (temp == 0xffffffff)\r
                 {\r
+                    printk("rga find mmu phy ddr error\n ");\r
                     status = RGA_OUT_OF_RESOURCES;\r
                     break;\r
-                }     \r
+                }\r
+                \r
+                pageTable[i] = temp;                \r
             }\r
 \r
-            return 0;\r
+            return status;\r
         }\r
 \r
         for (i = 0; i < pageCount; i++)\r