switch (TokenKind) {
case MIToken::comma:
return "','";
+ case MIToken::equal:
+ return "'='";
case MIToken::lparen:
return "'('";
case MIToken::rparen:
lex();
// Parse any register operands before '='
- // TODO: Allow parsing of multiple operands before '='
MachineOperand MO = MachineOperand::CreateImm(0);
SmallVector<MachineOperandWithLocation, 8> Operands;
- if (Token.isRegister() || Token.isRegisterFlag()) {
+ while (Token.isRegister() || Token.isRegisterFlag()) {
auto Loc = Token.location();
if (parseRegisterOperand(MO, /*IsDef=*/true))
return true;
Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
- if (Token.isNot(MIToken::equal))
- return error("expected '='");
+ if (Token.isNot(MIToken::comma))
+ break;
lex();
}
+ if (!Operands.empty() && expectAndConsume(MIToken::equal))
+ return true;
unsigned OpCode, Flags = 0;
if (Token.isError() || parseInstruction(OpCode, Flags))
--- /dev/null
+import re
+
+if not 'AArch64' in config.root.targets:
+ config.unsupported = True
+
+# For now we don't test arm64-win32.
+if re.search(r'cygwin|mingw32|win32|windows-gnu|windows-msvc', config.target_triple):
+ config.unsupported = True
--- /dev/null
+# RUN: llc -mtriple=aarch64-none-linux-gnu -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# This test ensures that the MIR parser can parse multiple register machine
+# operands before '='.
+
+--- |
+
+ declare void @foo()
+
+ define void @trivial_fp_func() {
+ entry:
+ call void @foo()
+ ret void
+ }
+
+...
+---
+name: trivial_fp_func
+body:
+ - id: 0
+ name: entry
+ liveins: [ '%lr', '%fp', '%lr', '%fp' ]
+ instructions:
+ - '%sp = frame-setup STPXpre killed %fp, killed %lr, %sp, -2'
+ - '%fp = frame-setup ADDXri %sp, 0, 0'
+ - 'BL @foo, csr_aarch64_aapcs, implicit-def dead %lr, implicit %sp, implicit-def %sp'
+# CHECK: %sp, %fp, %lr = LDPXpost %sp, 2
+ - '%sp, %fp, %lr = LDPXpost %sp, 2'
+ - RET_ReallyLR
+...