MUX_CFG(GPIO2C1_LCDC0_D15_LCDC1_D15_NAME, GPIO2C, 2, 2, 0, DEFAULT)
MUX_CFG(GPIO2C2_LCDC0_D16_LCDC1_D16_NAME, GPIO2C, 4, 2, 0, DEFAULT)
MUX_CFG(GPIO2C3_LCDC0_D17_LCDC1_D17_NAME, GPIO2C, 6, 2, 0, DEFAULT)
-MUX_CFG(GPIO2C4_LCDC0_D18_LCDC1_D18_I2C2_SDA_NAME,GPIO2C, 8, 3, 0, DEFAULT)
-MUX_CFG(GPIO2C5_LCDC0_D19_LCDC1_D19_I2C2_SCL_NAME,GPIO2C, 10, 3, 0, DEFAULT)
-MUX_CFG(GPIO2C6_LCDC0_D20_LCDC1_D20_UART2_SIN_NAME,GPIO2C, 12, 3, 0, DEFAULT)
-MUX_CFG(GPIO2C7_LCDC0_D21_LCDC1_D21_UART2_SOUT_NAME,GPIO2C, 14, 3, 0, DEFAULT)
+MUX_CFG(GPIO2C4_LCDC0_D18_LCDC1_D18_I2C2_SDA_NAME,GPIO2C, 8, 2, 0, DEFAULT)
+MUX_CFG(GPIO2C5_LCDC0_D19_LCDC1_D19_I2C2_SCL_NAME,GPIO2C, 10, 2, 0, DEFAULT)
+MUX_CFG(GPIO2C6_LCDC0_D20_LCDC1_D20_UART2_SIN_NAME,GPIO2C, 12, 2, 0, DEFAULT)
+MUX_CFG(GPIO2C7_LCDC0_D21_LCDC1_D21_UART2_SOUT_NAME,GPIO2C, 14, 2, 0, DEFAULT)
//gpio2d
MUX_CFG(GPIO2D0_LCDC0_D22_LCDC1_D22_NAME, GPIO2D, 0, 2, 0, DEFAULT)
#endif
#if defined(CONFIG_UART2_RK29) || (CONFIG_RK_DEBUG_UART == 2)
- rk30_mux_api_set(GPIO0D0_UART2_RTSN_NAME, GPIO0D_UART2_RTSN);
- rk30_mux_api_set(GPIO0D1_UART2_CTSN_NAME, GPIO0D_UART2_CTSN);
-#ifdef CONFIG_UART2_CTS_RTS_RK29
rk30_mux_api_set(GPIO2C6_LCDC0_D20_LCDC1_D20_UART2_SIN_NAME, GPIO2C_UART2_SIN);
rk30_mux_api_set(GPIO2C7_LCDC0_D21_LCDC1_D21_UART2_SOUT_NAME, GPIO2C_UART2_SOUT);
+#ifdef CONFIG_UART2_CTS_RTS_RK29
+ rk30_mux_api_set(GPIO0D0_UART2_RTSN_NAME, GPIO0D_UART2_RTSN);
+ rk30_mux_api_set(GPIO0D1_UART2_CTSN_NAME, GPIO0D_UART2_CTSN);
#endif
#endif