#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/LeakDetector.h"
#include "llvm/Support/raw_ostream.h"
+#include "llvm/Assembly/Writer.h"
#include <algorithm>
using namespace llvm;
static inline void OutputReg(raw_ostream &os, unsigned RegNo,
const TargetRegisterInfo *TRI = 0) {
- if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) {
+ if (RegNo != 0 && TargetRegisterInfo::isPhysicalRegister(RegNo)) {
if (TRI)
os << " %" << TRI->get(RegNo).Name;
else
- os << " %mreg(" << RegNo << ")";
+ os << " %physreg" << RegNo;
} else
os << " %reg" << RegNo;
}
return;
}
- const BasicBlock *LBB = getBasicBlock();
+ if (Alignment) { OS << "Alignment " << Alignment << "\n"; }
+
+ OS << "BB#" << getNumber() << ": ";
+
+ const char *Comma = "";
+ if (const BasicBlock *LBB = getBasicBlock()) {
+ OS << Comma << "derived from LLVM BB ";
+ WriteAsOperand(OS, LBB, /*PrintType=*/false);
+ Comma = ", ";
+ }
+ if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; }
+ if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; }
OS << '\n';
- if (LBB) OS << LBB->getName() << ": ";
- OS << (const void*)this
- << ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber();
- if (Alignment) OS << ", Alignment " << Alignment;
- if (isLandingPad()) OS << ", EH LANDING PAD";
- if (hasAddressTaken()) OS << ", ADDRESS TAKEN";
- OS << ":\n";
const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
if (!livein_empty()) {
- OS << "Live Ins:";
+ OS << " Live Ins:";
for (const_livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I)
OutputReg(OS, *I, TRI);
OS << '\n';
if (!pred_empty()) {
OS << " Predecessors according to CFG:";
for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI)
- OS << ' ' << *PI << " (#" << (*PI)->getNumber() << ')';
+ OS << " BB#" << (*PI)->getNumber();
OS << '\n';
}
if (!succ_empty()) {
OS << " Successors according to CFG:";
for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI)
- OS << ' ' << *SI << " (#" << (*SI)->getNumber() << ')';
+ OS << " BB#" << (*SI)->getNumber();
OS << '\n';
}
}
}
bool runOnMachineFunction(MachineFunction &MF) {
- OS << Banner;
+ OS << "# " << Banner << ":\n";
MF.print(OS);
return false;
}
}
void MachineFunction::print(raw_ostream &OS) const {
- OS << "# Machine code for " << Fn->getName() << "():\n";
+ OS << "# Machine code for function " << Fn->getName() << ":\n";
// Print Frame Information
FrameInfo->print(*this, OS);
const TargetRegisterInfo *TRI = getTarget().getRegisterInfo();
if (RegInfo && !RegInfo->livein_empty()) {
- OS << "Live Ins:";
+ OS << "Function Live Ins: ";
for (MachineRegisterInfo::livein_iterator
I = RegInfo->livein_begin(), E = RegInfo->livein_end(); I != E; ++I) {
if (TRI)
- OS << " " << TRI->getName(I->first);
+ OS << "%" << TRI->getName(I->first);
else
- OS << " Reg #" << I->first;
+ OS << " %physreg" << I->first;
if (I->second)
- OS << " in VR#" << I->second << ' ';
+ OS << " in reg%" << I->second;
+
+ if (next(I) != E)
+ OS << ", ";
}
OS << '\n';
}
if (RegInfo && !RegInfo->liveout_empty()) {
- OS << "Live Outs:";
+ OS << "Function Live Outs: ";
for (MachineRegisterInfo::liveout_iterator
- I = RegInfo->liveout_begin(), E = RegInfo->liveout_end(); I != E; ++I)
+ I = RegInfo->liveout_begin(), E = RegInfo->liveout_end(); I != E; ++I){
if (TRI)
- OS << ' ' << TRI->getName(*I);
+ OS << '%' << TRI->getName(*I);
else
- OS << " Reg #" << *I;
+ OS << "%physreg" << *I;
+
+ if (next(I) != E)
+ OS << " ";
+ }
OS << '\n';
}
- for (const_iterator BB = begin(), E = end(); BB != E; ++BB)
+ for (const_iterator BB = begin(), E = end(); BB != E; ++BB) {
+ OS << '\n';
BB->print(OS);
+ }
- OS << "\n# End machine code for " << Fn->getName() << "().\n\n";
+ OS << "\n# End machine code for function " << Fn->getName() << ".\n\n";
}
namespace llvm {
void MachineFrameInfo::print(const MachineFunction &MF, raw_ostream &OS) const{
+ if (Objects.empty()) return;
+
const TargetFrameInfo *FI = MF.getTarget().getFrameInfo();
int ValOffset = (FI ? FI->getOffsetOfLocalArea() : 0);
+ OS << "Frame Objects:\n";
+
for (unsigned i = 0, e = Objects.size(); i != e; ++i) {
const StackObject &SO = Objects[i];
- OS << " <fi#" << (int)(i-NumFixedObjects) << ">: ";
+ OS << " fi#" << (int)(i-NumFixedObjects) << ": ";
if (SO.Size == ~0ULL) {
OS << "dead\n";
continue;
if (SO.Size == 0)
OS << "variable sized";
else
- OS << "size is " << SO.Size << " byte" << (SO.Size != 1 ? "s," : ",");
- OS << " alignment is " << SO.Alignment << " byte"
- << (SO.Alignment != 1 ? "s," : ",");
+ OS << "size=" << SO.Size;
+ OS << ", align=" << SO.Alignment;
if (i < NumFixedObjects)
- OS << " fixed";
+ OS << ", fixed";
if (i < NumFixedObjects || SO.SPOffset != -1) {
int64_t Off = SO.SPOffset - ValOffset;
- OS << " at location [SP";
+ OS << ", at location [SP";
if (Off > 0)
OS << "+" << Off;
else if (Off < 0)
}
OS << "\n";
}
-
- if (HasVarSizedObjects)
- OS << " Stack frame contains variable sized objects\n";
}
void MachineFrameInfo::dump(const MachineFunction &MF) const {
}
void MachineJumpTableInfo::print(raw_ostream &OS) const {
- // FIXME: this is lame, maybe we could print out the MBB numbers or something
- // like {1, 2, 4, 5, 3, 0}
+ if (JumpTables.empty()) return;
+
+ OS << "Jump Tables:\n";
+
for (unsigned i = 0, e = JumpTables.size(); i != e; ++i) {
- OS << " <jt#" << i << "> has " << JumpTables[i].MBBs.size()
- << " entries\n";
+ OS << " jt#" << i << ": ";
+ for (unsigned j = 0, f = JumpTables[i].MBBs.size(); j != f; ++j)
+ OS << " BB#" << JumpTables[i].MBBs[j]->getNumber();
}
+
+ OS << '\n';
}
void MachineJumpTableInfo::dump() const { print(errs()); }
}
void MachineConstantPool::print(raw_ostream &OS) const {
+ if (Constants.empty()) return;
+
+ OS << "Constant Pool:\n";
for (unsigned i = 0, e = Constants.size(); i != e; ++i) {
- OS << " <cp#" << i << "> is";
+ OS << " cp#" << i << ": ";
if (Constants[i].isMachineConstantPoolEntry())
Constants[i].Val.MachineCPVal->print(OS);
else
OS << *(Value*)Constants[i].Val.ConstVal;
- OS << " , alignment=" << Constants[i].getAlignment();
+ OS << ", align=" << Constants[i].getAlignment();
OS << "\n";
}
}
if (TM)
OS << "%" << TM->getRegisterInfo()->get(getReg()).Name;
else
- OS << "%mreg" << getReg();
+ OS << "%physreg" << getReg();
}
if (getSubReg() != 0)
OS << getFPImm()->getValueAPF().convertToDouble();
break;
case MachineOperand::MO_MachineBasicBlock:
- OS << "mbb<"
- << ((Value*)getMBB()->getBasicBlock())->getName()
- << "," << (void*)getMBB() << '>';
+ OS << "<BB#" << getMBB()->getNumber() << ">";
break;
case MachineOperand::MO_FrameIndex:
OS << "<fi#" << getIndex() << '>';
OS << '>';
break;
case MachineOperand::MO_BlockAddress:
- OS << "<blockaddress: ";
- WriteAsOperand(OS, getBlockAddress()->getFunction(), /*PrintType=*/false);
- OS << ", ";
- WriteAsOperand(OS, getBlockAddress()->getBasicBlock(), /*PrintType=*/false);
+ OS << "<";
+ WriteAsOperand(OS, getBlockAddress(), /*PrintType=*/false);
OS << '>';
break;
default:
}
void MachineInstr::print(raw_ostream &OS, const TargetMachine *TM) const {
- // Specialize printing if op#0 is definition
- unsigned StartOp = 0;
- if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) {
- getOperand(0).print(OS, TM);
- OS << " = ";
- ++StartOp; // Don't print this operand again!
+ unsigned StartOp = 0, e = getNumOperands();
+
+ // Print explicitly defined operands on the left of an assignment syntax.
+ for (; StartOp < e && getOperand(StartOp).isReg() &&
+ getOperand(StartOp).isDef() &&
+ !getOperand(StartOp).isImplicit();
+ ++StartOp) {
+ if (StartOp != 0) OS << ", ";
+ getOperand(StartOp).print(OS, TM);
}
+ if (StartOp != 0)
+ OS << " = ";
+
+ // Print the opcode name.
OS << getDesc().getName();
+ // Print the rest of the operands.
for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
if (i != StartOp)
OS << ",";
getOperand(i).print(OS, TM);
}
+ bool HaveSemi = false;
if (!memoperands_empty()) {
- OS << ", Mem:";
+ if (!HaveSemi) OS << ";"; HaveSemi = true;
+
+ OS << " mem:";
for (mmo_iterator i = memoperands_begin(), e = memoperands_end();
i != e; ++i) {
OS << **i;
}
if (!debugLoc.isUnknown()) {
+ if (!HaveSemi) OS << ";"; HaveSemi = true;
+
+ // TODO: print InlinedAtLoc information
+
const MachineFunction *MF = getParent()->getParent();
DebugLocTuple DLT = MF->getDebugLocTuple(debugLoc);
DICompileUnit CU(DLT.Scope);
if (!CU.isNull())
- OS << " [dbg: "
- << CU.getDirectory() << '/' << CU.getFilename() << ","
- << DLT.Line << ","
- << DLT.Col << "]";
+ OS << " dbg:" << CU.getDirectory() << '/' << CU.getFilename() << ":"
+ << DLT.Line << ":" << DLT.Col;
}
OS << "\n";
report(msg, MBB->getParent());
*OS << "- basic block: " << MBB->getBasicBlock()->getNameStr()
<< " " << (void*)MBB
- << " (#" << MBB->getNumber() << ")\n";
+ << " (BB#" << MBB->getNumber() << ")\n";
}
void MachineVerifier::report(const char *msg, const MachineInstr *MI) {
PrE = MBB->pred_end(); PrI != PrE; ++PrI) {
if (!seen.count(*PrI)) {
report("Missing PHI operand", BBI);
- *OS << "MBB #" << (*PrI)->getNumber()
+ *OS << "BB#" << (*PrI)->getNumber()
<< " is a predecessor according to the CFG.\n";
}
}
report("Live-in physical register is not live-out from predecessor",
MFI);
*OS << "Register " << TRI->getName(*I)
- << " is not live-out from MBB #" << (*PrI)->getNumber()
+ << " is not live-out from BB#" << (*PrI)->getNumber()
<< ".\n";
}
}
if (bbcnt++ % DebugDiv != DebugMod)
continue;
errs() << "*** DEBUG scheduling " << Fn.getFunction()->getNameStr() <<
- ":MBB ID#" << MBB->getNumber() << " ***\n";
+ ":BB#" << MBB->getNumber() << " ***\n";
}
#endif
/// incorrect by instruction reordering.
///
void SchedulePostRATDList::FixupKills(MachineBasicBlock *MBB) {
- DEBUG(errs() << "Fixup kills for BB ID#" << MBB->getNumber() << '\n');
+ DEBUG(errs() << "Fixup kills for BB#" << MBB->getNumber() << '\n');
std::set<unsigned> killedRegs;
BitVector ReservedRegs = TRI->getReservedRegs(MF);
} else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
if (G && R->getReg() &&
TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
- OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
+ OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg());
} else {
- OS << " #" << R->getReg();
+ OS << " %reg" << R->getReg();
}
} else if (const ExternalSymbolSDNode *ES =
dyn_cast<ExternalSymbolSDNode>(this)) {