Ensure REG_SEQUENCE source operands are unique.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103449 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 4ccb66113872d9f7644cd40d8357bebdd93dbe52..5b892a80e31e8be1ed9f6c8c0c440a406d62ab8c 100644 (file)
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1164,6 +1164,8 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
       DEBUG(dbgs() << "Illegal REG_SEQUENCE instruction:" << *MI);
       llvm_unreachable(0);
     }
+
+    SmallSet<unsigned, 4> Seen;
     for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) {
       unsigned SrcReg = MI->getOperand(i).getReg();
       if (MI->getOperand(i).getSubReg() ||
@@ -1171,6 +1173,23 @@ bool TwoAddressInstructionPass::EliminateRegSequences() {
         DEBUG(dbgs() << "Illegal REG_SEQUENCE instruction:" << *MI);
         llvm_unreachable(0);
       }
+
+      if (!Seen.insert(SrcReg)) {
+        // REG_SEQUENCE cannot have duplicated operands. Add a copy.
+        const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
+        unsigned NewReg = MRI->createVirtualRegister(RC);
+        bool Emitted =
+          TII->copyRegToReg(*MI->getParent(), MI, NewReg, SrcReg, RC, RC,
+                            MI->getDebugLoc());
+        (void)Emitted;
+        assert(Emitted && "Unable to issue a copy instruction!\n");
+        MI->getOperand(i).setReg(NewReg);
+        MI->getOperand(i).setIsKill();
+      }
+    }
+
+    for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) {
+      unsigned SrcReg = MI->getOperand(i).getReg();
       unsigned SrcIdx = MI->getOperand(i+1).getImm();
       UpdateRegSequenceSrcs(SrcReg, DstReg, SrcIdx, MRI);
     }