drm/radeon: set the full cache bit for fences on r7xx+

commit d45b964a22cad962d3ede1eba8d24f5cee7b2a92 upstream.

Needed to properly flush the read caches for fences.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index f19620b472f537053c73a4dfb232135b1f6f76fc..1b8c3707bf4245d7958edb705523bb99cd6e8d83 100644 (file)
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2957,14 +2957,17 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
                          struct radeon_fence *fence)
 {
        struct radeon_ring *ring = &rdev->ring[fence->ring];
+       u32 cp_coher_cntl = PACKET3_TC_ACTION_ENA | PACKET3_VC_ACTION_ENA |
+               PACKET3_SH_ACTION_ENA;
+
+       if (rdev->family >= CHIP_RV770)
+               cp_coher_cntl |= PACKET3_FULL_CACHE_ENA;
 
        if (rdev->wb.use_event) {
                u64 addr = rdev->fence_drv[fence->ring].gpu_addr;
                /* flush read cache over gart */
                radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));
-               radeon_ring_write(ring, PACKET3_TC_ACTION_ENA |
-                                       PACKET3_VC_ACTION_ENA |
-                                       PACKET3_SH_ACTION_ENA);
+               radeon_ring_write(ring, cp_coher_cntl);
                radeon_ring_write(ring, 0xFFFFFFFF);
                radeon_ring_write(ring, 0);
                radeon_ring_write(ring, 10); /* poll interval */
@@ -2978,9 +2981,7 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
        } else {
                /* flush read cache over gart */
                radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));
-               radeon_ring_write(ring, PACKET3_TC_ACTION_ENA |
-                                       PACKET3_VC_ACTION_ENA |
-                                       PACKET3_SH_ACTION_ENA);
+               radeon_ring_write(ring, cp_coher_cntl);
                radeon_ring_write(ring, 0xFFFFFFFF);
                radeon_ring_write(ring, 0);
                radeon_ring_write(ring, 10); /* poll interval */

diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 2fd2241b6df9e2cee57859e4111a1e18fe91f39f..eb28716e87fa2399f085729d1ca87b692d25d4ba 100644 (file)
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -1283,6 +1283,7 @@
 #              define PACKET3_CP_DMA_CMD_DAIC      (1 << 29)
 #define        PACKET3_SURFACE_SYNC                            0x43
 #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
+#              define PACKET3_FULL_CACHE_ENA       (1 << 20) /* r7xx+ only */
 #              define PACKET3_TC_ACTION_ENA        (1 << 23)
 #              define PACKET3_VC_ACTION_ENA        (1 << 24)
 #              define PACKET3_CB_ACTION_ENA        (1 << 25)