ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco
authorBarry Song <Baohua.Song@csr.com>
Thu, 20 Dec 2012 09:33:49 +0000 (17:33 +0800)
committerBarry Song <Barry.Song@csr.com>
Tue, 22 Jan 2013 11:38:24 +0000 (19:38 +0800)
Marco timer has different timer IP with prima2, so rename the current timer
to timer-prima2 so that we can add timer-marco.

at the same time, if we don't find prima2 timer node in dt, don't panic the
system as we will make prima2 and marco use same kernel image.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
arch/arm/mach-prima2/Makefile
arch/arm/mach-prima2/common.c
arch/arm/mach-prima2/common.h
arch/arm/mach-prima2/timer-prima2.c [new file with mode: 0644]
arch/arm/mach-prima2/timer.c [deleted file]

index fc9ce22e2b5a58f44c6de493f123f01f3808867a..0007a6ec78f26ed2906c64dc66d700c2f3f986da 100644 (file)
@@ -1,4 +1,3 @@
-obj-y := timer.o
 obj-y += rstc.o
 obj-y += common.o
 obj-y += rtciobrg.o
@@ -6,3 +5,4 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o
 obj-$(CONFIG_CACHE_L2X0) += l2x0.o
 obj-$(CONFIG_SUSPEND) += pm.o sleep.o
 obj-$(CONFIG_SIRF_IRQ) += irq.o
+obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o
index ed3570e5eb8fd34e08f1daf7c17a1d772eb80a0f..8e6f6681b5469168d5769eca458324958a7bec46 100644 (file)
@@ -40,7 +40,7 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
        /* Maintainer: Barry Song <baohua.song@csr.com> */
        .map_io         = sirfsoc_map_lluart,
        .init_irq       = sirfsoc_of_irq_init,
-       .init_time      = sirfsoc_timer_init,
+       .init_time      = sirfsoc_prima2_timer_init,
        .dma_zone_size  = SZ_256M,
        .init_machine   = sirfsoc_mach_init,
        .init_late      = sirfsoc_init_late,
index 9c75f124e3cf466942d45da141f3bbe1cc83baa8..d6890b6833c98fc7e1d28b2d33c7f731e87624b2 100644 (file)
@@ -12,7 +12,7 @@
 #include <linux/init.h>
 #include <asm/mach/time.h>
 
-extern void sirfsoc_timer_init(void);
+extern void sirfsoc_prima2_timer_init(void);
 
 extern void __init sirfsoc_of_irq_init(void);
 extern void __init sirfsoc_of_clk_init(void);
diff --git a/arch/arm/mach-prima2/timer-prima2.c b/arch/arm/mach-prima2/timer-prima2.c
new file mode 100644 (file)
index 0000000..309e724
--- /dev/null
@@ -0,0 +1,247 @@
+/*
+ * System timer for CSR SiRFprimaII
+ *
+ * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/bitops.h>
+#include <linux/irq.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <mach/map.h>
+#include <asm/sched_clock.h>
+#include <asm/mach/time.h>
+
+#include "common.h"
+
+#define SIRFSOC_TIMER_COUNTER_LO       0x0000
+#define SIRFSOC_TIMER_COUNTER_HI       0x0004
+#define SIRFSOC_TIMER_MATCH_0          0x0008
+#define SIRFSOC_TIMER_MATCH_1          0x000C
+#define SIRFSOC_TIMER_MATCH_2          0x0010
+#define SIRFSOC_TIMER_MATCH_3          0x0014
+#define SIRFSOC_TIMER_MATCH_4          0x0018
+#define SIRFSOC_TIMER_MATCH_5          0x001C
+#define SIRFSOC_TIMER_STATUS           0x0020
+#define SIRFSOC_TIMER_INT_EN           0x0024
+#define SIRFSOC_TIMER_WATCHDOG_EN      0x0028
+#define SIRFSOC_TIMER_DIV              0x002C
+#define SIRFSOC_TIMER_LATCH            0x0030
+#define SIRFSOC_TIMER_LATCHED_LO       0x0034
+#define SIRFSOC_TIMER_LATCHED_HI       0x0038
+
+#define SIRFSOC_TIMER_WDT_INDEX                5
+
+#define SIRFSOC_TIMER_LATCH_BIT         BIT(0)
+
+#define SIRFSOC_TIMER_REG_CNT 11
+
+static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
+       SIRFSOC_TIMER_MATCH_0, SIRFSOC_TIMER_MATCH_1, SIRFSOC_TIMER_MATCH_2,
+       SIRFSOC_TIMER_MATCH_3, SIRFSOC_TIMER_MATCH_4, SIRFSOC_TIMER_MATCH_5,
+       SIRFSOC_TIMER_INT_EN, SIRFSOC_TIMER_WATCHDOG_EN, SIRFSOC_TIMER_DIV,
+       SIRFSOC_TIMER_LATCHED_LO, SIRFSOC_TIMER_LATCHED_HI,
+};
+
+static u32 sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT];
+
+static void __iomem *sirfsoc_timer_base;
+static void __init sirfsoc_of_timer_map(void);
+
+/* timer0 interrupt handler */
+static irqreturn_t sirfsoc_timer_interrupt(int irq, void *dev_id)
+{
+       struct clock_event_device *ce = dev_id;
+
+       WARN_ON(!(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_STATUS) & BIT(0)));
+
+       /* clear timer0 interrupt */
+       writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);
+
+       ce->event_handler(ce);
+
+       return IRQ_HANDLED;
+}
+
+/* read 64-bit timer counter */
+static cycle_t sirfsoc_timer_read(struct clocksource *cs)
+{
+       u64 cycles;
+
+       /* latch the 64-bit timer counter */
+       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
+       cycles = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_HI);
+       cycles = (cycles << 32) | readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO);
+
+       return cycles;
+}
+
+static int sirfsoc_timer_set_next_event(unsigned long delta,
+       struct clock_event_device *ce)
+{
+       unsigned long now, next;
+
+       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
+       now = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO);
+       next = now + delta;
+       writel_relaxed(next, sirfsoc_timer_base + SIRFSOC_TIMER_MATCH_0);
+       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
+       now = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO);
+
+       return next - now > delta ? -ETIME : 0;
+}
+
+static void sirfsoc_timer_set_mode(enum clock_event_mode mode,
+       struct clock_event_device *ce)
+{
+       u32 val = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN);
+       switch (mode) {
+       case CLOCK_EVT_MODE_PERIODIC:
+               WARN_ON(1);
+               break;
+       case CLOCK_EVT_MODE_ONESHOT:
+               writel_relaxed(val | BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN);
+               break;
+       case CLOCK_EVT_MODE_SHUTDOWN:
+               writel_relaxed(val & ~BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN);
+               break;
+       case CLOCK_EVT_MODE_UNUSED:
+       case CLOCK_EVT_MODE_RESUME:
+               break;
+       }
+}
+
+static void sirfsoc_clocksource_suspend(struct clocksource *cs)
+{
+       int i;
+
+       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
+
+       for (i = 0; i < SIRFSOC_TIMER_REG_CNT; i++)
+               sirfsoc_timer_reg_val[i] = readl_relaxed(sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
+}
+
+static void sirfsoc_clocksource_resume(struct clocksource *cs)
+{
+       int i;
+
+       for (i = 0; i < SIRFSOC_TIMER_REG_CNT - 2; i++)
+               writel_relaxed(sirfsoc_timer_reg_val[i], sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
+
+       writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 2], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
+       writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 1], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
+}
+
+static struct clock_event_device sirfsoc_clockevent = {
+       .name = "sirfsoc_clockevent",
+       .rating = 200,
+       .features = CLOCK_EVT_FEAT_ONESHOT,
+       .set_mode = sirfsoc_timer_set_mode,
+       .set_next_event = sirfsoc_timer_set_next_event,
+};
+
+static struct clocksource sirfsoc_clocksource = {
+       .name = "sirfsoc_clocksource",
+       .rating = 200,
+       .mask = CLOCKSOURCE_MASK(64),
+       .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+       .read = sirfsoc_timer_read,
+       .suspend = sirfsoc_clocksource_suspend,
+       .resume = sirfsoc_clocksource_resume,
+};
+
+static struct irqaction sirfsoc_timer_irq = {
+       .name = "sirfsoc_timer0",
+       .flags = IRQF_TIMER,
+       .irq = 0,
+       .handler = sirfsoc_timer_interrupt,
+       .dev_id = &sirfsoc_clockevent,
+};
+
+/* Overwrite weak default sched_clock with more precise one */
+static u32 notrace sirfsoc_read_sched_clock(void)
+{
+       return (u32)(sirfsoc_timer_read(NULL) & 0xffffffff);
+}
+
+static void __init sirfsoc_clockevent_init(void)
+{
+       clockevents_calc_mult_shift(&sirfsoc_clockevent, CLOCK_TICK_RATE, 60);
+
+       sirfsoc_clockevent.max_delta_ns =
+               clockevent_delta2ns(-2, &sirfsoc_clockevent);
+       sirfsoc_clockevent.min_delta_ns =
+               clockevent_delta2ns(2, &sirfsoc_clockevent);
+
+       sirfsoc_clockevent.cpumask = cpumask_of(0);
+       clockevents_register_device(&sirfsoc_clockevent);
+}
+
+/* initialize the kernel jiffy timer source */
+void __init sirfsoc_prima2_timer_init(void)
+{
+       unsigned long rate;
+       struct clk *clk;
+
+       /* initialize clocking early, we want to set the OS timer */
+       sirfsoc_of_clk_init();
+
+       /* timer's input clock is io clock */
+       clk = clk_get_sys("io", NULL);
+
+       BUG_ON(IS_ERR(clk));
+
+       rate = clk_get_rate(clk);
+
+       BUG_ON(rate < CLOCK_TICK_RATE);
+       BUG_ON(rate % CLOCK_TICK_RATE);
+
+       sirfsoc_of_timer_map();
+
+       writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV);
+       writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
+       writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
+       writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);
+
+       BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
+
+       setup_sched_clock(sirfsoc_read_sched_clock, 32, CLOCK_TICK_RATE);
+
+       BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq));
+
+       sirfsoc_clockevent_init();
+}
+
+static struct of_device_id timer_ids[] = {
+       { .compatible = "sirf,prima2-tick" },
+       {},
+};
+
+static void __init sirfsoc_of_timer_map(void)
+{
+       struct device_node *np;
+       const unsigned int *intspec;
+
+       np = of_find_matching_node(NULL, timer_ids);
+       if (!np)
+               return;
+       sirfsoc_timer_base = of_iomap(np, 0);
+       if (!sirfsoc_timer_base)
+               panic("unable to map timer cpu registers\n");
+
+       /* Get the interrupts property */
+       intspec = of_get_property(np, "interrupts", NULL);
+       BUG_ON(!intspec);
+       sirfsoc_timer_irq.irq = be32_to_cpup(intspec);
+
+       of_node_put(np);
+}
diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer.c
deleted file mode 100644 (file)
index 8c732a5..0000000
+++ /dev/null
@@ -1,247 +0,0 @@
-/*
- * System timer for CSR SiRFprimaII
- *
- * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
- *
- * Licensed under GPLv2 or later.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/clockchips.h>
-#include <linux/clocksource.h>
-#include <linux/bitops.h>
-#include <linux/irq.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <mach/map.h>
-#include <asm/sched_clock.h>
-#include <asm/mach/time.h>
-
-#include "common.h"
-
-#define SIRFSOC_TIMER_COUNTER_LO       0x0000
-#define SIRFSOC_TIMER_COUNTER_HI       0x0004
-#define SIRFSOC_TIMER_MATCH_0          0x0008
-#define SIRFSOC_TIMER_MATCH_1          0x000C
-#define SIRFSOC_TIMER_MATCH_2          0x0010
-#define SIRFSOC_TIMER_MATCH_3          0x0014
-#define SIRFSOC_TIMER_MATCH_4          0x0018
-#define SIRFSOC_TIMER_MATCH_5          0x001C
-#define SIRFSOC_TIMER_STATUS           0x0020
-#define SIRFSOC_TIMER_INT_EN           0x0024
-#define SIRFSOC_TIMER_WATCHDOG_EN      0x0028
-#define SIRFSOC_TIMER_DIV              0x002C
-#define SIRFSOC_TIMER_LATCH            0x0030
-#define SIRFSOC_TIMER_LATCHED_LO       0x0034
-#define SIRFSOC_TIMER_LATCHED_HI       0x0038
-
-#define SIRFSOC_TIMER_WDT_INDEX                5
-
-#define SIRFSOC_TIMER_LATCH_BIT         BIT(0)
-
-#define SIRFSOC_TIMER_REG_CNT 11
-
-static const u32 sirfsoc_timer_reg_list[SIRFSOC_TIMER_REG_CNT] = {
-       SIRFSOC_TIMER_MATCH_0, SIRFSOC_TIMER_MATCH_1, SIRFSOC_TIMER_MATCH_2,
-       SIRFSOC_TIMER_MATCH_3, SIRFSOC_TIMER_MATCH_4, SIRFSOC_TIMER_MATCH_5,
-       SIRFSOC_TIMER_INT_EN, SIRFSOC_TIMER_WATCHDOG_EN, SIRFSOC_TIMER_DIV,
-       SIRFSOC_TIMER_LATCHED_LO, SIRFSOC_TIMER_LATCHED_HI,
-};
-
-static u32 sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT];
-
-static void __iomem *sirfsoc_timer_base;
-static void __init sirfsoc_of_timer_map(void);
-
-/* timer0 interrupt handler */
-static irqreturn_t sirfsoc_timer_interrupt(int irq, void *dev_id)
-{
-       struct clock_event_device *ce = dev_id;
-
-       WARN_ON(!(readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_STATUS) & BIT(0)));
-
-       /* clear timer0 interrupt */
-       writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);
-
-       ce->event_handler(ce);
-
-       return IRQ_HANDLED;
-}
-
-/* read 64-bit timer counter */
-static cycle_t sirfsoc_timer_read(struct clocksource *cs)
-{
-       u64 cycles;
-
-       /* latch the 64-bit timer counter */
-       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
-       cycles = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_HI);
-       cycles = (cycles << 32) | readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO);
-
-       return cycles;
-}
-
-static int sirfsoc_timer_set_next_event(unsigned long delta,
-       struct clock_event_device *ce)
-{
-       unsigned long now, next;
-
-       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
-       now = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO);
-       next = now + delta;
-       writel_relaxed(next, sirfsoc_timer_base + SIRFSOC_TIMER_MATCH_0);
-       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
-       now = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_LO);
-
-       return next - now > delta ? -ETIME : 0;
-}
-
-static void sirfsoc_timer_set_mode(enum clock_event_mode mode,
-       struct clock_event_device *ce)
-{
-       u32 val = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN);
-       switch (mode) {
-       case CLOCK_EVT_MODE_PERIODIC:
-               WARN_ON(1);
-               break;
-       case CLOCK_EVT_MODE_ONESHOT:
-               writel_relaxed(val | BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN);
-               break;
-       case CLOCK_EVT_MODE_SHUTDOWN:
-               writel_relaxed(val & ~BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_INT_EN);
-               break;
-       case CLOCK_EVT_MODE_UNUSED:
-       case CLOCK_EVT_MODE_RESUME:
-               break;
-       }
-}
-
-static void sirfsoc_clocksource_suspend(struct clocksource *cs)
-{
-       int i;
-
-       writel_relaxed(SIRFSOC_TIMER_LATCH_BIT, sirfsoc_timer_base + SIRFSOC_TIMER_LATCH);
-
-       for (i = 0; i < SIRFSOC_TIMER_REG_CNT; i++)
-               sirfsoc_timer_reg_val[i] = readl_relaxed(sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
-}
-
-static void sirfsoc_clocksource_resume(struct clocksource *cs)
-{
-       int i;
-
-       for (i = 0; i < SIRFSOC_TIMER_REG_CNT - 2; i++)
-               writel_relaxed(sirfsoc_timer_reg_val[i], sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
-
-       writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 2], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
-       writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 1], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
-}
-
-static struct clock_event_device sirfsoc_clockevent = {
-       .name = "sirfsoc_clockevent",
-       .rating = 200,
-       .features = CLOCK_EVT_FEAT_ONESHOT,
-       .set_mode = sirfsoc_timer_set_mode,
-       .set_next_event = sirfsoc_timer_set_next_event,
-};
-
-static struct clocksource sirfsoc_clocksource = {
-       .name = "sirfsoc_clocksource",
-       .rating = 200,
-       .mask = CLOCKSOURCE_MASK(64),
-       .flags = CLOCK_SOURCE_IS_CONTINUOUS,
-       .read = sirfsoc_timer_read,
-       .suspend = sirfsoc_clocksource_suspend,
-       .resume = sirfsoc_clocksource_resume,
-};
-
-static struct irqaction sirfsoc_timer_irq = {
-       .name = "sirfsoc_timer0",
-       .flags = IRQF_TIMER,
-       .irq = 0,
-       .handler = sirfsoc_timer_interrupt,
-       .dev_id = &sirfsoc_clockevent,
-};
-
-/* Overwrite weak default sched_clock with more precise one */
-static u32 notrace sirfsoc_read_sched_clock(void)
-{
-       return (u32)(sirfsoc_timer_read(NULL) & 0xffffffff);
-}
-
-static void __init sirfsoc_clockevent_init(void)
-{
-       clockevents_calc_mult_shift(&sirfsoc_clockevent, CLOCK_TICK_RATE, 60);
-
-       sirfsoc_clockevent.max_delta_ns =
-               clockevent_delta2ns(-2, &sirfsoc_clockevent);
-       sirfsoc_clockevent.min_delta_ns =
-               clockevent_delta2ns(2, &sirfsoc_clockevent);
-
-       sirfsoc_clockevent.cpumask = cpumask_of(0);
-       clockevents_register_device(&sirfsoc_clockevent);
-}
-
-/* initialize the kernel jiffy timer source */
-void __init sirfsoc_timer_init(void)
-{
-       unsigned long rate;
-       struct clk *clk;
-
-       /* initialize clocking early, we want to set the OS timer */
-       sirfsoc_of_clk_init();
-
-       /* timer's input clock is io clock */
-       clk = clk_get_sys("io", NULL);
-
-       BUG_ON(IS_ERR(clk));
-
-       rate = clk_get_rate(clk);
-
-       BUG_ON(rate < CLOCK_TICK_RATE);
-       BUG_ON(rate % CLOCK_TICK_RATE);
-
-       sirfsoc_of_timer_map();
-
-       writel_relaxed(rate / CLOCK_TICK_RATE / 2 - 1, sirfsoc_timer_base + SIRFSOC_TIMER_DIV);
-       writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
-       writel_relaxed(0, sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
-       writel_relaxed(BIT(0), sirfsoc_timer_base + SIRFSOC_TIMER_STATUS);
-
-       BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
-
-       setup_sched_clock(sirfsoc_read_sched_clock, 32, CLOCK_TICK_RATE);
-
-       BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq));
-
-       sirfsoc_clockevent_init();
-}
-
-static struct of_device_id timer_ids[] = {
-       { .compatible = "sirf,prima2-tick" },
-       {},
-};
-
-void __init sirfsoc_of_timer_map(void)
-{
-       struct device_node *np;
-       const unsigned int *intspec;
-
-       np = of_find_matching_node(NULL, timer_ids);
-       if (!np)
-               panic("unable to find compatible timer node in dtb\n");
-       sirfsoc_timer_base = of_iomap(np, 0);
-       if (!sirfsoc_timer_base)
-               panic("unable to map timer cpu registers\n");
-
-       /* Get the interrupts property */
-       intspec = of_get_property(np, "interrupts", NULL);
-       BUG_ON(!intspec);
-       sirfsoc_timer_irq.irq = be32_to_cpup(intspec);
-
-       of_node_put(np);
-}