i40e: Add IWARP support for X722
authorAnjali Singhai Jain <anjali.singhai@intel.com>
Fri, 5 Jun 2015 16:20:32 +0000 (12:20 -0400)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Wed, 5 Aug 2015 23:53:46 +0000 (16:53 -0700)
X722 supports IWARP, this patch handles checking for PE critical errors.
Since the driver doesn't support the IWARP interface for now, this patch
just does bare minimum to log a message oif a PE critical error
happens.

Signed-off-by: Anjali Singhai Jain <anjali.singhai@intel.com>
Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com>
Tested-by: Jim Young <james.m.young@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/i40e/i40e_main.c

index d9cb87f383dddf67b3b5838d60140b1a3e9b5c7c..3bb832a2ec51a6997a7fab7d832176ce9a606977 100644 (file)
@@ -2908,6 +2908,9 @@ static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
              I40E_PFINT_ICR0_ENA_VFLR_MASK          |
              I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
 
+       if (pf->flags & I40E_FLAG_IWARP_ENABLED)
+               val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
+
        if (pf->flags & I40E_FLAG_PTP)
                val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
 
@@ -3198,6 +3201,13 @@ static irqreturn_t i40e_intr(int irq, void *data)
            (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
                pf->sw_int_count++;
 
+       if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
+           (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
+               ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
+               icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
+               dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
+       }
+
        /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
        if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {