ptx: add basic intrinsic support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127084 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td
index 0c9be78b0d10150ea4b3a171d3703294174bfcf9..ba66555c4e02ac8ef4ce457911e246c090bcf8f1 100644 (file)
--- a/include/llvm/Intrinsics.td
+++ b/include/llvm/Intrinsics.td
@@ -490,3 +490,4 @@ include "llvm/IntrinsicsARM.td"
 include "llvm/IntrinsicsCellSPU.td"
 include "llvm/IntrinsicsAlpha.td"
 include "llvm/IntrinsicsXCore.td"
+include "llvm/IntrinsicsPTX.td"

diff --git a/include/llvm/IntrinsicsARM.td b/include/llvm/IntrinsicsARM.td
index 546538a57abdb3eeb77dc897b78b27d9d7fc0ad2..823f095dbdc989f9ed659b2dc4404e39c0a10c7f 100644 (file)
--- a/include/llvm/IntrinsicsARM.td
+++ b/include/llvm/IntrinsicsARM.td
@@ -1,10 +1,10 @@
 //===- IntrinsicsARM.td - Defines ARM intrinsics -----------*- tablegen -*-===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
 //
 // This file defines all of the ARM-specific intrinsics.

diff --git a/include/llvm/IntrinsicsPTX.td b/include/llvm/IntrinsicsPTX.td
new file mode 100644 (file)
index 0000000..ec291e4
--- /dev/null
+++ b/include/llvm/IntrinsicsPTX.td
@@ -0,0 +1,32 @@
+//===- IntrinsicsPTX.td - Defines PTX intrinsics -----------*- tablegen -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines all of the PTX-specific intrinsics.
+//
+//===----------------------------------------------------------------------===//
+
+let TargetPrefix = "ptx" in {
+  multiclass PTXReadSpecialRegisterIntrinsic {
+    def _r64   : Intrinsic<[llvm_i64_ty],   [], [IntrNoMem]>;
+    def _v4i16 : Intrinsic<[llvm_v4i16_ty], [], [IntrNoMem]>;
+  }
+
+  multiclass PTXReadSpecialSubRegisterIntrinsic {
+    def _x : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
+    def _y : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
+    def _z : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
+    def _w : Intrinsic<[llvm_i16_ty], [], [IntrNoMem]>;
+  }
+}
+
+defm int_ptx_read_tid : PTXReadSpecialRegisterIntrinsic;
+defm int_ptx_read_tid : PTXReadSpecialSubRegisterIntrinsic;
+
+let TargetPrefix = "ptx" in
+  def int_ptx_bar_sync : Intrinsic<[], [llvm_i32_ty], []>;

diff --git a/lib/Target/PTX/PTXInstrInfo.td b/lib/Target/PTX/PTXInstrInfo.td
index 7325b705186e3d159446ada3b03c9348d64d38ba..bc155736ad8030a202e1f3662d9583fb1c281f9e 100644 (file)
--- a/lib/Target/PTX/PTXInstrInfo.td
+++ b/lib/Target/PTX/PTXInstrInfo.td
@@ -390,3 +390,7 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
   def EXIT : InstPTX<(outs), (ins), "exit", [(PTXexit)]>;
   def RET  : InstPTX<(outs), (ins), "ret",  [(PTXret)]>;
 }
+
+///===- Intrinsic Instructions --------------------------------------------===//
+
+include "PTXIntrinsicInstrInfo.td"

diff --git a/lib/Target/PTX/PTXIntrinsicInstrInfo.td b/lib/Target/PTX/PTXIntrinsicInstrInfo.td
new file mode 100644 (file)
index 0000000..3f2737e
--- /dev/null
+++ b/lib/Target/PTX/PTXIntrinsicInstrInfo.td
@@ -0,0 +1,35 @@
+//===- PTXIntrinsicInstrInfo.td - Defines PTX intrinsics ---*- tablegen -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines all of the PTX-specific intrinsic instructions.
+//
+//===----------------------------------------------------------------------===//
+
+// PTX Special Purpose Register Accessor Intrinsics
+
+class PTX_READ_SPECIAL_REGISTER<string regname, Intrinsic intop>
+  : InstPTX<(outs RRegu64:$d), (ins),
+            !strconcat("mov.u64\t$d, ", regname),
+            [(set RRegu64:$d, (intop))]>;
+
+class PTX_READ_SPECIAL_SUB_REGISTER<string regname, Intrinsic intop>
+  : InstPTX<(outs RRegu16:$d), (ins),
+            !strconcat("mov.u16\t$d, ", regname),
+            [(set RRegu16:$d, (intop))]>;
+
+def PTX_READ_TID_R64 : PTX_READ_SPECIAL_REGISTER<"tid", int_ptx_read_tid_r64>;
+def PTX_READ_TID_X : PTX_READ_SPECIAL_SUB_REGISTER<"tid.x", int_ptx_read_tid_x>;
+def PTX_READ_TID_Y : PTX_READ_SPECIAL_SUB_REGISTER<"tid.y", int_ptx_read_tid_y>;
+def PTX_READ_TID_Z : PTX_READ_SPECIAL_SUB_REGISTER<"tid.z", int_ptx_read_tid_z>;
+def PTX_READ_TID_W : PTX_READ_SPECIAL_SUB_REGISTER<"tid.w", int_ptx_read_tid_w>;
+
+// PTX Parallel Synchronization and Communication Intrinsics
+
+def PTX_BAR_SYNC : InstPTX<(outs), (ins i32imm:$i), "bar.sync\t$i",
+                           [(int_ptx_bar_sync imm:$i)]>;

diff --git a/test/CodeGen/PTX/intrinsic.ll b/test/CodeGen/PTX/intrinsic.ll
new file mode 100644 (file)
index 0000000..24c328b
--- /dev/null
+++ b/test/CodeGen/PTX/intrinsic.ll
@@ -0,0 +1,43 @@
+; RUN: llc < %s -march=ptx | FileCheck %s
+
+define ptx_device i16 @tid_x() {
+; CHECK: mov.u16 rh0, tid.x;
+; CHECK-NEXT: ret;
+       %x = call i16 @llvm.ptx.read.tid.x()
+       ret i16 %x
+}
+
+define ptx_device i16 @tid_y() {
+; CHECK: mov.u16 rh0, tid.y;
+; CHECK-NEXT: ret;
+       %x = call i16 @llvm.ptx.read.tid.y()
+       ret i16 %x
+}
+
+define ptx_device i16 @tid_z() {
+; CHECK: mov.u16 rh0, tid.z;
+; CHECK-NEXT: ret;
+       %x = call i16 @llvm.ptx.read.tid.z()
+       ret i16 %x
+}
+
+define ptx_device i16 @tid_w() {
+; CHECK: mov.u16 rh0, tid.w;
+; CHECK-NEXT: ret;
+       %x = call i16 @llvm.ptx.read.tid.w()
+       ret i16 %x
+}
+
+define ptx_device void @bar_sync() {
+; CHECK: bar.sync 0
+; CHECK-NEXT: ret;
+       call void @llvm.ptx.bar.sync(i32 0)
+       ret void
+}
+
+declare i16 @llvm.ptx.read.tid.x()
+declare i16 @llvm.ptx.read.tid.y()
+declare i16 @llvm.ptx.read.tid.z()
+declare i16 @llvm.ptx.read.tid.w()
+
+declare void @llvm.ptx.bar.sync(i32 %i)