ath9k_hw: fix calibration on 5 ghz
authorFelix Fietkau <nbd@openwrt.org>
Mon, 29 Aug 2011 08:06:14 +0000 (10:06 +0200)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 30 Aug 2011 19:26:16 +0000 (15:26 -0400)
ADC calibrations cannot run on 5 GHz with fast clock enabled. They
need to be disabled, otherwise they'll hang and IQ mismatch calibration
will not be run either.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Reported-by: Adrian Chadd <adrian@freebsd.org>
Cc: stable@kernel.org
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9002_calib.c

index 2d4c0910295bd39b08cb4abdc845c140d6bc22de..2d394af82171fe4031e1c1797fbb7db158879e8c 100644 (file)
@@ -41,7 +41,8 @@ static bool ar9002_hw_is_cal_supported(struct ath_hw *ah,
        case ADC_DC_CAL:
                /* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */
                if (!IS_CHAN_B(chan) &&
-                   !(IS_CHAN_2GHZ(chan) && IS_CHAN_HT20(chan)))
+                   !((IS_CHAN_2GHZ(chan) || IS_CHAN_A_FAST_CLOCK(ah, chan)) &&
+                     IS_CHAN_HT20(chan)))
                        supported = true;
                break;
        }