CLK("rk_serial.2", "uart_frac_div", &xin24m),
CLK("rk_serial.2", "uart", &xin24m),
CLK("rk_serial.2", "pclk_uart", &xin24m),
+
+ CLK("rk29_i2s.0", "i2s_div", &xin24m),
+ CLK("rk29_i2s.0", "i2s_frac_div", &xin24m),
+ CLK("rk29_i2s.0", "i2s", &xin24m),
+ CLK("rk29_i2s.0", "hclk_i2s", &xin24m),
};
void __init rk30_clock_init(void)
platform_device_register(&rk29xx_device_spi0m);
#endif
}
+#ifdef CONFIG_SND_RK29_SOC_I2S
+#ifdef CONFIG_SND_RK29_SOC_I2S_8CH
+static struct resource resource_iis0_8ch[] = {
+ [0] = {
+ .start = RK2928_I2S_PHYS,
+ .end = RK2928_I2S_PHYS + RK2928_I2S_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_I2S0_8CH_TX,
+ .end = DMACH_I2S0_8CH_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_I2S0_8CH_RX,
+ .end = DMACH_I2S0_8CH_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = IRQ_I2S,
+ .end = IRQ_I2S,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device device_iis0_8ch = {
+ .name = "rk29_i2s",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(resource_iis0_8ch),
+ .resource = resource_iis0_8ch,
+};
+#endif
+#endif
+static struct platform_device device_pcm = {
+ .name = "rockchip-audio",
+ .id = -1,
+};
+
+static void __init rk2928_init_i2s(void)
+{
+#ifdef CONFIG_SND_RK29_SOC_I2S_8CH
+ platform_device_register(&device_iis0_8ch);
+#endif
+ platform_device_register(&device_pcm);
+}
#ifdef CONFIG_KEYS_RK29
extern struct rk29_keys_platform_data rk29_keys_pdata;
static struct platform_device device_keys = {
#if defined(CONFIG_FIQ_DEBUGGER) && defined(DEBUG_UART_PHYS)
rk_serial_debug_init(DEBUG_UART_BASE, IRQ_DEBUG_UART, IRQ_UART_SIGNAL, -1);
#endif
+ rk2928_init_i2s();
return 0;
}
arch_initcall(rk2928_init_devices);
config SND_RK29_SOC_I2S_2CH
bool "Soc RK29 I2S 2 Channel support(I2S1)"
default n
- depends on SND_RK29_SOC_I2S
+ depends on SND_RK29_SOC_I2S && !ARCH_RK2928
help
This supports the use of the 2 Channel I2S interface on rk29 processors.
config SND_RK_SOC_I2S2_2CH
bool "Soc RK29 I2S 2 Channel support(I2S2)"
default n
- depends on SND_RK29_SOC_I2S && ARCH_RK30
+ depends on SND_RK29_SOC_I2S && ARCH_RK30 && !ARCH_RK2928
help
This supports the use of the 2 Channel I2S2 interface on rk30 processors.
ifdef CONFIG_ARCH_RK30
snd-soc-rockchip-i2s-objs := rk30_i2s.o
endif
+ifdef CONFIG_ARCH_RK2928
+snd-soc-rockchip-i2s-objs := rk30_i2s.o
+endif
snd-soc-rockchip-spdif-objs := rk29_spdif.o
obj-$(CONFIG_SND_RK29_SOC) += snd-soc-rockchip.o
obj-$(CONFIG_SND_RK29_SOC_AIC3111) += snd-soc-aic3111.o
obj-$(CONFIG_SND_RK29_SOC_AIC3262) += snd-soc-aic3262.o
obj-$(CONFIG_SND_RK29_SOC_HDMI) += snd-soc-hdmi.o
-obj-$(CONFIG_SND_RK29_SOC_RK610) += snd-soc-rk610.o
\ No newline at end of file
+obj-$(CONFIG_SND_RK29_SOC_RK610) += snd-soc-rk610.o
{
I2S_DBG("Enter %s, %d >>>>>>>>>>>\n", __func__, __LINE__);
switch(dai->id) {
+#ifdef CONFIG_ARCH_RK30
case 0:
rk30_mux_api_set(GPIO0A7_I2S8CHSDI_NAME, GPIO0A_I2S_8CH_SDI);
rk30_mux_api_set(GPIO0B0_I2S8CHCLK_NAME, GPIO0B_I2S_8CH_CLK);
rk30_mux_api_set(GPIO0D4_I2S22CHSDI_SMCADDR0_NAME, GPIO0D_I2S2_2CH_SDI);
rk30_mux_api_set(GPIO0D5_I2S22CHSDO_SMCADDR1_NAME, GPIO0D_I2S2_2CH_SDO);
break;
+#endif
+#ifdef CONFIG_ARCH_RK2928
+ case 0:
+ rk30_mux_api_set(GPIO1A0_I2S_MCLK_NAME, GPIO1A_I2S_MCLK);
+ rk30_mux_api_set(GPIO1A1_I2S_SCLK_NAME, GPIO1A_I2S_SCLK);
+ rk30_mux_api_set(GPIO1A2_I2S_LRCKRX_NAME, GPIO1A_I2S_LRCKRX);
+ rk30_mux_api_set(GPIO1A3_I2S_LRCKTX_NAME, GPIO1A_I2S_LRCKTX);
+ rk30_mux_api_set(GPIO1A4_I2S_SDO_NAME, GPIO1A_I2S_SDO);
+ rk30_mux_api_set(GPIO1A5_I2S_SDI_NAME, GPIO1A_I2S_SDI);
+#endif
default:
I2S_DBG("Enter:%s, %d, Error For DevId!!!", __FUNCTION__, __LINE__);
return -EINVAL;
switch(pdev->id)
{
+#ifdef CONFIG_ARCH_RK30
case 0:
i2s->dma_capture->channel = DMACH_I2S0_8CH_RX;
i2s->dma_capture->dma_addr = RK30_I2S0_8CH_PHYS + I2S_RXR_BUFF;
i2s->dma_capture->dma_addr = RK30_I2S2_2CH_PHYS + I2S_RXR_BUFF;
i2s->dma_playback->channel = DMACH_I2S2_2CH_TX;
i2s->dma_playback->dma_addr = RK30_I2S2_2CH_PHYS + I2S_TXR_BUFF;
- break;
+ break;
+#endif
+#ifdef CONFIG_ARCH_RK2928
+ case 0:
+ i2s->dma_capture->channel = DMACH_I2S0_8CH_RX;
+ i2s->dma_capture->dma_addr = RK2928_I2S_PHYS + I2S_RXR_BUFF;
+ i2s->dma_playback->channel = DMACH_I2S0_8CH_TX;
+ i2s->dma_playback->dma_addr = RK2928_I2S_PHYS + I2S_TXR_BUFF;
+ break;
+#endif
}
i2s->dma_capture->client = &rk29_dma_client_in;