#define RK29_SDMMC_ERROR_FLAGS (SDMMC_INT_FRUN | SDMMC_INT_HLE )
-#ifdef CONFIG_ARCH_RK29
+#if defined(CONFIG_ARCH_RK29)
#define RK29_SDMMC_INTMASK_USEDMA (SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS | SDMMC_INT_CD)
#define RK29_SDMMC_INTMASK_USEIO (SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | RK29_SDMMC_ERROR_FLAGS | SDMMC_INT_CD| SDMMC_INT_TXDR | SDMMC_INT_RXDR )
-#else
+
+#elif defined(CONFIG_ARCH_RK30)
#define RK29_SDMMC_INTMASK_USEDMA (SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | SDMMC_INT_UNBUSY |RK29_SDMMC_ERROR_FLAGS | SDMMC_INT_CD)
#define RK29_SDMMC_INTMASK_USEIO (SDMMC_INT_CMD_DONE | SDMMC_INT_DTO | SDMMC_INT_UNBUSY |RK29_SDMMC_ERROR_FLAGS | SDMMC_INT_CD| SDMMC_INT_TXDR | SDMMC_INT_RXDR )
#endif
#define RK29_SDMMC_WAIT_DTO_INTERNVAL 4500 //The time interval from the CMD_DONE_INT to DTO_INT
#define RK29_SDMMC_REMOVAL_DELAY 2000 //The time interval from the CD_INT to detect_timer react.
-#define RK29_SDMMC_VERSION "Ver.3.02 The last modify date is 2012-03-12,modifyed by XBW."
+#define RK29_SDMMC_VERSION "Ver.3.03 The last modify date is 2012-03-23,modifyed by XBW."
#if !defined(CONFIG_USE_SDMMC0_FOR_WIFI_DEVELOP_BOARD)
#define RK29_CTRL_SDMMC_ID 0 //mainly used by SDMMC
#define RK29_CTRL_SDIO2_ID 2
#endif
+#define SDMMC_CLOCK_TEST 1
#define RK29_SDMMC_NOTIFY_REMOVE_INSERTION /* use sysfs to notify the removal or insertion of sd-card*/
//#define RK29_SDMMC_LIST_QUEUE /* use list-queue for multi-card*/
}
/* reset */
-#ifdef CONFIG_ARCH_RK29
+#if defined(CONFIG_ARCH_RK29)
rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET ));
-#else
+#elif defined(CONFIG_ARCH_RK30)
rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
#endif
timeOut = 1000;
if(RK29_CTRL_SDMMC_ID == host->pdev->id)
{
//SDMMC use low-power mode
+ #if SDMMC_CLOCK_TEST
if (enable)
{
- value = (SDMMC_CLKEN_LOW_PWR | SDMMC_CLKEN_ENABLE);
+ value = (SDMMC_CLKEN_ENABLE);
}
else
{
- value = (SDMMC_CLKEN_LOW_PWR | SDMMC_CLKEN_DISABLE);
+ value = (SDMMC_CLKEN_DISABLE);
+ }
+
+ #else
+ {
+ if (enable)
+ {
+ value = (SDMMC_CLKEN_LOW_PWR | SDMMC_CLKEN_ENABLE);
+ }
+ else
+ {
+ value = (SDMMC_CLKEN_LOW_PWR | SDMMC_CLKEN_DISABLE);
+ }
}
+ #endif
}
else
{
host->error_times = 0;
#if 1
- del_timer_sync(&host->request_timer);
- del_timer_sync(&host->DTO_timer);
+ del_timer(&host->request_timer);
+ del_timer(&host->DTO_timer);
rk29_sdmmc_dealwith_timeout(host);
#endif
__FUNCTION__, __LINE__,host->cmd->opcode,pending, host->dma_name);
rk29_sdmmc_write(host->regs, SDMMC_RINTSTS,SDMMC_INT_DTO);
- del_timer_sync(&host->DTO_timer); //delete the timer for INT_DTO
+ del_timer(&host->DTO_timer); //delete the timer for INT_DTO
host->data_status |= status;
goto Exit_INT;
}
-#ifndef CONFIG_ARCH_RK29
+#if defined(CONFIG_ARCH_RK30)
if(pending & SDMMC_INT_UNBUSY)
{
// printk("%d..%s: ==test=== xbw======\n", __LINE__, __FUNCTION__);
INIT_LIST_HEAD(&host->queue);
#endif
-#ifdef CONFIG_ARCH_RK29
host->clk = clk_get(&pdev->dev, "mmc");
-#elif CONFIG_ARCH_RK30
- host->clk = clk_get(&pdev->dev, "sdmmc");
-#endif
-
-#if 0 //ÔÝʱÆÁ±Î£¬RK30 CLOCKÄ£¿é»¹Î´ÕûÀíºÃ¡£ !!!!!!!!!!!!!!!!!!!!!
#if RK29_SDMMC_DEFAULT_SDIO_FREQ
clk_set_rate(host->clk,SDHC_FPP_FREQ);
else
clk_set_rate(host->clk,RK29_MAX_SDIO_FREQ);
-#endif
-
#endif
clk_enable(host->clk);
-
-#ifdef CONFIG_ARCH_RK29
clk_enable(clk_get(&pdev->dev, "hclk_mmc"));
-#elif CONFIG_ARCH_RK30
- clk_enable(clk_get(&pdev->dev, "hclk_sdmmc"));
-#endif
ret = -ENOMEM;
host->regs = ioremap(regs->start, regs->end - regs->start + 1);
memcpy(host->dma_name, pdata->dma_name, 8);
host->use_dma = pdata->use_dma;
+ printk("%s..%s..%d..*********** Bus clock= %d Khz ====xbw[%s]===\n",\
+ __FILE__, __FUNCTION__,__LINE__,clk_get_rate(host->clk)/1000, host->dma_name);
+
/*DMA init*/
if(host->use_dma)
{
#ifdef CONFIG_PM
-#ifdef CONFIG_ARCH_RK29
+#if defined(CONFIG_ARCH_RK29)
static irqreturn_t det_keys_isr(int irq, void *dev_id)
{
struct rk29_sdmmc *host = dev_id;
gpio_free(RK29_PIN2_PA2);
rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);
}
-#else
+
+#elif defined(CONFIG_ARCH_RK30)
static irqreturn_t det_keys_isr(int irq, void *dev_id)
{
struct rk29_sdmmc *host = dev_id;
#define SDMMC_DEBNCE (0x064) //Card detect debounce register
#define SDMMC_USRID (0x068) //User ID register
-#ifdef CONFIG_ARCH_RK29
+#if defined(CONFIG_ARCH_RK29)
#define SDMMC_DATA (0x100)
-#else
+#elif defined(CONFIG_ARCH_RK30)
#define SDMMC_VERID (0x06c) //Version ID register
#define SDMMC_UHS_REG (0x074) //UHS-I register
#define SDMMC_RST_n (0x068) //Hardware reset register
#define SDMMC_CTYPE_1BIT RK_CLEAR_BIT(0)
/* Interrupt status & mask register defines(base+0x24) */
-#ifdef CONFIG_ARCH_RK29
+#if defined(CONFIG_ARCH_RK29)
#define SDMMC_INT_SDIO RK2818_BIT(16) //SDIO interrupt
-#else
+#elif defined(CONFIG_ARCH_RK30)
#define SDMMC_INT_SDIO RK2818_BIT(24) //SDIO interrupt
#define SDMMC_INT_UNBUSY RK2818_BIT(16) //data no busy interrupt
#endif
#define SD_MSIZE_128 (0x6 << 28)
#define SD_MSIZE_256 (0x7 << 28)
-#ifdef CONFIG_ARCH_RK29
+#if defined(CONFIG_ARCH_RK29)
#define FIFO_DEPTH (0x20) //FIFO depth = 32 word
#define RX_WMARK_SHIFT (16)
#define TX_WMARK_SHIFT (0)
/* FIFO watermark */
#define RX_WMARK (0xF) //RX watermark level set to 15
#define TX_WMARK (0x10) //TX watermark level set to 16
-#else
+
+#elif defined(CONFIG_ARCH_RK30)
#define FIFO_DEPTH (0x100) //FIFO depth = 256 word
#define RX_WMARK_SHIFT (16)
#define TX_WMARK_SHIFT (0)
#define FOD_FREQ (300000) // in the identify stage, unit: hz, max is 400Khz,
// the least frequency is FREQ_HCLK_MAX/8
#define SD_FPP_FREQ (24000000) // normal sd freq, 25Mhz
-#define SDHC_FPP_FREQ (49000000) // SDHC in the highspeed. unit is hz, max is 50Mhz.
+#define SDHC_FPP_FREQ (49500000) // SDHC in the highspeed. unit is hz, max is 50Mhz.
#define MMC_FPP_FREQ (19000000) // MMC freq, unit is hz, max is 20MHz
#define MMCHS_26_FPP_FREQ (24000000) // highspeed mode support 26M HS-MMC, unit is hz, max is 26Mhz,
-#define MMCHS_52_FPP_FREQ (49000000) // highspeed support 52M HS-MMC, unit is hz, max is 52Mhz,
+#define MMCHS_52_FPP_FREQ (49500000) // highspeed support 52M HS-MMC, unit is hz, max is 52Mhz,
#endif /* MMC_MMC_PROTOCOL_H */