[DebugInfo] Fix ARM/AArch64 prologue_end position. Related to D11268.

Summary:
This review is related to another review request http://reviews.llvm.org/D11268, does the same and merely fixes a couple of issues with it.

D11268 is quite old and has merge conflicts against the current trunk.
This request
 - rebases D11268 onto the new trunk;
 - resolves the merge conflicts;
 - fixes the prologue_end tests, which do not pass due to the subprogram definitions not marked as distinct.

Reviewers: echristo, rengolin, kubabrecka

Subscribers: aemerson, rengolin, jyknight, dsanders, llvm-commits, asl

Differential Revision: http://reviews.llvm.org/D14338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@252177 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64FrameLowering.cpp b/lib/Target/AArch64/AArch64FrameLowering.cpp
index cd5821f081c32726adf26392ab88bc31aa4935d3..6ccb959239e06f21f13a57ef6add87a1f8d3a84a 100644 (file)
--- a/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -284,13 +284,16 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
       MF.getSubtarget().getRegisterInfo());
   const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
   MachineModuleInfo &MMI = MF.getMMI();
-  AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
-  bool needsFrameMoves = MMI.hasDebugInfo() || Fn->needsUnwindTableEntry();
-  bool HasFP = hasFP(MF);
-  DebugLoc DL = MBB.findDebugLoc(MBBI);
-
-  // All calls are tail calls in GHC calling conv, and functions have no
-  // prologue/epilogue.
+  AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();\r
+  bool needsFrameMoves = MMI.hasDebugInfo() || Fn->needsUnwindTableEntry();\r
+  bool HasFP = hasFP(MF);\r
+\r
+  // Debug location must be unknown since the first debug location is used\r
+  // to determine the end of the prologue.\r
+  DebugLoc DL;\r
+\r
+  // All calls are tail calls in GHC calling conv, and functions have no\r
+  // prologue/epilogue.\r
   if (MF.getFunction()->getCallingConv() == CallingConv::GHC)
     return;
 
@@ -727,15 +730,12 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
   MachineFunction &MF = *MBB.getParent();
   const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
   unsigned Count = CSI.size();
-  DebugLoc DL;
-  assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
-
-  if (MI != MBB.end())
-    DL = MI->getDebugLoc();
-
-  for (unsigned i = 0; i < Count; i += 2) {
-    unsigned idx = Count - i - 2;
-    unsigned Reg1 = CSI[idx].getReg();
+  DebugLoc DL;\r
+  assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");\r
+\r
+  for (unsigned i = 0; i < Count; i += 2) {\r
+    unsigned idx = Count - i - 2;\r
+    unsigned Reg1 = CSI[idx].getReg();\r
     unsigned Reg2 = CSI[idx + 1].getReg();
     // GPRs and FPRs are saved in pairs of 64-bit regs. We expect the CSI
     // list to come in sorted by frame index so that we can issue the store

diff --git a/lib/Target/ARM/ARMFrameLowering.cpp b/lib/Target/ARM/ARMFrameLowering.cpp
index 966f0310f0b32bdb182037b7a5b4be8dd8be3b06..98655203a4fd48d88590f395f2c3aaf85fd9bb7f 100644 (file)
--- a/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/lib/Target/ARM/ARMFrameLowering.cpp
@@ -302,13 +302,17 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
          "This emitPrologue does not support Thumb1!");
   bool isARM = !AFI->isThumbFunction();
   unsigned Align = STI.getFrameLowering()->getStackAlignment();
-  unsigned ArgRegsSaveSize = AFI->getArgRegsSaveSize();
-  unsigned NumBytes = MFI->getStackSize();
-  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
-  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
-  unsigned FramePtr = RegInfo->getFrameRegister(MF);
-
-  // Determine the sizes of each callee-save spill areas and record which frame
+  unsigned ArgRegsSaveSize = AFI->getArgRegsSaveSize();\r
+  unsigned NumBytes = MFI->getStackSize();\r
+  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();\r
+\r
+  // Debug location must be unknown since the first debug location is used\r
+  // to determine the end of the prologue.\r
+  DebugLoc dl;\r
+  \r
+  unsigned FramePtr = RegInfo->getFrameRegister(MF);\r
+\r
+  // Determine the sizes of each callee-save spill areas and record which frame\r
   // belongs to which callee-save spill areas.
   unsigned GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0;
   int FramePtrSpillFI = 0;
@@ -890,13 +894,12 @@ void ARMFrameLowering::emitPushInst(MachineBasicBlock &MBB,
                                     unsigned NumAlignedDPRCS2Regs,
                                     unsigned MIFlags) const {
   MachineFunction &MF = *MBB.getParent();
-  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
-
-  DebugLoc DL;
-  if (MI != MBB.end()) DL = MI->getDebugLoc();
-
-  SmallVector<std::pair<unsigned,bool>, 4> Regs;
-  unsigned i = CSI.size();
+  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();\r
+\r
+  DebugLoc DL;\r
+\r
+  SmallVector<std::pair<unsigned,bool>, 4> Regs;\r
+  unsigned i = CSI.size();\r
   while (i != 0) {
     unsigned LastReg = 0;
     for (; i != 0; --i) {

diff --git a/lib/Target/ARM/Thumb1FrameLowering.cpp b/lib/Target/ARM/Thumb1FrameLowering.cpp
index 6ee5bb82d1cb5434a86679d1ddbbccac152dddfb..791e0acbe26e8bf18f378d55f9acc192aaec50ac 100644 (file)
--- a/lib/Target/ARM/Thumb1FrameLowering.cpp
+++ b/lib/Target/ARM/Thumb1FrameLowering.cpp
@@ -97,13 +97,17 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF,
 
   unsigned ArgRegsSaveSize = AFI->getArgRegsSaveSize();
   unsigned NumBytes = MFI->getStackSize();
-  assert(NumBytes >= ArgRegsSaveSize &&
-         "ArgRegsSaveSize is included in NumBytes");
-  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
-  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
-  unsigned FramePtr = RegInfo->getFrameRegister(MF);
-  unsigned BasePtr = RegInfo->getBaseRegister();
-  int CFAOffset = 0;
+  assert(NumBytes >= ArgRegsSaveSize &&\r
+         "ArgRegsSaveSize is included in NumBytes");\r
+  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();\r
+\r
+  // Debug location must be unknown since the first debug location is used\r
+  // to determine the end of the prologue.\r
+  DebugLoc dl;\r
+  \r
+  unsigned FramePtr = RegInfo->getFrameRegister(MF);\r
+  unsigned BasePtr = RegInfo->getBaseRegister();\r
+  int CFAOffset = 0;\r
 
   // Thumb add/sub sp, imm8 instructions implicitly multiply the offset by 4.
   NumBytes = (NumBytes + 3) & ~3;
@@ -165,14 +169,12 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF,
       DPRCSSize += 8;
     }
   }
-
-  if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
-    ++MBBI;
-    if (MBBI != MBB.end())
-      dl = MBBI->getDebugLoc();
-  }
-
-  // Determine starting offsets of spill areas.
+\r
+  if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {\r
+    ++MBBI;\r
+  }\r
+\r
+  // Determine starting offsets of spill areas.\r
   unsigned DPRCSOffset  = NumBytes - ArgRegsSaveSize - (GPRCS1Size + GPRCS2Size + DPRCSSize);
   unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
   unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
@@ -543,14 +545,12 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB,
   if (CSI.empty())
     return false;
 
-  DebugLoc DL;
-  const TargetInstrInfo &TII = *STI.getInstrInfo();
-
-  if (MI != MBB.end()) DL = MI->getDebugLoc();
-
-  MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));
-  AddDefaultPred(MIB);
-  for (unsigned i = CSI.size(); i != 0; --i) {
+  DebugLoc DL;\r
+  const TargetInstrInfo &TII = *STI.getInstrInfo();\r
+\r
+  MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));\r
+  AddDefaultPred(MIB);\r
+  for (unsigned i = CSI.size(); i != 0; --i) {\r
     unsigned Reg = CSI[i-1].getReg();
     bool isKill = true;
 

diff --git a/lib/Target/Mips/Mips16FrameLowering.cpp b/lib/Target/Mips/Mips16FrameLowering.cpp
index 71c2bdba2f995f00beab790f287f33bef1866570..7994c61fcdd62cb9ecb5087e095251ed0ce817ec 100644 (file)
--- a/lib/Target/Mips/Mips16FrameLowering.cpp
+++ b/lib/Target/Mips/Mips16FrameLowering.cpp
@@ -36,13 +36,17 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF,
                                        MachineBasicBlock &MBB) const {
   assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
   MachineFrameInfo *MFI = MF.getFrameInfo();
-  const Mips16InstrInfo &TII =
-      *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
-  MachineBasicBlock::iterator MBBI = MBB.begin();
-  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
-  uint64_t StackSize = MFI->getStackSize();
-
-  // No need to allocate space on the stack.
+  const Mips16InstrInfo &TII =\r
+      *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());\r
+  MachineBasicBlock::iterator MBBI = MBB.begin();\r
+\r
+  // Debug location must be unknown since the first debug location is used\r
+  // to determine the end of the prologue.\r
+  DebugLoc dl;\r
+\r
+  uint64_t StackSize = MFI->getStackSize();\r
+\r
+  // No need to allocate space on the stack.\r
   if (StackSize == 0 && !MFI->adjustsStack()) return;
 
   MachineModuleInfo &MMI = MF.getMMI();

diff --git a/lib/Target/Mips/Mips16ISelDAGToDAG.cpp b/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
index bce2c1eb448595b86b79c592016c9e30c7898a0c..f471464b904178c80521b88c32dc8a2972eaeae3 100644 (file)
--- a/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
+++ b/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
@@ -70,13 +70,13 @@ void Mips16DAGToDAGISel::initGlobalBaseReg(MachineFunction &MF) {
     return;
 
   MachineBasicBlock &MBB = MF.front();
-  MachineBasicBlock::iterator I = MBB.begin();
-  MachineRegisterInfo &RegInfo = MF.getRegInfo();
-  const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
-  DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
-  unsigned V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg();
-  const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass;
-
+  MachineBasicBlock::iterator I = MBB.begin();\r
+  MachineRegisterInfo &RegInfo = MF.getRegInfo();\r
+  const TargetInstrInfo &TII = *Subtarget->getInstrInfo();\r
+  DebugLoc DL;\r
+  unsigned V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg();\r
+  const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass;\r
+\r
   V0 = RegInfo.createVirtualRegister(RC);
   V1 = RegInfo.createVirtualRegister(RC);
   V2 = RegInfo.createVirtualRegister(RC);

diff --git a/lib/Target/Mips/Mips16InstrInfo.cpp b/lib/Target/Mips/Mips16InstrInfo.cpp
index a49572efdbf99ef392cf9e53331507a9a61e880e..c7c87d38db944b48a50843a32cfdd845ffd164b1 100644 (file)
--- a/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -193,13 +193,13 @@ static void addSaveRestoreRegs(MachineInstrBuilder &MIB,
   }
 }
 // Adjust SP by FrameSize bytes. Save RA, S0, S1
-void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,
-                                MachineBasicBlock &MBB,
-                                MachineBasicBlock::iterator I) const {
-  DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
-  MachineFunction &MF = *MBB.getParent();
-  MachineFrameInfo *MFI    = MF.getFrameInfo();
-  const BitVector Reserved = RI.getReservedRegs(MF);
+void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,\r
+                                MachineBasicBlock &MBB,\r
+                                MachineBasicBlock::iterator I) const {\r
+  DebugLoc DL;\r
+  MachineFunction &MF = *MBB.getParent();\r
+  MachineFrameInfo *MFI    = MF.getFrameInfo();\r
+  const BitVector Reserved = RI.getReservedRegs(MF);\r
   bool SaveS2 = Reserved[Mips::S2];
   MachineInstrBuilder MIB;
   unsigned Opc = ((FrameSize <= 128) && !SaveS2)? Mips::Save16:Mips::SaveX16;
@@ -260,13 +260,13 @@ void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
 // This is clearly safe at prologue and epilogue.
 //
 void Mips16InstrInfo::adjustStackPtrBig(unsigned SP, int64_t Amount,
-                                        MachineBasicBlock &MBB,
-                                        MachineBasicBlock::iterator I,
-                                        unsigned Reg1, unsigned Reg2) const {
-  DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
-  //
-  // li reg1, constant
-  // move reg2, sp
+                                        MachineBasicBlock &MBB,\r
+                                        MachineBasicBlock::iterator I,\r
+                                        unsigned Reg1, unsigned Reg2) const {\r
+  DebugLoc DL;\r
+  //\r
+  // li reg1, constant\r
+  // move reg2, sp\r
   // add reg1, reg1, reg2
   // move sp, reg1
   //
@@ -443,13 +443,13 @@ const MCInstrDesc &Mips16InstrInfo::AddiuSpImm(int64_t Imm) const {
   else
     return get(Mips::AddiuSpImmX16);
 }
-
-void Mips16InstrInfo::BuildAddiuSpImm
-  (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const {
-  DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
-  BuildMI(MBB, I, DL, AddiuSpImm(Imm)).addImm(Imm);
-}
-
+\r
+void Mips16InstrInfo::BuildAddiuSpImm\r
+  (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const {\r
+  DebugLoc DL;\r
+  BuildMI(MBB, I, DL, AddiuSpImm(Imm)).addImm(Imm);\r
+}\r
+\r
 const MipsInstrInfo *llvm::createMips16InstrInfo(const MipsSubtarget &STI) {
   return new Mips16InstrInfo(STI);
 }

diff --git a/lib/Target/Sparc/SparcFrameLowering.cpp b/lib/Target/Sparc/SparcFrameLowering.cpp
index b92450962f0b587d4476fb2fd0e2f54472ca7ed6..a9d22ccdae36ebf37afd64451229ed466cca11f8 100644 (file)
--- a/lib/Target/Sparc/SparcFrameLowering.cpp
+++ b/lib/Target/Sparc/SparcFrameLowering.cpp
@@ -41,13 +41,13 @@ void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF,
                                           MachineBasicBlock &MBB,
                                           MachineBasicBlock::iterator MBBI,
                                           int NumBytes,
-                                          unsigned ADDrr,
-                                          unsigned ADDri) const {
-
-  DebugLoc dl = (MBBI != MBB.end()) ? MBBI->getDebugLoc() : DebugLoc();
-  const SparcInstrInfo &TII =
-      *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
-
+                                          unsigned ADDrr,\r
+                                          unsigned ADDri) const {\r
+\r
+  DebugLoc dl;\r
+  const SparcInstrInfo &TII =\r
+      *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());\r
+\r
   if (NumBytes >= -4096 && NumBytes < 4096) {
     BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
       .addReg(SP::O6).addImm(NumBytes);
@@ -93,7 +93,9 @@ void SparcFrameLowering::emitPrologue(MachineFunction &MF,
   const SparcRegisterInfo &RegInfo =
       *static_cast<const SparcRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
   MachineBasicBlock::iterator MBBI = MBB.begin();
-  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
+  // Debug location must be unknown since the first debug location is used
+  // to determine the end of the prologue.
+  DebugLoc dl;
   bool NeedsStackRealignment = RegInfo.needsStackRealignment(MF);
 
   // FIXME: unfortunately, returning false from canRealignStack

diff --git a/lib/Target/SystemZ/SystemZFrameLowering.cpp b/lib/Target/SystemZ/SystemZFrameLowering.cpp
index 12c4310b78f2d25070cce398aaf31e61c3a0bfe4..940ea11785293b40ee9c5c12eca4a3db93f2159e 100644 (file)
--- a/lib/Target/SystemZ/SystemZFrameLowering.cpp
+++ b/lib/Target/SystemZ/SystemZFrameLowering.cpp
@@ -130,13 +130,13 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB,
     return false;
 
   MachineFunction &MF = *MBB.getParent();
-  const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
-  SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
-  bool IsVarArg = MF.getFunction()->isVarArg();
-  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
-
-  // Scan the call-saved GPRs and find the bounds of the register spill area.
-  unsigned LowGPR = 0;
+  const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();\r
+  SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();\r
+  bool IsVarArg = MF.getFunction()->isVarArg();\r
+  DebugLoc DL;\r
+\r
+  // Scan the call-saved GPRs and find the bounds of the register spill area.\r
+  unsigned LowGPR = 0;\r
   unsigned HighGPR = SystemZ::R15D;
   unsigned StartOffset = -1U;
   for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
@@ -319,13 +319,16 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
   SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
   MachineBasicBlock::iterator MBBI = MBB.begin();
   MachineModuleInfo &MMI = MF.getMMI();
-  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
-  const std::vector<CalleeSavedInfo> &CSI = MFFrame->getCalleeSavedInfo();
-  bool HasFP = hasFP(MF);
-  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
-
-  // The current offset of the stack pointer from the CFA.
-  int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;
+  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();\r
+  const std::vector<CalleeSavedInfo> &CSI = MFFrame->getCalleeSavedInfo();\r
+  bool HasFP = hasFP(MF);\r
+\r
+  // Debug location must be unknown since the first debug location is used\r
+  // to determine the end of the prologue.\r
+  DebugLoc DL;\r
+\r
+  // The current offset of the stack pointer from the CFA.\r
+  int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;\r
 
   if (ZFI->getLowSavedGPR()) {
     // Skip over the GPR saves.

diff --git a/lib/Target/X86/X86FrameLowering.cpp b/lib/Target/X86/X86FrameLowering.cpp
index ae4cc77fcc949b47e1013006d15a349fa4d47bbc..be6cec6fa59b2c274e05aea63839cd4668d3f0a0 100644 (file)
--- a/lib/Target/X86/X86FrameLowering.cpp
+++ b/lib/Target/X86/X86FrameLowering.cpp
@@ -637,12 +637,15 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
   unsigned FramePtr = TRI->getFrameRegister(MF);
   const unsigned MachineFramePtr =
       STI.isTarget64BitILP32()
-          ? getX86SubSuperRegister(FramePtr, MVT::i64, false)
-          : FramePtr;
-  unsigned BasePtr = TRI->getBaseRegister();
-  DebugLoc DL;
-
-  // Add RETADDR move area to callee saved frame size.
+          ? getX86SubSuperRegister(FramePtr, MVT::i64, false)\r
+          : FramePtr;\r
+  unsigned BasePtr = TRI->getBaseRegister();\r
+  \r
+  // Debug location must be unknown since the first debug location is used\r
+  // to determine the end of the prologue.\r
+  DebugLoc DL;\r
+\r
+  // Add RETADDR move area to callee saved frame size.\r
   int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
   if (TailCallReturnAddrDelta && IsWin64Prologue)
     report_fatal_error("Can't handle guaranteed tail call under win64 yet");

diff --git a/test/DebugInfo/AArch64/prologue_end.ll b/test/DebugInfo/AArch64/prologue_end.ll
new file mode 100644 (file)
index 0000000..4887fb0
--- /dev/null
+++ b/test/DebugInfo/AArch64/prologue_end.ll
@@ -0,0 +1,43 @@
+; RUN: llc -disable-fp-elim -O0 %s -mtriple aarch64-apple-darwin -o - | FileCheck %s\r
+\r
+; int func(void);\r
+; void prologue_end_test() {\r
+;   func();\r
+;   func();\r
+; }\r
+\r
+define void @prologue_end_test() nounwind uwtable {\r
+  ; CHECK: prologue_end_test:\r
+  ; CHECK: .cfi_startproc\r
+  ; CHECK: stp x29, x30\r
+  ; CHECK: mov x29, sp\r
+  ; CHECK: sub sp, sp\r
+  ; CHECK: .loc 1 3 3 prologue_end\r
+  ; CHECK: bl _func\r
+  ; CHECK: bl _func\r
+entry:\r
+  %call = call i32 @func(), !dbg !11\r
+  %call1 = call i32 @func(), !dbg !12\r
+  ret void, !dbg !13\r
+}\r
+\r
+declare i32 @func()\r
+\r
+!llvm.dbg.cu = !{!0}\r
+!llvm.module.flags = !{!7, !8, !9}\r
+!llvm.ident = !{!10}\r
+\r
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0 (trunk 242129)", isOptimized: false, runtimeVersion: 0, emissionKind: 1, enums: !2, subprograms: !3)\r
+!1 = !DIFile(filename: "foo.c", directory: "/tmp")\r
+!2 = !{}\r
+!3 = !{!4}\r
+!4 = distinct !DISubprogram(name: "prologue_end_test", scope: !1, file: !1, line: 2, type: !5, isLocal: false, isDefinition: true, scopeLine: 2, isOptimized: false, function: void ()* @prologue_end_test, variables: !2)\r
+!5 = !DISubroutineType(types: !6)\r
+!6 = !{null}\r
+!7 = !{i32 2, !"Dwarf Version", i32 2}\r
+!8 = !{i32 2, !"Debug Info Version", i32 3}\r
+!9 = !{i32 1, !"PIC Level", i32 2}\r
+!10 = !{!"clang version 3.7.0 (trunk 242129)"}\r
+!11 = !DILocation(line: 3, column: 3, scope: !4)\r
+!12 = !DILocation(line: 4, column: 3, scope: !4)\r
+!13 = !DILocation(line: 5, column: 1, scope: !4)\r

diff --git a/test/DebugInfo/ARM/prologue_end.ll b/test/DebugInfo/ARM/prologue_end.ll
new file mode 100644 (file)
index 0000000..16a594b
--- /dev/null
+++ b/test/DebugInfo/ARM/prologue_end.ll
@@ -0,0 +1,46 @@
+; RUN: llc -disable-fp-elim -O0 %s -mtriple armv7-apple-darwin -o - | FileCheck %s\r
+; RUN: llc -disable-fp-elim -O0 %s -mtriple thumbv1-apple-darwin -o - | FileCheck %s\r
+\r
+; int func(void);\r
+; void prologue_end_test() {\r
+;   func();\r
+;   func();\r
+; }\r
+\r
+define void @prologue_end_test() nounwind uwtable {\r
+  ; CHECK: prologue_end_test:\r
+  ; CHECK: .cfi_startproc\r
+  ; CHECK: push {r7, lr}\r
+  ; CHECK: {{mov r7, sp|add r7, sp}}\r
+  ; CHECK: sub sp\r
+  ; CHECK: .loc 1 3 3 prologue_end\r
+  ; CHECK: bl {{_func|Ltmp}}\r
+  ; CHECK: bl {{_func|Ltmp}}\r
+entry:\r
+  %call = call i32 @func(), !dbg !13\r
+  %call1 = call i32 @func(), !dbg !14\r
+  ret void, !dbg !15\r
+}\r
+\r
+declare i32 @func()\r
+\r
+!llvm.dbg.cu = !{!0}\r
+!llvm.module.flags = !{!7, !8, !9, !10, !11}\r
+!llvm.ident = !{!12}\r
+\r
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0 (trunk 242129)", isOptimized: false, runtimeVersion: 0, emissionKind: 1, enums: !2, subprograms: !3)\r
+!1 = !DIFile(filename: "foo.c", directory: "/tmp")\r
+!2 = !{}\r
+!3 = !{!4}\r
+!4 = distinct !DISubprogram(name: "prologue_end_test", scope: !1, file: !1, line: 2, type: !5, isLocal: false, isDefinition: true, scopeLine: 2, isOptimized: false, function: void ()* @prologue_end_test, variables: !2)\r
+!5 = !DISubroutineType(types: !6)\r
+!6 = !{null}\r
+!7 = !{i32 2, !"Dwarf Version", i32 2}\r
+!8 = !{i32 2, !"Debug Info Version", i32 3}\r
+!9 = !{i32 1, !"wchar_size", i32 4}\r
+!10 = !{i32 1, !"min_enum_size", i32 4}\r
+!11 = !{i32 1, !"PIC Level", i32 2}\r
+!12 = !{!"clang version 3.7.0 (trunk 242129)"}\r
+!13 = !DILocation(line: 3, column: 3, scope: !4)\r
+!14 = !DILocation(line: 4, column: 3, scope: !4)\r
+!15 = !DILocation(line: 5, column: 1, scope: !4)\r

diff --git a/test/DebugInfo/Sparc/prologue_end.ll b/test/DebugInfo/Sparc/prologue_end.ll
new file mode 100644 (file)
index 0000000..ce73b36
--- /dev/null
+++ b/test/DebugInfo/Sparc/prologue_end.ll
@@ -0,0 +1,41 @@
+; RUN: llc -disable-fp-elim -O0 %s -mtriple sparc -o - | FileCheck %s\r
+\r
+; int func(void);\r
+; void prologue_end_test() {\r
+;   func();\r
+;   func();\r
+; }\r
+\r
+define void @prologue_end_test() nounwind uwtable {\r
+  ; CHECK: prologue_end_test:\r
+  ; CHECK: .cfi_startproc\r
+  ; CHECK: save %sp\r
+  ; CHECK: .loc 1 3 3 prologue_end\r
+  ; CHECK: call func\r
+  ; CHECK: call func\r
+entry:\r
+  %call = call i32 @func(), !dbg !11\r
+  %call1 = call i32 @func(), !dbg !12\r
+  ret void, !dbg !13\r
+}\r
+\r
+declare i32 @func()\r
+\r
+!llvm.dbg.cu = !{!0}\r
+!llvm.module.flags = !{!7, !8, !9}\r
+!llvm.ident = !{!10}\r
+\r
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0 (trunk 242129)", isOptimized: false, runtimeVersion: 0, emissionKind: 1, enums: !2, subprograms: !3)\r
+!1 = !DIFile(filename: "foo.c", directory: "/tmp")\r
+!2 = !{}\r
+!3 = !{!4}\r
+!4 = distinct !DISubprogram(name: "prologue_end_test", scope: !1, file: !1, line: 2, type: !5, isLocal: false, isDefinition: true, scopeLine: 2, isOptimized: false, function: void ()* @prologue_end_test, variables: !2)\r
+!5 = !DISubroutineType(types: !6)\r
+!6 = !{null}\r
+!7 = !{i32 2, !"Dwarf Version", i32 2}\r
+!8 = !{i32 2, !"Debug Info Version", i32 3}\r
+!9 = !{i32 1, !"PIC Level", i32 2}\r
+!10 = !{!"clang version 3.7.0 (trunk 242129)"}\r
+!11 = !DILocation(line: 3, column: 3, scope: !4)\r
+!12 = !DILocation(line: 4, column: 3, scope: !4)\r
+!13 = !DILocation(line: 5, column: 1, scope: !4)\r

diff --git a/test/DebugInfo/SystemZ/prologue_end.ll b/test/DebugInfo/SystemZ/prologue_end.ll
new file mode 100644 (file)
index 0000000..cb71dcf
--- /dev/null
+++ b/test/DebugInfo/SystemZ/prologue_end.ll
@@ -0,0 +1,42 @@
+; RUN: llc -disable-fp-elim -O0 %s -mtriple s390x-linux-gnu -o - | FileCheck %s\r
+\r
+; int func(void);\r
+; void prologue_end_test() {\r
+;   func();\r
+;   func();\r
+; }\r
+\r
+define void @prologue_end_test() nounwind uwtable {\r
+  ; CHECK: prologue_end_test:\r
+  ; CHECK: .cfi_startproc\r
+  ; CHECK: aghi\r
+  ; CHECK: lgr\r
+  ; CHECK: .loc 1 3 3 prologue_end\r
+  ; CHECK: brasl {{.*}}, func\r
+  ; CHECK: brasl {{.*}}, func\r
+entry:\r
+  %call = call i32 @func(), !dbg !11\r
+  %call1 = call i32 @func(), !dbg !12\r
+  ret void, !dbg !13\r
+}\r
+\r
+declare i32 @func()\r
+\r
+!llvm.dbg.cu = !{!0}\r
+!llvm.module.flags = !{!7, !8, !9}\r
+!llvm.ident = !{!10}\r
+\r
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.7.0 (trunk 242129)", isOptimized: false, runtimeVersion: 0, emissionKind: 1, enums: !2, subprograms: !3)\r
+!1 = !DIFile(filename: "foo.c", directory: "/tmp")\r
+!2 = !{}\r
+!3 = !{!4}\r
+!4 = distinct !DISubprogram(name: "prologue_end_test", scope: !1, file: !1, line: 2, type: !5, isLocal: false, isDefinition: true, scopeLine: 2, isOptimized: false, function: void ()* @prologue_end_test, variables: !2)\r
+!5 = !DISubroutineType(types: !6)\r
+!6 = !{null}\r
+!7 = !{i32 2, !"Dwarf Version", i32 2}\r
+!8 = !{i32 2, !"Debug Info Version", i32 3}\r
+!9 = !{i32 1, !"PIC Level", i32 2}\r
+!10 = !{!"clang version 3.7.0 (trunk 242129)"}\r
+!11 = !DILocation(line: 3, column: 3, scope: !4)\r
+!12 = !DILocation(line: 4, column: 3, scope: !4)\r
+!13 = !DILocation(line: 5, column: 1, scope: !4)\r