#define TEGRA_MAX_DC 2
#define DC_N_WINDOWS 3
+#define TEGRA_DC_PITCH_ATOM 16
+#define TEGRA_DC_TILED_ATOM 16
+
+enum tegra_win_layout {
+ TEGRA_WIN_LAYOUT_PITCH,
+ TEGRA_WIN_LAYOUT_TILED,
+ TEGRA_WIN_LAYOUT_LINEAR_TILED,
+};
+
struct tegra_dc_mode {
int pclk;
int h_ref_to_sync;
unsigned out_w;
unsigned out_h;
unsigned z;
+ enum tegra_win_layout layout;
int dirty;
struct tegra_dc *dc;
int tegra_dc_set_mode(struct tegra_dc *dc, const struct tegra_dc_mode *mode);
+ssize_t tegra_dc_compute_stride(int xres, int bpp,
+ enum tegra_win_layout layout);
+
#endif
}
EXPORT_SYMBOL(tegra_dc_get_dc);
+ssize_t tegra_dc_compute_stride(int xres, int bpp, enum tegra_win_layout layout)
+{
+ unsigned int raw_stride = (xres * bpp) / 8;
+ unsigned int k, n = 0;
+
+ if (layout == TEGRA_WIN_LAYOUT_PITCH)
+ return ALIGN(raw_stride, TEGRA_DC_PITCH_ATOM);
+ else if (layout == TEGRA_WIN_LAYOUT_TILED)
+ return ALIGN(raw_stride, TEGRA_DC_TILED_ATOM);
+ else
+ return -EINVAL;
+}
+EXPORT_SYMBOL(tegra_dc_compute_stride);
+
struct tegra_dc_win *tegra_dc_get_window(struct tegra_dc *dc, unsigned win)
{
if (win >= dc->n_windows)
default:
return -EINVAL;
}
- info->fix.line_length = var->xres * var->bits_per_pixel / 8;
+
+ info->fix.line_length = tegra_dc_compute_stride(var->xres,
+ var->bits_per_pixel, TEGRA_WIN_LAYOUT_PITCH);
+ tegra_fb->win->stride = info->fix.line_length;
if (var->pixclock) {
struct tegra_dc_mode mode;
win->z = 0;
win->phys_addr = fb_phys;
win->virt_addr = fb_base;
- win->stride = fb_data->xres * fb_data->bits_per_pixel / 8;
+ win->layout = TEGRA_WIN_LAYOUT_PITCH;
+ win->stride = tegra_dc_compute_stride(fb_data->xres,
+ fb_data->bits_per_pixel, win->layout);
win->flags = TEGRA_WIN_FLAG_ENABLED;
if (fb_mem)