driver, mpuxxx: add i2c disable/enable control when write user_ctrl register

Change-Id: Icedd6d73de9345c5b18fe026053ae35c6546ef78
Signed-off-by: Zorro Liu <lyx@rock-chips.com>

diff --git a/drivers/staging/iio/imu/inv_mpu/inv_mpu3050_iio.c b/drivers/staging/iio/imu/inv_mpu/inv_mpu3050_iio.c
index 65eb96675e5cad16e6ec7b282c89232a1d258162..fab04c9a0c79c3fac33b2a09421ba5ffdbf2b289 100644 (file)
--- a/drivers/staging/iio/imu/inv_mpu/inv_mpu3050_iio.c
+++ b/drivers/staging/iio/imu/inv_mpu/inv_mpu3050_iio.c
@@ -65,7 +65,7 @@ int set_3050_bypass(struct inv_mpu_iio_s *st, bool enable)
        b &= ~BIT_3050_AUX_IF_EN;
        if (!enable) {
                b |= BIT_3050_AUX_IF_EN;
-               result = inv_plat_single_write(st, reg->user_ctrl, b);
+               result = inv_plat_single_write(st, reg->user_ctrl, b | st->i2c_dis);
                return result;
        } else {
                /* Coming out of I2C is tricky due to several erratta.  Do not
@@ -87,7 +87,7 @@ int set_3050_bypass(struct inv_mpu_iio_s *st, bool enable)
                *    bypass mode:
                */
                usleep_range(MPU3050_NACK_MIN_TIME, MPU3050_NACK_MAX_TIME);
-               result = inv_plat_single_write(st, reg->user_ctrl, b);
+               result = inv_plat_single_write(st, reg->user_ctrl, b | st->i2c_dis);
                if (result)
                        return result;
                /*
@@ -102,7 +102,7 @@ int set_3050_bypass(struct inv_mpu_iio_s *st, bool enable)
                        return result;
 
                result = inv_plat_single_write(st, reg->user_ctrl,
-                               (b | BIT_3050_AUX_IF_RST));
+                               (b | BIT_3050_AUX_IF_RST | st->i2c_dis));
                if (result)
                        return result;
                usleep_range(MPU3050_NACK_MIN_TIME, MPU3050_NACK_MAX_TIME);

diff --git a/drivers/staging/iio/imu/inv_mpu/inv_mpu_core.c b/drivers/staging/iio/imu/inv_mpu/inv_mpu_core.c
index 2425886278f40de2f47167b18eb99c6a2f970276..bba1def5bae85a430e55c1ef1927e0776f845e98 100644 (file)
--- a/drivers/staging/iio/imu/inv_mpu/inv_mpu_core.c
+++ b/drivers/staging/iio/imu/inv_mpu/inv_mpu_core.c
@@ -1744,7 +1744,7 @@ int inv_check_chip_type(struct inv_mpu_iio_s *st, const char *name)
                return result;
 
        /* add by lyx@rock-chips.com  */
-       result = inv_plat_single_write(st, REG_USER_CTRL, st->i2c_dis);
+       result = inv_plat_single_write(st, reg->user_ctrl, st->i2c_dis);
        if (result)
                return result;
 

diff --git a/drivers/staging/iio/imu/inv_mpu/inv_mpu_misc.c b/drivers/staging/iio/imu/inv_mpu/inv_mpu_misc.c
index 02e2070ffce25282079dcc1a20db913abeb45a99..60bcbba9f87e70c4f1e8644a327772e29a5e6522 100644 (file)
--- a/drivers/staging/iio/imu/inv_mpu/inv_mpu_misc.c
+++ b/drivers/staging/iio/imu/inv_mpu/inv_mpu_misc.c
@@ -816,11 +816,11 @@ int inv_do_test(struct inv_mpu_iio_s *st, int self_test_flag,
        if (result)
                return result;
        /* disable fifo reading */
-       result = inv_plat_single_write(st, reg->user_ctrl, 0);
+       result = inv_plat_single_write(st, reg->user_ctrl, st->i2c_dis);
        if (result)
                return result;
        /* clear FIFO */
-       result = inv_plat_single_write(st, reg->user_ctrl, BIT_FIFO_RST);
+       result = inv_plat_single_write(st, reg->user_ctrl, BIT_FIFO_RST | st->i2c_dis);
        if (result)
                return result;
        /* setup parameters */
@@ -866,7 +866,7 @@ int inv_do_test(struct inv_mpu_iio_s *st, int self_test_flag,
        }
 
        /* enable FIFO reading */
-       result = inv_plat_single_write(st, reg->user_ctrl, BIT_FIFO_EN);
+       result = inv_plat_single_write(st, reg->user_ctrl, BIT_FIFO_EN | st->i2c_dis);
        if (result)
                return result;
        /* enable sensor output to FIFO */

diff --git a/drivers/staging/iio/imu/inv_mpu/inv_mpu_ring.c b/drivers/staging/iio/imu/inv_mpu/inv_mpu_ring.c
index 138fcd845503f368f3cc668f7ec914f40ec9a2cf..7afd3b3bde75a2a50c9561492b551bff3df1e0cc 100644 (file)
--- a/drivers/staging/iio/imu/inv_mpu/inv_mpu_ring.c
+++ b/drivers/staging/iio/imu/inv_mpu/inv_mpu_ring.c
@@ -80,7 +80,7 @@ static int reset_fifo_mpu3050(struct iio_dev *indio_dev)
        st->chip_config.has_footer = 0;
        /* reset fifo */
        val = (BIT_3050_FIFO_RST | user_ctrl);
-       result = inv_plat_single_write(st, reg->user_ctrl, val);
+       result = inv_plat_single_write(st, reg->user_ctrl, val | st->i2c_dis);
        if (result)
                goto reset_fifo_fail;
        st->last_isr_time = get_time_ns();
@@ -92,7 +92,7 @@ static int reset_fifo_mpu3050(struct iio_dev *indio_dev)
                        return result;
 
                result = inv_plat_single_write(st, reg->user_ctrl,
-                       BIT_FIFO_EN|user_ctrl);
+                       BIT_FIFO_EN | user_ctrl | st->i2c_dis);
                if (result)
                        return result;
        } else {
@@ -106,7 +106,7 @@ static int reset_fifo_mpu3050(struct iio_dev *indio_dev)
                }
                /* enable FIFO reading and I2C master interface*/
                result = inv_plat_single_write(st, reg->user_ctrl,
-                       BIT_FIFO_EN | user_ctrl);
+                       BIT_FIFO_EN | user_ctrl | st->i2c_dis);
                if (result)
                        return result;
                /* enable sensor output to FIFO and FIFO footer*/
@@ -256,7 +256,7 @@ static int reset_fifo_itg(struct iio_dev *indio_dev)
        if (result)
                goto reset_fifo_fail;
        /* disable fifo reading */
-       result = inv_plat_single_write(st, reg->user_ctrl, 0);
+       result = inv_plat_single_write(st, reg->user_ctrl, st->i2c_dis);
        if (result)
                goto reset_fifo_fail;
        int_word = 0;
@@ -267,7 +267,7 @@ static int reset_fifo_itg(struct iio_dev *indio_dev)
 
        if (st->chip_config.dmp_on) {
                val = (BIT_FIFO_RST | BIT_DMP_RST);
-               result = inv_plat_single_write(st, reg->user_ctrl, val);
+               result = inv_plat_single_write(st, reg->user_ctrl, val | st->i2c_dis);
                if (result)
                        goto reset_fifo_fail;
                st->last_isr_time = get_time_ns();
@@ -282,7 +282,7 @@ static int reset_fifo_itg(struct iio_dev *indio_dev)
                if (st->chip_config.compass_enable &
                        (!st->chip_config.dmp_event_int_on))
                        val |= BIT_I2C_MST_EN;
-               result = inv_plat_single_write(st, reg->user_ctrl, val);
+               result = inv_plat_single_write(st, reg->user_ctrl, val | st->i2c_dis);
                if (result)
                        goto reset_fifo_fail;
 
@@ -315,7 +315,7 @@ static int reset_fifo_itg(struct iio_dev *indio_dev)
        } else {
                /* reset FIFO and possibly reset I2C*/
                val = BIT_FIFO_RST;
-               result = inv_plat_single_write(st, reg->user_ctrl, val);
+               result = inv_plat_single_write(st, reg->user_ctrl, val | st->i2c_dis);
                if (result)
                        goto reset_fifo_fail;
                st->last_isr_time = get_time_ns();
@@ -332,7 +332,7 @@ static int reset_fifo_itg(struct iio_dev *indio_dev)
                val = BIT_FIFO_EN;
                if (st->chip_config.compass_enable)
                        val |= BIT_I2C_MST_EN;
-               result = inv_plat_single_write(st, reg->user_ctrl, val);
+               result = inv_plat_single_write(st, reg->user_ctrl, val | st->i2c_dis);
                if (result)
                        goto reset_fifo_fail;
                if (st->chip_config.compass_enable) {
@@ -473,7 +473,7 @@ static int set_inv_enable(struct iio_dev *indio_dev,
                        result = inv_plat_single_write(st, reg->int_enable, 0);
                        if (result)
                                return result;
-                       result = inv_plat_single_write(st, reg->user_ctrl, 0);
+                       result = inv_plat_single_write(st, reg->user_ctrl, st->i2c_dis);
                } else {
                        result = inv_plat_single_write(st, reg->int_enable,
                                st->plat_data.int_config);