sh: clkfwk: Introduce a div_mask for variable div types.

This plugs in a div_mask for the clock and sets it up for the existing
div6/4 cases. This will make it possible to support other div types, as
well as share more div6/4 infrastructure.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c
index 9dea329077958a516108882ca9d75f0540ca4cad..9386bd21c0032265a6712ef544dab53000a24bf9 100644 (file)
--- a/drivers/sh/clk/cpg.c
+++ b/drivers/sh/clk/cpg.c
@@ -111,7 +111,7 @@ static unsigned long sh_clk_div6_recalc(struct clk *clk)
        clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
                             table, NULL);
 
-       idx = sh_clk_read(clk) & 0x003f;
+       idx = sh_clk_read(clk) & clk->div_mask;
 
        return clk->freq_table[idx].frequency;
 }
@@ -159,7 +159,7 @@ static int sh_clk_div6_set_rate(struct clk *clk, unsigned long rate)
                return idx;
 
        value = sh_clk_read(clk);
-       value &= ~0x3f;
+       value &= ~clk->div_mask;
        value |= idx;
        sh_clk_write(value, clk);
        return 0;
@@ -185,7 +185,7 @@ static void sh_clk_div6_disable(struct clk *clk)
 
        value = sh_clk_read(clk);
        value |= 0x100; /* stop clock */
-       value |= 0x3f; /* VDIV bits must be non-zero, overwrite divider */
+       value |= clk->div_mask; /* VDIV bits must be non-zero, overwrite divider */
        sh_clk_write(value, clk);
 }
 
@@ -295,7 +295,7 @@ static unsigned long sh_clk_div4_recalc(struct clk *clk)
        clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
                             table, &clk->arch_flags);
 
-       idx = (sh_clk_read(clk) >> clk->enable_bit) & 0x000f;
+       idx = (sh_clk_read(clk) >> clk->enable_bit) & clk->div_mask;
 
        return clk->freq_table[idx].frequency;
 }
@@ -338,7 +338,7 @@ static int sh_clk_div4_set_rate(struct clk *clk, unsigned long rate)
                return idx;
 
        value = sh_clk_read(clk);
-       value &= ~(0xf << clk->enable_bit);
+       value &= ~(clk->div_mask << clk->enable_bit);
        value |= (idx << clk->enable_bit);
        sh_clk_write(value, clk);
 

diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
index 706b803df7b7710da41d3ee66b6e814feb0e6f1f..d540b8153178cd818003ce671c9c23b75c5bac23 100644 (file)
--- a/include/linux/sh_clk.h
+++ b/include/linux/sh_clk.h
@@ -30,6 +30,10 @@ struct sh_clk_ops {
        long (*round_rate)(struct clk *clk, unsigned long rate);
 };
 
+#define SH_CLK_DIV_MSK(div)    ((1 << (div)) - 1)
+#define SH_CLK_DIV4_MSK                SH_CLK_DIV_MSK(4)
+#define SH_CLK_DIV6_MSK                SH_CLK_DIV_MSK(6)
+
 struct clk {
        struct list_head        node;
        struct clk              *parent;
@@ -51,6 +55,7 @@ struct clk {
        unsigned int            enable_bit;
        void __iomem            *mapped_reg;
 
+       unsigned int            div_mask;
        unsigned long           arch_flags;
        void                    *priv;
        struct clk_mapping      *mapping;
@@ -145,6 +150,7 @@ static inline int __deprecated sh_clk_mstp32_register(struct clk *clks, int nr)
        .enable_reg = (void __iomem *)_reg,                     \
        .enable_bit = _shift,                                   \
        .arch_flags = _div_bitmap,                              \
+       .div_mask = SH_CLK_DIV4_MSK,                            \
        .flags = _flags,                                        \
 }
 
@@ -167,6 +173,7 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
 {                                                              \
        .enable_reg = (void __iomem *)_reg,                     \
        .flags = _flags,                                        \
+       .div_mask = SH_CLK_DIV6_MSK,                            \
        .parent_table = _parents,                               \
        .parent_num = _num_parents,                             \
        .src_shift = _src_shift,                                \
@@ -177,6 +184,7 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr,
 {                                                              \
        .parent         = _parent,                              \
        .enable_reg     = (void __iomem *)_reg,                 \
+       .div_mask       = SH_CLK_DIV6_MSK,                      \
        .flags          = _flags,                               \
 }