[VECTOR-SELECT] Address one of the bugs in pr10902.

Vector SetCC result types need to be type-legalized.
This code worked before because scalar result types are known to be legal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140249 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 27b87e9277b0eb4cc3a2af7601c7d0f39396bb45..a3c926c3fac34abb795807071405b7b1327bde15 100644 (file)
--- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -500,6 +500,8 @@ SDValue DAGTypeLegalizer::PromoteIntRes_SELECT_CC(SDNode *N) {
 
 SDValue DAGTypeLegalizer::PromoteIntRes_SETCC(SDNode *N) {
   EVT SVT = TLI.getSetCCResultType(N->getOperand(0).getValueType());
+  // Vector setcc result types need to be leglized.
+  SVT = TLI.getTypeToTransformTo(*DAG.getContext(), SVT);
 
   DebugLoc dl = N->getDebugLoc();
   assert(SVT.isVector() == N->getOperand(0).getValueType().isVector() &&

diff --git a/test/CodeGen/X86/2011-09-21-setcc-bug.ll b/test/CodeGen/X86/2011-09-21-setcc-bug.ll
new file mode 100644 (file)
index 0000000..60cc587
--- /dev/null
+++ b/test/CodeGen/X86/2011-09-21-setcc-bug.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=x86-64 -mcpu=corei7 -promote-elements -mattr=+sse41
+
+; Make sure we are not crashing on this code.
+
+define void @load_4_i8(<4 x i8>* %k, <4 x i8>* %y, <4 x double>* %A1, <4 x double>* %A0)  {
+   %A = load <4 x i8>* %k
+   %B = load <4 x i8>* %y
+   %C = load <4 x double>* %A0
+   %D= load <4 x double>* %A1
+   %M = icmp uge <4 x i8> %A, %B
+   %T = select <4 x i1> %M, <4 x double> %C, <4 x double> %D
+   store <4 x double> %T, <4 x double>* undef
+   ret void
+}
+