mt6622: adjust uart0 clock for swflow
authorhwg <hwg@rock-chips.com>
Sat, 27 Apr 2013 14:09:28 +0000 (22:09 +0800)
committerhwg <hwg@rock-chips.com>
Sat, 27 Apr 2013 14:09:28 +0000 (22:09 +0800)
arch/arm/mach-rk30/board-rk30-sdk.c

index 47afb4b2ba03c949d22966bf4234b39c23bbe362..67aca7f5f8de80e31f002dd9b753627e0e7aea52 100755 (executable)
@@ -1982,6 +1982,9 @@ static void __init machine_rk30_board_init(void)
 #if defined(CONFIG_MT6620)
     clk_set_rate(clk_get_sys("rk_serial.0", "uart"), 48*1000000);
 #endif
+#if defined(CONFIG_MT5931_MT6622)
+    clk_set_rate(clk_get_sys("rk_serial.0", "uart"), 24*1000000);
+#endif
 #if defined (CONFIG_SND_SOC_RT3224) || defined (CONFIG_SND_SOC_RT3261)
        //add for codec_en 
        gpio_request(RK30_PIN4_PD7, "codec_en");