Teach the register allocator that movaps is also a move instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22451 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 957360b201366a77166ffd328ec4b8de2209f93b..2fec723b25b788748d4ce69b59960301772809a0 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -28,7 +28,7 @@ bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
                                unsigned& destReg) const {
   MachineOpCode oc = MI.getOpcode();
   if (oc == X86::MOV8rr || oc == X86::MOV16rr || oc == X86::MOV32rr ||
-      oc == X86::FpMOV  || oc == X86::MOVAPDrr) {
+      oc == X86::FpMOV  || oc == X86::MOVAPDrr || oc == X86::MOVAPSrr) {
       assert(MI.getNumOperands() == 2 &&
              MI.getOperand(0).isRegister() &&
              MI.getOperand(1).isRegister() &&