Also match negative offsets for addrmode3 and addrmode5.

Math is hard, and isScaledConstantInRange() always returned false for
negative constants.  It was doing unsigned division of negative numbers
before casting back to signed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140425 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index e05589eb5bae80c3e23a1a25de1226b4282745eb..66fc754dd01b9daec93a6b187b85c7b6a39b2b52 100644 (file)
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -305,10 +305,10 @@ static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) {
 /// (N * Scale) where (N in [\arg RangeMin, \arg RangeMax).
 ///
 /// \param ScaledConstant [out] - On success, the pre-scaled constant value.
-static bool isScaledConstantInRange(SDValue Node, unsigned Scale,
+static bool isScaledConstantInRange(SDValue Node, int Scale,
                                     int RangeMin, int RangeMax,
                                     int &ScaledConstant) {
-  assert(Scale && "Invalid scale!");
+  assert(Scale > 0 && "Invalid scale!");
 
   // Check that this is a constant.
   const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Node);

diff --git a/test/CodeGen/ARM/fpmem.ll b/test/CodeGen/ARM/fpmem.ll
index c3cff18c959da26975c377354b130add0909c615..38339334b445ea60b515745eae716f8099c8ebc0 100644 (file)
--- a/test/CodeGen/ARM/fpmem.ll
+++ b/test/CodeGen/ARM/fpmem.ll
@@ -14,6 +14,24 @@ define float @f2(float* %v, float %u) {
         ret float %tmp1
 }
 
+define float @f2offset(float* %v, float %u) {
+; CHECK: f2offset:
+; CHECK: vldr.32{{.*}}, #4]
+        %addr = getelementptr float* %v, i32 1
+        %tmp = load float* %addr
+        %tmp1 = fadd float %tmp, %u
+        ret float %tmp1
+}
+
+define float @f2noffset(float* %v, float %u) {
+; CHECK: f2noffset:
+; CHECK: vldr.32{{.*}}, #-4]
+        %addr = getelementptr float* %v, i32 -1
+        %tmp = load float* %addr
+        %tmp1 = fadd float %tmp, %u
+        ret float %tmp1
+}
+
 define void @f3(float %a, float %b, float* %v) {
 ; CHECK: f3:
 ; CHECK: vstr.32{{.*}}[