Fix handling of 'load' nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105269 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
index 9afdb2b97f30542bbe7d0d0ef282a7600aa78550..bfb57d361364814fdc0eeae702cbb4788b3da5f5 100644 (file)
--- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
+++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp
@@ -611,13 +611,7 @@ SPUDAGToDAGISel::DFormAddressPredicate(SDNode *Op, SDValue N, SDValue &Base,
 
     if (OpOpc == ISD::STORE || OpOpc == ISD::LOAD) {
       // Direct load/store without getelementptr
-      SDValue Addr, Offs;
-
-      // Get the register from CopyFromReg
-      if (Opc == ISD::CopyFromReg)
-        Addr = N.getOperand(1);
-      else
-        Addr = N;                       // Register
+      SDValue Offs;
 
       Offs = ((OpOpc == ISD::STORE) ? Op->getOperand(3) : Op->getOperand(2));
 
@@ -626,7 +620,7 @@ SPUDAGToDAGISel::DFormAddressPredicate(SDNode *Op, SDValue N, SDValue &Base,
           Offs = CurDAG->getTargetConstant(0, Offs.getValueType());
 
         Base = Offs;
-        Index = Addr;
+        Index = N;
         return true;
       }
     } else {

diff --git a/test/CodeGen/CellSPU/loads.ll b/test/CodeGen/CellSPU/loads.ll
index 8e5422c58eb6daec02f6e1cf389fe13fd4bb606f..37c6d4f1517740e48dde2140010fe90fedf4c1ca 100644 (file)
--- a/test/CodeGen/CellSPU/loads.ll
+++ b/test/CodeGen/CellSPU/loads.ll
@@ -18,3 +18,16 @@ entry:
        ret <4 x float> %tmp1
 ; CHECK:       lqd     $3, 16($3)
 }
+
+
+declare <4 x i32>* @getv4f32ptr()
+define <4 x i32> @func() {
+        ;CHECK: brasl
+        ;CHECK: lr     {{\$[0-9]*, \$3}}
+        ;CHECK: brasl
+        %rv1 = call <4 x i32>* @getv4f32ptr()
+        %rv2 = call <4 x i32>* @getv4f32ptr()
+        %rv3 = load <4 x i32>* %rv1
+        ret <4 x i32> %rv3
+}
+