[ARM] 3455/1: ARM: OMAP: 7/8 Misc updates, take 2
authorTony Lindgren <tony@atomide.com>
Sun, 2 Apr 2006 16:46:27 +0000 (17:46 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sun, 2 Apr 2006 16:46:27 +0000 (17:46 +0100)
Patch from Tony Lindgren

Update misc OMAP core code from linux-omap tree:

- McBSP updates by Samuel Ortiz, Andrzej Zaborowski
- Whitespace cleanups by Ladislav Michl
- Other fixes by various linux-omap developers

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
20 files changed:
arch/arm/mach-omap1/Makefile
arch/arm/mach-omap1/io.c
arch/arm/mach-omap1/irq.c
arch/arm/mach-omap1/serial.c
arch/arm/mach-omap2/Makefile
arch/arm/mach-omap2/io.c
arch/arm/plat-omap/Makefile
arch/arm/plat-omap/mcbsp.c
arch/arm/plat-omap/ocpi.c
include/asm-arm/arch-omap/aic23.h
include/asm-arm/arch-omap/dsp.h
include/asm-arm/arch-omap/dsp_common.h
include/asm-arm/arch-omap/gpioexpander.h [new file with mode: 0644]
include/asm-arm/arch-omap/irda.h [new file with mode: 0644]
include/asm-arm/arch-omap/irqs.h
include/asm-arm/arch-omap/keypad.h [new file with mode: 0644]
include/asm-arm/arch-omap/mcbsp.h
include/asm-arm/arch-omap/mcspi.h [new file with mode: 0644]
include/asm-arm/arch-omap/menelaus.h
include/asm-arm/arch-omap/omap-alsa.h [new file with mode: 0644]

index b0b00156faaefbaf00296bdc0856a427b13596d8..9ea719550ad37f699478c1b271ed94651be246e7 100644 (file)
@@ -3,7 +3,13 @@
 #
 
 # Common support
-obj-y := io.o id.o clock.o irq.o time.o mux.o serial.o devices.o
+obj-y := io.o id.o clock.o irq.o mux.o serial.o devices.o
+
+obj-$(CONFIG_OMAP_MPU_TIMER)           += time.o
+
+# Power Management
+obj-$(CONFIG_PM) += pm.o sleep.o
+
 led-y := leds.o
 
 # Specific board support
@@ -14,8 +20,9 @@ obj-$(CONFIG_MACH_OMAP_PERSEUS2)      += board-perseus2.o
 obj-$(CONFIG_MACH_OMAP_OSK)            += board-osk.o
 obj-$(CONFIG_MACH_OMAP_H3)             += board-h3.o
 obj-$(CONFIG_MACH_VOICEBLUE)           += board-voiceblue.o
-obj-$(CONFIG_MACH_NETSTAR)             += board-netstar.o
 obj-$(CONFIG_MACH_OMAP_PALMTE)         += board-palmte.o
+obj-$(CONFIG_MACH_NOKIA770)            += board-nokia770.o
+obj-$(CONFIG_MACH_AMS_DELTA)           += board-ams-delta.o
 
 ifeq ($(CONFIG_ARCH_OMAP15XX),y)
 # Innovator-1510 FPGA
index 82d556be79c51d24418c7da9198f91ccba5986d6..be3a2a4ee2b8c6d304b9e34187cb40ac25a11a91 100644 (file)
@@ -18,6 +18,7 @@
 #include <asm/io.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/tc.h>
+#include <asm/arch/omapfb.h>
 
 extern int omap1_clk_init(void);
 extern void omap_check_revision(void);
@@ -110,7 +111,7 @@ void __init omap1_map_common_io(void)
        }
 #endif
 #ifdef CONFIG_ARCH_OMAP15XX
-       if (cpu_is_omap1510()) {
+       if (cpu_is_omap15xx()) {
                iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
        }
 #endif
@@ -121,6 +122,7 @@ void __init omap1_map_common_io(void)
 #endif
 
        omap_sram_init();
+       omapfb_reserve_mem();
 }
 
 /*
index ed65a7d2e941cf9228658b323564925ceca3aa2c..a0431c00fa813353a98d2e818e3ff6d102b0d8b8 100644 (file)
@@ -60,7 +60,7 @@ struct omap_irq_bank {
        unsigned long wake_enable;
 };
 
-static unsigned int irq_bank_count = 0;
+static unsigned int irq_bank_count;
 static struct omap_irq_bank *irq_banks;
 
 static inline unsigned int irq_bank_readl(int bank, int offset)
@@ -142,28 +142,28 @@ static void omap_irq_set_cfg(int irq, int fiq, int priority, int trigger)
 
 #ifdef CONFIG_ARCH_OMAP730
 static struct omap_irq_bank omap730_irq_banks[] = {
-       { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3f8e22f },
-       { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xfdb9c1f2 },
+       { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3f8e22f },
+       { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xfdb9c1f2 },
        { .base_reg = OMAP_IH2_BASE + 0x100,    .trigger_map = 0x800040f3 },
 };
 #endif
 
 #ifdef CONFIG_ARCH_OMAP15XX
 static struct omap_irq_bank omap1510_irq_banks[] = {
-       { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3febfff },
-       { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xffbfffed },
+       { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3febfff },
+       { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xffbfffed },
 };
 static struct omap_irq_bank omap310_irq_banks[] = {
-       { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3faefc3 },
-       { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0x65b3c061 },
+       { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3faefc3 },
+       { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0x65b3c061 },
 };
 #endif
 
 #if defined(CONFIG_ARCH_OMAP16XX)
 
 static struct omap_irq_bank omap1610_irq_banks[] = {
-       { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3fefe8f },
-       { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xfdb7c1fd },
+       { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3fefe8f },
+       { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xfdb7c1fd },
        { .base_reg = OMAP_IH2_BASE + 0x100,    .trigger_map = 0xffffb7ff },
        { .base_reg = OMAP_IH2_BASE + 0x200,    .trigger_map = 0xffffffff },
 };
index e924e0c6a4ce99106ced4bdc523ea806d2e4197f..9b4cd698bec85d9d05b06371313066579b9d3c41 100644 (file)
@@ -30,9 +30,9 @@
 #include <asm/arch/pm.h>
 #endif
 
-static struct clk * uart1_ck = NULL;
-static struct clk * uart2_ck = NULL;
-static struct clk * uart3_ck = NULL;
+static struct clk * uart1_ck;
+static struct clk * uart2_ck;
+static struct clk * uart3_ck;
 
 static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
                                          int offset)
index 42041166435c4a27ffa7f1f4aa07ca03da381055..111eaa64258f2cbcec96bbf56875bebd957cb871 100644 (file)
@@ -3,11 +3,15 @@
 #
 
 # Common support
-obj-y := irq.o id.o io.o sram-fn.o clock.o mux.o devices.o serial.o
+obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o serial.o
 
 obj-$(CONFIG_OMAP_MPU_TIMER)           += timer-gp.o
 
+# Power Management
+obj-$(CONFIG_PM) += pm.o sleep.o
+
 # Specific board support
 obj-$(CONFIG_MACH_OMAP_GENERIC)                += board-generic.o
 obj-$(CONFIG_MACH_OMAP_H4)             += board-h4.o
+obj-$(CONFIG_MACH_OMAP_APOLLON)                += board-apollon.o
 
index 8ea67bf196a5efd309d09760a13170003d75a20a..7d5711611f2f413cae141ec31fe9ccea382d234d 100644 (file)
 #include <linux/kernel.h>
 #include <linux/init.h>
 
-#include <asm/mach/map.h>
+#include <asm/tlb.h>
 #include <asm/io.h>
+
+#include <asm/mach/map.h>
+
 #include <asm/arch/mux.h>
+#include <asm/arch/omapfb.h>
 
 extern void omap_sram_init(void);
 extern int omap2_clk_init(void);
@@ -43,11 +47,24 @@ static struct map_desc omap2_io_desc[] __initdata = {
        }
 };
 
-void __init omap_map_common_io(void)
+void __init omap2_map_common_io(void)
 {
        iotable_init(omap2_io_desc, ARRAY_SIZE(omap2_io_desc));
+
+       /* Normally devicemaps_init() would flush caches and tlb after
+        * mdesc->map_io(), but we must also do it here because of the CPU
+        * revision check below.
+        */
+       local_flush_tlb_all();
+       flush_cache_all();
+
        omap2_check_revision();
        omap_sram_init();
+       omapfb_reserve_mem();
+}
+
+void __init omap2_init_common_hw(void)
+{
        omap2_mux_init();
        omap2_clk_init();
 }
index 9ccf1943fc946c1174e0e5c740b9fe912791d3f9..2896b4546411c3237bc7374435958276916f4a36 100644 (file)
@@ -3,16 +3,16 @@
 #
 
 # Common support
-obj-y := common.o sram.o sram-fn.o clock.o devices.o dma.o mux.o gpio.o mcbsp.o usb.o
+obj-y := common.o sram.o sram-fn.o clock.o devices.o dma.o mux.o gpio.o mcbsp.o usb.o fb.o
 obj-m :=
 obj-n :=
 obj-  :=
 
+obj-$(CONFIG_OMAP_32K_TIMER)   += timer32k.o
+
 # OCPI interconnect support for 1710, 1610 and 5912
 obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
 
-# Power Management
-obj-$(CONFIG_PM) += pm.o sleep.o
 
 obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
 obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
index 1cd2cace7e1b595d21361031a96774dd0436cef6..196aac3ac329aad9df2eeb5bd4867eec89dd0c03 100644 (file)
@@ -34,7 +34,7 @@
 #ifdef CONFIG_MCBSP_DEBUG
 #define DBG(x...)      printk(x)
 #else
-#define DBG(x...)      do { } while (0)
+#define DBG(x...)                      do { } while (0)
 #endif
 
 struct omap_mcbsp {
@@ -44,6 +44,7 @@ struct omap_mcbsp {
        omap_mcbsp_word_length       rx_word_length;
        omap_mcbsp_word_length       tx_word_length;
 
+       omap_mcbsp_io_type_t         io_type; /* IRQ or poll */
        /* IRQ based TX/RX */
        int                          rx_irq;
        int                          tx_irq;
@@ -64,10 +65,19 @@ struct omap_mcbsp {
 };
 
 static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT];
+#ifdef CONFIG_ARCH_OMAP1
 static struct clk *mcbsp_dsp_ck = 0;
 static struct clk *mcbsp_api_ck = 0;
 static struct clk *mcbsp_dspxor_ck = 0;
-
+#endif
+#ifdef CONFIG_ARCH_OMAP2
+static struct clk *mcbsp1_ick = 0;
+static struct clk *mcbsp1_fck = 0;
+static struct clk *mcbsp2_ick = 0;
+static struct clk *mcbsp2_fck = 0;
+static struct clk *sys_ck = 0;
+static struct clk *sys_clkout = 0;
+#endif
 
 static void omap_mcbsp_dump_reg(u8 id)
 {
@@ -88,7 +98,6 @@ static void omap_mcbsp_dump_reg(u8 id)
        DBG("***********************\n");
 }
 
-
 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
 {
        struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id);
@@ -109,7 +118,6 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id, struct pt_re
        return IRQ_HANDLED;
 }
 
-
 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
 {
        struct omap_mcbsp * mcbsp_dma_tx = (struct omap_mcbsp *)(data);
@@ -176,7 +184,7 @@ static int omap_mcbsp_check(unsigned int id)
                return 0;
        }
 
-       if (cpu_is_omap1510() || cpu_is_omap16xx()) {
+       if (cpu_is_omap15xx() || cpu_is_omap16xx() || cpu_is_omap24xx()) {
                if (id > OMAP_MAX_MCBSP_COUNT) {
                        printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1);
                        return -1;
@@ -187,9 +195,10 @@ static int omap_mcbsp_check(unsigned int id)
        return -1;
 }
 
+#ifdef CONFIG_ARCH_OMAP1
 static void omap_mcbsp_dsp_request(void)
 {
-       if (cpu_is_omap1510() || cpu_is_omap16xx()) {
+       if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
                clk_enable(mcbsp_dsp_ck);
                clk_enable(mcbsp_api_ck);
 
@@ -207,12 +216,49 @@ static void omap_mcbsp_dsp_request(void)
 
 static void omap_mcbsp_dsp_free(void)
 {
-       if (cpu_is_omap1510() || cpu_is_omap16xx()) {
+       if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
                clk_disable(mcbsp_dspxor_ck);
                clk_disable(mcbsp_dsp_ck);
                clk_disable(mcbsp_api_ck);
        }
 }
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2
+static void omap2_mcbsp2_mux_setup(void)
+{
+       omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
+       omap_cfg_reg(R14_24XX_MCBSP2_FSX);
+       omap_cfg_reg(W15_24XX_MCBSP2_DR);
+       omap_cfg_reg(V15_24XX_MCBSP2_DX);
+       omap_cfg_reg(V14_24XX_GPIO117);
+       omap_cfg_reg(W14_24XX_SYS_CLKOUT);
+}
+#endif
+
+/*
+ * We can choose between IRQ based or polled IO.
+ * This needs to be called before omap_mcbsp_request().
+ */
+int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
+{
+       if (omap_mcbsp_check(id) < 0)
+               return -EINVAL;
+
+       spin_lock(&mcbsp[id].lock);
+
+       if (!mcbsp[id].free) {
+               printk (KERN_ERR "OMAP-McBSP: McBSP%d is currently in use\n", id + 1);
+               spin_unlock(&mcbsp[id].lock);
+               return -EINVAL;
+       }
+
+       mcbsp[id].io_type = io_type;
+
+       spin_unlock(&mcbsp[id].lock);
+
+       return 0;
+}
 
 int omap_mcbsp_request(unsigned int id)
 {
@@ -221,12 +267,26 @@ int omap_mcbsp_request(unsigned int id)
        if (omap_mcbsp_check(id) < 0)
                return -EINVAL;
 
+#ifdef CONFIG_ARCH_OMAP1
        /*
         * On 1510, 1610 and 1710, McBSP1 and McBSP3
         * are DSP public peripherals.
         */
        if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
                omap_mcbsp_dsp_request();
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2
+       if (cpu_is_omap24xx()) {
+               if (id == OMAP_MCBSP1) {
+                       clk_enable(mcbsp1_ick);
+                       clk_enable(mcbsp1_fck);
+               } else {
+                       clk_enable(mcbsp2_ick);
+                       clk_enable(mcbsp2_fck);
+               }
+       }
+#endif
 
        spin_lock(&mcbsp[id].lock);
        if (!mcbsp[id].free) {
@@ -238,30 +298,33 @@ int omap_mcbsp_request(unsigned int id)
        mcbsp[id].free = 0;
        spin_unlock(&mcbsp[id].lock);
 
-       /* We need to get IRQs here */
-       err = request_irq(mcbsp[id].tx_irq, omap_mcbsp_tx_irq_handler, 0,
-                         "McBSP",
-                         (void *) (&mcbsp[id]));
-       if (err != 0) {
-               printk(KERN_ERR "OMAP-McBSP: Unable to request TX IRQ %d for McBSP%d\n",
-                      mcbsp[id].tx_irq, mcbsp[id].id);
-               return err;
-       }
+       if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) {
+               /* We need to get IRQs here */
+               err = request_irq(mcbsp[id].tx_irq, omap_mcbsp_tx_irq_handler, 0,
+                                 "McBSP",
+                                 (void *) (&mcbsp[id]));
+               if (err != 0) {
+                       printk(KERN_ERR "OMAP-McBSP: Unable to request TX IRQ %d for McBSP%d\n",
+                              mcbsp[id].tx_irq, mcbsp[id].id);
+                       return err;
+               }
 
-       init_completion(&(mcbsp[id].tx_irq_completion));
+               init_completion(&(mcbsp[id].tx_irq_completion));
 
 
-       err = request_irq(mcbsp[id].rx_irq, omap_mcbsp_rx_irq_handler, 0,
-                         "McBSP",
-                         (void *) (&mcbsp[id]));
-       if (err != 0) {
-               printk(KERN_ERR "OMAP-McBSP: Unable to request RX IRQ %d for McBSP%d\n",
-                      mcbsp[id].rx_irq, mcbsp[id].id);
-               free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id]));
-               return err;
+               err = request_irq(mcbsp[id].rx_irq, omap_mcbsp_rx_irq_handler, 0,
+                                 "McBSP",
+                                 (void *) (&mcbsp[id]));
+               if (err != 0) {
+                       printk(KERN_ERR "OMAP-McBSP: Unable to request RX IRQ %d for McBSP%d\n",
+                              mcbsp[id].rx_irq, mcbsp[id].id);
+                       free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id]));
+                       return err;
+               }
+
+               init_completion(&(mcbsp[id].rx_irq_completion));
        }
 
-       init_completion(&(mcbsp[id].rx_irq_completion));
        return 0;
 
 }
@@ -271,8 +334,24 @@ void omap_mcbsp_free(unsigned int id)
        if (omap_mcbsp_check(id) < 0)
                return;
 
-       if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
-               omap_mcbsp_dsp_free();
+#ifdef CONFIG_ARCH_OMAP1
+       if (cpu_class_is_omap1()) {
+               if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3)
+                       omap_mcbsp_dsp_free();
+       }
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2
+       if (cpu_is_omap24xx()) {
+               if (id == OMAP_MCBSP1) {
+                       clk_disable(mcbsp1_ick);
+                       clk_disable(mcbsp1_fck);
+               } else {
+                       clk_disable(mcbsp2_ick);
+                       clk_disable(mcbsp2_fck);
+               }
+       }
+#endif
 
        spin_lock(&mcbsp[id].lock);
        if (mcbsp[id].free) {
@@ -284,9 +363,11 @@ void omap_mcbsp_free(unsigned int id)
        mcbsp[id].free = 1;
        spin_unlock(&mcbsp[id].lock);
 
-       /* Free IRQs */
-       free_irq(mcbsp[id].rx_irq, (void *) (&mcbsp[id]));
-       free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id]));
+       if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) {
+               /* Free IRQs */
+               free_irq(mcbsp[id].rx_irq, (void *) (&mcbsp[id]));
+               free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id]));
+       }
 }
 
 /*
@@ -461,6 +542,115 @@ u32 omap_mcbsp_recv_word(unsigned int id)
 }
 
 
+int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
+{
+       u32 io_base = mcbsp[id].io_base;
+       omap_mcbsp_word_length tx_word_length = mcbsp[id].tx_word_length;
+       omap_mcbsp_word_length rx_word_length = mcbsp[id].rx_word_length;
+       u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
+
+       if (tx_word_length != rx_word_length)
+               return -EINVAL;
+
+       /* First we wait for the transmitter to be ready */
+       spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
+       while (!(spcr2 & XRDY)) {
+               spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
+               if (attempts++ > 1000) {
+                       /* We must reset the transmitter */
+                       OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
+                       udelay(10);
+                       OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
+                       udelay(10);
+                       printk("McBSP transmitter not ready\n");
+                       return -EAGAIN;
+               }
+       }
+
+       /* Now we can push the data */
+       if (tx_word_length > OMAP_MCBSP_WORD_16)
+               OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
+       OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
+
+       /* We wait for the receiver to be ready */
+       spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
+       while (!(spcr1 & RRDY)) {
+               spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
+               if (attempts++ > 1000) {
+                       /* We must reset the receiver */
+                       OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
+                       udelay(10);
+                       OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
+                       udelay(10);
+                       printk("McBSP receiver not ready\n");
+                       return -EAGAIN;
+               }
+       }
+
+       /* Receiver is ready, let's read the dummy data */
+       if (rx_word_length > OMAP_MCBSP_WORD_16)
+               word_msb = OMAP_MCBSP_READ(io_base, DRR2);
+       word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
+
+       return 0;
+}
+
+int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word)
+{
+       u32 io_base = mcbsp[id].io_base, clock_word = 0;
+       omap_mcbsp_word_length tx_word_length = mcbsp[id].tx_word_length;
+       omap_mcbsp_word_length rx_word_length = mcbsp[id].rx_word_length;
+       u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
+
+       if (tx_word_length != rx_word_length)
+               return -EINVAL;
+
+       /* First we wait for the transmitter to be ready */
+       spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
+       while (!(spcr2 & XRDY)) {
+               spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
+               if (attempts++ > 1000) {
+                       /* We must reset the transmitter */
+                       OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
+                       udelay(10);
+                       OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
+                       udelay(10);
+                       printk("McBSP transmitter not ready\n");
+                       return -EAGAIN;
+               }
+       }
+
+       /* We first need to enable the bus clock */
+       if (tx_word_length > OMAP_MCBSP_WORD_16)
+               OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
+       OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
+
+       /* We wait for the receiver to be ready */
+       spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
+       while (!(spcr1 & RRDY)) {
+               spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
+               if (attempts++ > 1000) {
+                       /* We must reset the receiver */
+                       OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
+                       udelay(10);
+                       OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
+                       udelay(10);
+                       printk("McBSP receiver not ready\n");
+                       return -EAGAIN;
+               }
+       }
+
+       /* Receiver is ready, there is something for us */
+       if (rx_word_length > OMAP_MCBSP_WORD_16)
+               word_msb = OMAP_MCBSP_READ(io_base, DRR2);
+       word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
+
+       word[0] = (word_lsb | (word_msb << 16));
+
+       return 0;
+}
+
+
 /*
  * Simple DMA based buffer rx/tx routines.
  * Nothing fancy, just a single buffer tx/rx through DMA.
@@ -471,6 +661,9 @@ u32 omap_mcbsp_recv_word(unsigned int id)
 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length)
 {
        int dma_tx_ch;
+       int src_port = 0;
+       int dest_port = 0;
+       int sync_dev = 0;
 
        if (omap_mcbsp_check(id) < 0)
                return -EINVAL;
@@ -487,20 +680,27 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng
 
        init_completion(&(mcbsp[id].tx_dma_completion));
 
+       if (cpu_class_is_omap1()) {
+               src_port = OMAP_DMA_PORT_TIPB;
+               dest_port = OMAP_DMA_PORT_EMIFF;
+       }
+       if (cpu_is_omap24xx())
+               sync_dev = mcbsp[id].dma_tx_sync;
+
        omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch,
                                     OMAP_DMA_DATA_TYPE_S16,
                                     length >> 1, 1,
                                     OMAP_DMA_SYNC_ELEMENT,
-                                    0, 0);
+        sync_dev, 0);
 
        omap_set_dma_dest_params(mcbsp[id].dma_tx_lch,
-                                OMAP_DMA_PORT_TIPB,
+                                src_port,
                                 OMAP_DMA_AMODE_CONSTANT,
                                 mcbsp[id].io_base + OMAP_MCBSP_REG_DXR1,
                                 0, 0);
 
        omap_set_dma_src_params(mcbsp[id].dma_tx_lch,
-                               OMAP_DMA_PORT_EMIFF,
+                               dest_port,
                                OMAP_DMA_AMODE_POST_INC,
                                buffer,
                                0, 0);
@@ -514,6 +714,9 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng
 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length)
 {
        int dma_rx_ch;
+       int src_port = 0;
+       int dest_port = 0;
+       int sync_dev = 0;
 
        if (omap_mcbsp_check(id) < 0)
                return -EINVAL;
@@ -530,20 +733,27 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int leng
 
        init_completion(&(mcbsp[id].rx_dma_completion));
 
+       if (cpu_class_is_omap1()) {
+               src_port = OMAP_DMA_PORT_TIPB;
+               dest_port = OMAP_DMA_PORT_EMIFF;
+       }
+       if (cpu_is_omap24xx())
+               sync_dev = mcbsp[id].dma_rx_sync;
+
        omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch,
                                     OMAP_DMA_DATA_TYPE_S16,
                                     length >> 1, 1,
                                     OMAP_DMA_SYNC_ELEMENT,
-                                    0, 0);
+        sync_dev, 0);
 
        omap_set_dma_src_params(mcbsp[id].dma_rx_lch,
-                               OMAP_DMA_PORT_TIPB,
+                               src_port,
                                OMAP_DMA_AMODE_CONSTANT,
                                mcbsp[id].io_base + OMAP_MCBSP_REG_DRR1,
                                0, 0);
 
        omap_set_dma_dest_params(mcbsp[id].dma_rx_lch,
-                                OMAP_DMA_PORT_EMIFF,
+                                dest_port,
                                 OMAP_DMA_AMODE_POST_INC,
                                 buffer,
                                 0, 0);
@@ -688,6 +898,23 @@ static const struct omap_mcbsp_info mcbsp_1610[] = {
 };
 #endif
 
+#if defined(CONFIG_ARCH_OMAP24XX)
+static const struct omap_mcbsp_info mcbsp_24xx[] = {
+       [0] = { .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE),
+               .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX,
+               .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX,
+               .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
+               .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
+               },
+       [1] = { .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE),
+               .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX,
+               .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX,
+               .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
+               .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
+               },
+};
+#endif
+
 static int __init omap_mcbsp_init(void)
 {
        int mcbsp_count = 0, i;
@@ -695,6 +922,7 @@ static int __init omap_mcbsp_init(void)
 
        printk("Initializing OMAP McBSP system\n");
 
+#ifdef CONFIG_ARCH_OMAP1
        mcbsp_dsp_ck = clk_get(0, "dsp_ck");
        if (IS_ERR(mcbsp_dsp_ck)) {
                printk(KERN_ERR "mcbsp: could not acquire dsp_ck handle.\n");
@@ -710,6 +938,29 @@ static int __init omap_mcbsp_init(void)
                printk(KERN_ERR "mcbsp: could not acquire dspxor_ck handle.\n");
                return PTR_ERR(mcbsp_dspxor_ck);
        }
+#endif
+#ifdef CONFIG_ARCH_OMAP2
+       mcbsp1_ick = clk_get(0, "mcbsp1_ick");
+       if (IS_ERR(mcbsp1_ick)) {
+               printk(KERN_ERR "mcbsp: could not acquire mcbsp1_ick handle.\n");
+               return PTR_ERR(mcbsp1_ick);
+       }
+       mcbsp1_fck = clk_get(0, "mcbsp1_fck");
+       if (IS_ERR(mcbsp1_fck)) {
+               printk(KERN_ERR "mcbsp: could not acquire mcbsp1_fck handle.\n");
+               return PTR_ERR(mcbsp1_fck);
+       }
+       mcbsp2_ick = clk_get(0, "mcbsp2_ick");
+       if (IS_ERR(mcbsp2_ick)) {
+               printk(KERN_ERR "mcbsp: could not acquire mcbsp2_ick handle.\n");
+               return PTR_ERR(mcbsp2_ick);
+       }
+       mcbsp2_fck = clk_get(0, "mcbsp2_fck");
+       if (IS_ERR(mcbsp2_fck)) {
+               printk(KERN_ERR "mcbsp: could not acquire mcbsp2_fck handle.\n");
+               return PTR_ERR(mcbsp2_fck);
+       }
+#endif
 
 #ifdef CONFIG_ARCH_OMAP730
        if (cpu_is_omap730()) {
@@ -718,7 +969,7 @@ static int __init omap_mcbsp_init(void)
        }
 #endif
 #ifdef CONFIG_ARCH_OMAP15XX
-       if (cpu_is_omap1510()) {
+       if (cpu_is_omap15xx()) {
                mcbsp_info = mcbsp_1510;
                mcbsp_count = ARRAY_SIZE(mcbsp_1510);
        }
@@ -728,6 +979,19 @@ static int __init omap_mcbsp_init(void)
                mcbsp_info = mcbsp_1610;
                mcbsp_count = ARRAY_SIZE(mcbsp_1610);
        }
+#endif
+#if defined(CONFIG_ARCH_OMAP24XX)
+       if (cpu_is_omap24xx()) {
+               mcbsp_info = mcbsp_24xx;
+               mcbsp_count = ARRAY_SIZE(mcbsp_24xx);
+
+               /* REVISIT: where's the right place? */
+               omap2_mcbsp2_mux_setup();
+               sys_ck = clk_get(0, "sys_ck");
+               sys_clkout = clk_get(0, "sys_clkout");
+               clk_set_parent(sys_clkout, sys_ck);
+               clk_enable(sys_clkout);
+       }
 #endif
        for (i = 0; i < OMAP_MAX_MCBSP_COUNT ; i++) {
                if (i >= mcbsp_count) {
@@ -741,6 +1005,7 @@ static int __init omap_mcbsp_init(void)
                mcbsp[i].dma_rx_lch = -1;
 
                mcbsp[i].io_base = mcbsp_info[i].virt_base;
+               mcbsp[i].io_type = OMAP_MCBSP_IRQ_IO; /* Default I/O is IRQ based */
                mcbsp[i].tx_irq = mcbsp_info[i].tx_irq;
                mcbsp[i].rx_irq = mcbsp_info[i].rx_irq;
                mcbsp[i].dma_rx_sync = mcbsp_info[i].dma_rx_sync;
@@ -751,11 +1016,11 @@ static int __init omap_mcbsp_init(void)
        return 0;
 }
 
-
 arch_initcall(omap_mcbsp_init);
 
 EXPORT_SYMBOL(omap_mcbsp_config);
 EXPORT_SYMBOL(omap_mcbsp_request);
+EXPORT_SYMBOL(omap_mcbsp_set_io_type);
 EXPORT_SYMBOL(omap_mcbsp_free);
 EXPORT_SYMBOL(omap_mcbsp_start);
 EXPORT_SYMBOL(omap_mcbsp_stop);
@@ -763,4 +1028,6 @@ EXPORT_SYMBOL(omap_mcbsp_xmit_word);
 EXPORT_SYMBOL(omap_mcbsp_recv_word);
 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
+EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
+EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
index 5cc6775c789c949a4ff2d7848665fc2a71480ed1..37792d43738b1981d78541f05a56a390ec5f726b 100644 (file)
@@ -62,9 +62,6 @@ int ocpi_enable(void)
        if (!cpu_is_omap16xx())
                return -ENODEV;
 
-       /* Make sure there's clock for OCPI */
-       clk_enable(ocpi_ck);
-
        /* Enable access for OHCI in OCPI */
        val = omap_readl(OCPI_PROT);
        val &= ~0xff;
index 590bac25b7c44c2806c2d1077a0c14df2249ffc3..6513065941d0872753ba5ded51dec517f82393de 100644 (file)
@@ -57,6 +57,7 @@
 #define LHV_MIN                                0x0000
 
 // Analog audio path control register
+#define STA_REG(x)                     ((x)<<6)
 #define STE_ENABLED                    0x0020
 #define DAC_SELECTED                   0x0010
 #define BYPASS_ON                      0x0008
 #define TLV320AIC23ID1                  (0x1a) // cs low
 #define TLV320AIC23ID2                  (0x1b) // cs high
 
+void tlv320aic23_power_up(void);
+void tlv320aic23_power_down(void);
+
 #endif /* __ASM_ARCH_AIC23_H */
index 57bf4f39ca580db55612fca034381eb7e999c814..06dad83dd41f1c7116409a64e6ad12803d9c5ff5 100644 (file)
@@ -181,10 +181,16 @@ struct omap_dsp_varinfo {
 #define OMAP_DSP_MBCMD_PM_ENABLE       0x01
 
 #define OMAP_DSP_MBCMD_KFUNC_FBCTL     0x00
+#define OMAP_DSP_MBCMD_KFUNC_AUDIO_PWR 0x01
 
+#define OMAP_DSP_MBCMD_FBCTL_UPD       0x0000
 #define OMAP_DSP_MBCMD_FBCTL_ENABLE    0x0002
 #define OMAP_DSP_MBCMD_FBCTL_DISABLE   0x0003
 
+#define OMAP_DSP_MBCMD_AUDIO_PWR_UP    0x0000
+#define OMAP_DSP_MBCMD_AUDIO_PWR_DOWN1 0x0001
+#define OMAP_DSP_MBCMD_AUDIO_PWR_DOWN2 0x0002
+
 #define OMAP_DSP_MBCMD_TDEL_SAFE       0x0000
 #define OMAP_DSP_MBCMD_TDEL_KILL       0x0001
 
index 4fcce6944056e4f1377735a010783be986f583ac..16a459dfa714ab770da53bff8680d90a36a70d6c 100644 (file)
 #ifndef ASM_ARCH_DSP_COMMON_H
 #define ASM_ARCH_DSP_COMMON_H
 
-void omap_dsp_pm_suspend(void);
-void omap_dsp_pm_resume(void);
-void omap_dsp_request_mpui(void);
-void omap_dsp_release_mpui(void);
-int omap_dsp_request_mem(void);
-int omap_dsp_release_mem(void);
+extern void omap_dsp_request_mpui(void);
+extern void omap_dsp_release_mpui(void);
+extern int omap_dsp_request_mem(void);
+extern int omap_dsp_release_mem(void);
+
+extern void (*omap_dsp_audio_pwr_up_request)(int stage);
+extern void (*omap_dsp_audio_pwr_down_request)(int stage);
 
 #endif /* ASM_ARCH_DSP_COMMON_H */
diff --git a/include/asm-arm/arch-omap/gpioexpander.h b/include/asm-arm/arch-omap/gpioexpander.h
new file mode 100644 (file)
index 0000000..7a43b0a
--- /dev/null
@@ -0,0 +1,24 @@
+/*
+ * linux/include/asm-arm/arch-omap/gpioexpander.h
+ *
+ *
+ * Copyright (C) 2004 Texas Instruments, Inc.
+ *
+ * This package is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+
+#ifndef __ASM_ARCH_OMAP_GPIOEXPANDER_H
+#define __ASM_ARCH_OMAP_GPIOEXPANDER_H
+
+/* Function Prototypes for GPIO Expander functions */
+
+int read_gpio_expa(u8 *, int);
+int write_gpio_expa(u8 , int);
+
+#endif /* __ASM_ARCH_OMAP_GPIOEXPANDER_H */
diff --git a/include/asm-arm/arch-omap/irda.h b/include/asm-arm/arch-omap/irda.h
new file mode 100644 (file)
index 0000000..805ae35
--- /dev/null
@@ -0,0 +1,36 @@
+/*
+ *  linux/include/asm-arm/arch-omap/irda.h
+ *
+ *  Copyright (C) 2005-2006 Komal Shah <komal_shah802003@yahoo.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef ASMARM_ARCH_IRDA_H
+#define ASMARM_ARCH_IRDA_H
+
+/* board specific transceiver capabilities */
+
+#define IR_SEL         1       /* Selects IrDA */
+#define IR_SIRMODE     2
+#define IR_FIRMODE     4
+#define IR_MIRMODE     8
+
+struct omap_irda_config {
+       int transceiver_cap;
+       int (*transceiver_mode)(struct device *dev, int mode);
+       int (*select_irda)(struct device *dev, int state);
+       /* Very specific to the needs of some platforms (h3,h4)
+        * having calls which can sleep in irda_set_speed.
+        */
+       struct work_struct gpio_expa;
+       int rx_channel;
+       int tx_channel;
+       unsigned long dest_start;
+       unsigned long src_start;
+       int tx_trigger;
+       int rx_trigger;
+};
+
+#endif
index 4ffce1d777591ab7e64e2a81951db78fcb768213..42098d99f302293748180d99649158086b9579dd 100644 (file)
 #define INT_24XX_GPIO_BANK2    30
 #define INT_24XX_GPIO_BANK3    31
 #define INT_24XX_GPIO_BANK4    32
+#define INT_24XX_MCBSP1_IRQ_TX 59
+#define INT_24XX_MCBSP1_IRQ_RX 60
+#define INT_24XX_MCBSP2_IRQ_TX 62
+#define INT_24XX_MCBSP2_IRQ_RX 63
+#define INT_24XX_UART3_IRQ     74
 
 /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
  * 16 MPUIO lines */
diff --git a/include/asm-arm/arch-omap/keypad.h b/include/asm-arm/arch-omap/keypad.h
new file mode 100644 (file)
index 0000000..8a023a9
--- /dev/null
@@ -0,0 +1,36 @@
+/*
+ *  linux/include/asm-arm/arch-omap/keypad.h
+ *
+ *  Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef ASMARM_ARCH_KEYPAD_H
+#define ASMARM_ARCH_KEYPAD_H
+
+struct omap_kp_platform_data {
+       int rows;
+       int cols;
+       int *keymap;
+       unsigned int rep:1;
+       /* specific to OMAP242x*/
+       unsigned int *row_gpios;
+       unsigned int *col_gpios;
+};
+
+/* Group (0..3) -- when multiple keys are pressed, only the
+ * keys pressed in the same group are considered as pressed. This is
+ * in order to workaround certain crappy HW designs that produce ghost
+ * keypresses. */
+#define GROUP_0                (0 << 16)
+#define GROUP_1                (1 << 16)
+#define GROUP_2                (2 << 16)
+#define GROUP_3                (3 << 16)
+#define GROUP_MASK     GROUP_3
+
+#define KEY(col, row, val) (((col) << 28) | ((row) << 24) | (val))
+
+#endif
+
index e79d98ab2ab63ac281ceaa1177862789a63eae8d..ed0dde4f7219643c961e4f7b259c5817c3c12481 100644 (file)
 #define OMAP1610_MCBSP2_BASE   0xfffb1000
 #define OMAP1610_MCBSP3_BASE   0xe1017000
 
+#define OMAP24XX_MCBSP1_BASE   0x48074000
+#define OMAP24XX_MCBSP2_BASE   0x48076000
+
+#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730)
+
 #define OMAP_MCBSP_REG_DRR2    0x00
 #define OMAP_MCBSP_REG_DRR1    0x02
 #define OMAP_MCBSP_REG_DXR2    0x04
 
 #define OMAP_MAX_MCBSP_COUNT 3
 
+#define AUDIO_MCBSP_DATAWRITE  (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1)
+#define AUDIO_MCBSP_DATAREAD   (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1)
+
+#define AUDIO_MCBSP            OMAP_MCBSP1
+#define AUDIO_DMA_TX           OMAP_DMA_MCBSP1_TX
+#define AUDIO_DMA_RX           OMAP_DMA_MCBSP1_RX
+
+#elif defined(CONFIG_ARCH_OMAP24XX)
+
+#define OMAP_MCBSP_REG_DRR2    0x00
+#define OMAP_MCBSP_REG_DRR1    0x04
+#define OMAP_MCBSP_REG_DXR2    0x08
+#define OMAP_MCBSP_REG_DXR1    0x0C
+#define OMAP_MCBSP_REG_SPCR2   0x10
+#define OMAP_MCBSP_REG_SPCR1   0x14
+#define OMAP_MCBSP_REG_RCR2    0x18
+#define OMAP_MCBSP_REG_RCR1    0x1C
+#define OMAP_MCBSP_REG_XCR2    0x20
+#define OMAP_MCBSP_REG_XCR1    0x24
+#define OMAP_MCBSP_REG_SRGR2   0x28
+#define OMAP_MCBSP_REG_SRGR1   0x2C
+#define OMAP_MCBSP_REG_MCR2    0x30
+#define OMAP_MCBSP_REG_MCR1    0x34
+#define OMAP_MCBSP_REG_RCERA   0x38
+#define OMAP_MCBSP_REG_RCERB   0x3C
+#define OMAP_MCBSP_REG_XCERA   0x40
+#define OMAP_MCBSP_REG_XCERB   0x44
+#define OMAP_MCBSP_REG_PCR0    0x48
+#define OMAP_MCBSP_REG_RCERC   0x4C
+#define OMAP_MCBSP_REG_RCERD   0x50
+#define OMAP_MCBSP_REG_XCERC   0x54
+#define OMAP_MCBSP_REG_XCERD   0x58
+#define OMAP_MCBSP_REG_RCERE   0x5C
+#define OMAP_MCBSP_REG_RCERF   0x60
+#define OMAP_MCBSP_REG_XCERE   0x64
+#define OMAP_MCBSP_REG_XCERF   0x68
+#define OMAP_MCBSP_REG_RCERG   0x6C
+#define OMAP_MCBSP_REG_RCERH   0x70
+#define OMAP_MCBSP_REG_XCERG   0x74
+#define OMAP_MCBSP_REG_XCERH   0x78
+
+#define OMAP_MAX_MCBSP_COUNT 2
+
+#define AUDIO_MCBSP_DATAWRITE  (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1)
+#define AUDIO_MCBSP_DATAREAD   (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1)
+
+#define AUDIO_MCBSP            OMAP_MCBSP2
+#define AUDIO_DMA_TX           OMAP24XX_DMA_MCBSP2_TX
+#define AUDIO_DMA_RX           OMAP24XX_DMA_MCBSP2_RX
+
+#endif
+
 #define OMAP_MCBSP_READ(base, reg)             __raw_readw((base) + OMAP_MCBSP_REG_##reg)
 #define OMAP_MCBSP_WRITE(base, reg, val)       __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg)
 
+
 /************************** McBSP SPCR1 bit definitions ***********************/
 #define RRST                   0x0001
 #define RRDY                   0x0002
@@ -195,6 +253,10 @@ typedef enum {
        OMAP_MCBSP3,
 } omap_mcbsp_id;
 
+typedef int __bitwise omap_mcbsp_io_type_t;
+#define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1)
+#define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2)
+
 typedef enum {
        OMAP_MCBSP_WORD_8 = 0,
        OMAP_MCBSP_WORD_12,
@@ -246,6 +308,9 @@ u32 omap_mcbsp_recv_word(unsigned int id);
 
 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length);
 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length);
+int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word);
+int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word);
+
 
 /* SPI specific API */
 void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg);
diff --git a/include/asm-arm/arch-omap/mcspi.h b/include/asm-arm/arch-omap/mcspi.h
new file mode 100644 (file)
index 0000000..9e7f40a
--- /dev/null
@@ -0,0 +1,16 @@
+#ifndef _OMAP2_MCSPI_H
+#define _OMAP2_MCSPI_H
+
+struct omap2_mcspi_platform_config {
+       unsigned long   base;
+       unsigned short  num_cs;
+};
+
+struct omap2_mcspi_device_config {
+       unsigned turbo_mode:1;
+
+       /* Do we want one channel enabled at the same time? */
+       unsigned single_channel:1;
+};
+
+#endif
index 46be8b8d63465ae33d6a05f6bbbd802eb2817901..88cd4c87f0decd72f22a5ba1d5f012911ff59933 100644 (file)
@@ -7,7 +7,7 @@
 #ifndef __ASM_ARCH_MENELAUS_H
 #define __ASM_ARCH_MENELAUS_H
 
-extern void menelaus_mmc_register(void (*callback)(u8 card_mask),
+extern void menelaus_mmc_register(void (*callback)(unsigned long data, u8 card_mask),
                                  unsigned long data);
 extern void menelaus_mmc_remove(void);
 extern void menelaus_mmc_opendrain(int enable);
diff --git a/include/asm-arm/arch-omap/omap-alsa.h b/include/asm-arm/arch-omap/omap-alsa.h
new file mode 100644 (file)
index 0000000..df46954
--- /dev/null
@@ -0,0 +1,124 @@
+/*
+ * linux/include/asm-arm/arch-omap/omap-alsa.h
+ *
+ * Alsa Driver for AIC23 and TSC2101 codecs on OMAP platform boards.
+ *
+ * Copyright (C) 2006 Mika Laitio <lamikr@cc.jyu.fi>
+ *
+ * Copyright (C) 2005 Instituto Nokia de Tecnologia - INdT - Manaus Brazil
+ * Written by Daniel Petrini, David Cohen, Anderson Briglia
+ *            {daniel.petrini, david.cohen, anderson.briglia}@indt.org.br
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the  GNU General Public License along
+ * with this program; if not, write  to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *  History
+ *  -------
+ *
+ *  2005/07/25 INdT-10LE Kernel Team -         Alsa driver for omap osk,
+ *                                     original version based in sa1100 driver
+ *                                     and omap oss driver.
+ */
+
+#ifndef __OMAP_ALSA_H
+#define __OMAP_ALSA_H
+
+#include <sound/driver.h>
+#include <asm/arch/dma.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <asm/arch/mcbsp.h>
+#include <linux/platform_device.h>
+
+#define DMA_BUF_SIZE   (1024 * 8)
+
+/*
+ * Buffer management for alsa and dma
+ */
+struct audio_stream {
+       char *id;               /* identification string */
+       int stream_id;          /* numeric identification */
+       int dma_dev;            /* dma number of that device */
+       int *lch;               /* Chain of channels this stream is linked to */
+       char started;           /* to store if the chain was started or not */
+       int dma_q_head;         /* DMA Channel Q Head */
+       int dma_q_tail;         /* DMA Channel Q Tail */
+       char dma_q_count;       /* DMA Channel Q Count */
+       int active:1;           /* we are using this stream for transfer now */
+       int period;             /* current transfer period */
+       int periods;            /* current count of periods registerd in the DMA engine */
+       spinlock_t dma_lock;    /* for locking in DMA operations */
+       snd_pcm_substream_t *stream;    /* the pcm stream */
+       unsigned linked:1;      /* dma channels linked */
+       int offset;             /* store start position of the last period in the alsa buffer */
+       int (*hw_start)(void);  /* interface to start HW interface, e.g. McBSP */
+       int (*hw_stop)(void);   /* interface to stop HW interface, e.g. McBSP */
+};
+
+/*
+ * Alsa card structure for aic23
+ */
+struct snd_card_omap_codec {
+       snd_card_t *card;
+       snd_pcm_t *pcm;
+       long samplerate;
+       struct audio_stream s[2];       /* playback & capture */
+};
+
+/* Codec specific information and function pointers.
+ * Codec (omap-alsa-aic23.c and omap-alsa-tsc2101.c)
+ * are responsible for defining the function pointers.
+ */
+struct omap_alsa_codec_config {
+       char    *name;
+       struct  omap_mcbsp_reg_cfg *mcbsp_regs_alsa;
+       snd_pcm_hw_constraint_list_t *hw_constraints_rates;
+       snd_pcm_hardware_t *snd_omap_alsa_playback;
+       snd_pcm_hardware_t *snd_omap_alsa_capture;
+       void    (*codec_configure_dev)(void);
+       void    (*codec_set_samplerate)(long);
+       void    (*codec_clock_setup)(void);
+       int     (*codec_clock_on)(void);
+       int     (*codec_clock_off)(void);
+       int     (*get_default_samplerate)(void);
+};
+
+/*********** Mixer function prototypes *************************/
+int snd_omap_mixer(struct snd_card_omap_codec *);
+void snd_omap_init_mixer(void);
+
+#ifdef CONFIG_PM
+void snd_omap_suspend_mixer(void);
+void snd_omap_resume_mixer(void);
+#endif
+
+int snd_omap_alsa_post_probe(struct platform_device *pdev, struct omap_alsa_codec_config *config);
+int snd_omap_alsa_remove(struct platform_device *pdev);
+#ifdef CONFIG_PM
+int snd_omap_alsa_suspend(struct platform_device *pdev, pm_message_t state);
+int snd_omap_alsa_resume(struct platform_device *pdev);
+#else
+#define snd_omap_alsa_suspend  NULL
+#define snd_omap_alsa_resume   NULL
+#endif
+
+void callback_omap_alsa_sound_dma(void *);
+
+#endif