(SELEQZ64 i64:$f, i64:$cond))>,
ISA_MIPS64R6;
def : MipsPat<(select (i32 (seteq i64:$cond, immz)), i64:$t, i64:$f),
- (OR64 (SELNEZ64 i64:$t, i64:$cond),
- (SELEQZ64 i64:$f, i64:$cond))>,
+ (OR64 (SELEQZ64 i64:$t, i64:$cond),
+ (SELNEZ64 i64:$f, i64:$cond))>,
ISA_MIPS64R6;
def : MipsPat<(select (i32 (setne i64:$cond, immz)), i64:$t, i64:$f),
- (OR64 (SELNEZ64 i64:$f, i64:$cond),
- (SELEQZ64 i64:$t, i64:$cond))>,
+ (OR64 (SELNEZ64 i64:$t, i64:$cond),
+ (SELEQZ64 i64:$f, i64:$cond))>,
ISA_MIPS64R6;
def : MipsPat<(select (i32 (seteq i64:$cond, immZExt16_64:$imm)), i64:$t, i64:$f),
- (OR64 (SELNEZ64 i64:$t, (XORi64 i64:$cond, immZExt16_64:$imm)),
- (SELEQZ64 i64:$f, (XORi64 i64:$cond, immZExt16_64:$imm)))>,
+ (OR64 (SELEQZ64 i64:$t, (XORi64 i64:$cond, immZExt16_64:$imm)),
+ (SELNEZ64 i64:$f, (XORi64 i64:$cond, immZExt16_64:$imm)))>,
ISA_MIPS64R6;
def : MipsPat<(select (i32 (setne i64:$cond, immZExt16_64:$imm)), i64:$t, i64:$f),
- (OR64 (SELNEZ64 i64:$f, (XORi64 i64:$cond, immZExt16_64:$imm)),
- (SELEQZ64 i64:$t, (XORi64 i64:$cond, immZExt16_64:$imm)))>,
+ (OR64 (SELNEZ64 i64:$t, (XORi64 i64:$cond, immZExt16_64:$imm)),
+ (SELEQZ64 i64:$f, (XORi64 i64:$cond, immZExt16_64:$imm)))>,
ISA_MIPS64R6;
def : MipsPat<
(select (i32 (setgt i64:$cond, immSExt16Plus1:$imm)), i64:$t, i64:$f),
- (OR64 (SELNEZ64 i64:$t,
+ (OR64 (SELEQZ64 i64:$t,
(SUBREG_TO_REG (i64 0), (SLTi64 i64:$cond, (Plus1 imm:$imm)),
sub_32)),
- (SELEQZ64 i64:$f,
+ (SELNEZ64 i64:$f,
(SUBREG_TO_REG (i64 0), (SLTi64 i64:$cond, (Plus1 imm:$imm)),
sub_32)))>,
ISA_MIPS64R6;
def : MipsPat<
(select (i32 (setugt i64:$cond, immSExt16Plus1:$imm)), i64:$t, i64:$f),
- (OR64 (SELNEZ64 i64:$t,
+ (OR64 (SELEQZ64 i64:$t,
(SUBREG_TO_REG (i64 0), (SLTiu64 i64:$cond, (Plus1 imm:$imm)),
sub_32)),
- (SELEQZ64 i64:$f,
+ (SELNEZ64 i64:$f,
(SUBREG_TO_REG (i64 0), (SLTiu64 i64:$cond, (Plus1 imm:$imm)),
sub_32)))>,
ISA_MIPS64R6;
(SELEQZ64 i64:$f, (SLL64_32 i32:$cond)))>,
ISA_MIPS64R6;
def : MipsPat<(select (i32 (seteq i32:$cond, immz)), i64:$t, i64:$f),
- (OR64 (SELNEZ64 i64:$t, (SLL64_32 i32:$cond)),
- (SELEQZ64 i64:$f, (SLL64_32 i32:$cond)))>,
+ (OR64 (SELEQZ64 i64:$t, (SLL64_32 i32:$cond)),
+ (SELNEZ64 i64:$f, (SLL64_32 i32:$cond)))>,
ISA_MIPS64R6;
def : MipsPat<(select (i32 (setne i32:$cond, immz)), i64:$t, i64:$f),
- (OR64 (SELNEZ64 i64:$f, (SLL64_32 i32:$cond)),
- (SELEQZ64 i64:$t, (SLL64_32 i32:$cond)))>,
+ (OR64 (SELNEZ64 i64:$t, (SLL64_32 i32:$cond)),
+ (SELEQZ64 i64:$f, (SLL64_32 i32:$cond)))>,
ISA_MIPS64R6;
def : MipsPat<(select (i32 (seteq i32:$cond, immZExt16:$imm)), i64:$t, i64:$f),
- (OR64 (SELNEZ64 i64:$t, (SLL64_32 (XORi i32:$cond,
+ (OR64 (SELEQZ64 i64:$t, (SLL64_32 (XORi i32:$cond,
immZExt16:$imm))),
- (SELEQZ64 i64:$f, (SLL64_32 (XORi i32:$cond,
+ (SELNEZ64 i64:$f, (SLL64_32 (XORi i32:$cond,
immZExt16:$imm))))>,
ISA_MIPS64R6;
def : MipsPat<(select (i32 (setne i32:$cond, immZExt16:$imm)), i64:$t, i64:$f),
; 32-CMP-DAG: lw $[[R0:[0-9]+]], %got(i3)
; 32-CMP-DAG: addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(i1)
-; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[R1]], $4
-; 32-CMP-DAG: selnez $[[T1:[0-9]+]], $[[R0]], $4
-; 32-CMP-DAG: or $[[T2:[0-9]+]], $[[T1]], $[[T0]]
+; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $[[R1]], $4
+; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R0]], $4
+; 32-CMP-DAG: or $[[T2:[0-9]+]], $[[T0]], $[[T1]]
; 32-CMP-DAG: lw $2, 0($[[T2]])
; 64-CMOV-DAG: ldr $[[R0:[0-9]+]]
; (setcc's result is i32 so bits 32-63 are undefined). It's not really
; needed.
; 64-CMP-DAG: sll $[[CC:[0-9]+]], $4, 0
-; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[R1]], $[[CC]]
-; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $[[R0]], $[[CC]]
-; 64-CMP-DAG: or $[[T2:[0-9]+]], $[[T1]], $[[T0]]
+; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[R1]], $[[CC]]
+; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R0]], $[[CC]]
+; 64-CMP-DAG: or $[[T2:[0-9]+]], $[[T0]], $[[T1]]
; 64-CMP-DAG: ld $2, 0($[[T2]])
define i32* @cmov1(i32 %s) nounwind readonly {
; 32-CMP-DAG: addiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got(d)
; 32-CMP-DAG: addiu $[[R0:[0-9]+]], ${{[0-9]+}}, %got(c)
-; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[R0]], $4
-; 32-CMP-DAG: selnez $[[T1:[0-9]+]], $[[R1]], $4
-; 32-CMP-DAG: or $[[T2:[0-9]+]], $[[T1]], $[[T0]]
+; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $[[R0]], $4
+; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R1]], $4
+; 32-CMP-DAG: or $[[T2:[0-9]+]], $[[T0]], $[[T1]]
; 32-CMP-DAG: lw $2, 0($[[T2]])
; 64-CMOV: daddiu $[[R1:[0-9]+]], ${{[0-9]+}}, %got_disp(d)
; (setcc's result is i32 so bits 32-63 are undefined). It's not really
; needed.
; 64-CMP-DAG: sll $[[CC:[0-9]+]], $4, 0
-; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[R0]], $[[CC]]
-; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $[[R1]], $[[CC]]
-; 64-CMP-DAG: or $[[T2:[0-9]+]], $[[T1]], $[[T0]]
+; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[R0]], $[[CC]]
+; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[R1]], $[[CC]]
+; 64-CMP-DAG: or $[[T2:[0-9]+]], $[[T0]], $[[T1]]
; 64-CMP-DAG: lw $2, 0($[[T2]])
define i32 @cmov2(i32 %s) nounwind readonly {
; 32-CMOV: movz ${{[26]}}, $5, $[[R0]]
; 32-CMP-DAG: xori $[[CC:[0-9]+]], $4, 234
-; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $5, $[[CC]]
-; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $6, $[[CC]]
+; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $5, $[[CC]]
+; 32-CMP-DAG: selnez $[[T1:[0-9]+]], $6, $[[CC]]
; 32-CMP-DAG: or $2, $[[T0]], $[[T1]]
; 64-CMOV: xori $[[R0:[0-9]+]], $4, 234
; 64-CMOV: movz ${{[26]}}, $5, $[[R0]]
; 64-CMP-DAG: xori $[[CC:[0-9]+]], $4, 234
-; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $5, $[[CC]]
-; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $6, $[[CC]]
+; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $5, $[[CC]]
+; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $6, $[[CC]]
; 64-CMP-DAG: or $2, $[[T0]], $[[T1]]
define i32 @cmov3(i32 %a, i32 %b, i32 %c) nounwind readnone {
; 32-CMP-DAG: xori $[[R0:[0-9]+]], $4, 234
; 32-CMP-DAG: lw $[[R1:[0-9]+]], 16($sp)
; 32-CMP-DAG: lw $[[R2:[0-9]+]], 20($sp)
-; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $6, $[[R0]]
-; 32-CMP-DAG: selnez $[[T1:[0-9]+]], $7, $[[R0]]
-; 32-CMP-DAG: seleqz $[[T2:[0-9]+]], $[[R1]], $[[R0]]
-; 32-CMP-DAG: seleqz $[[T3:[0-9]+]], $[[R2]], $[[R0]]
+; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $6, $[[R0]]
+; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $7, $[[R0]]
+; 32-CMP-DAG: selnez $[[T2:[0-9]+]], $[[R1]], $[[R0]]
+; 32-CMP-DAG: selnez $[[T3:[0-9]+]], $[[R2]], $[[R0]]
; 32-CMP-DAG: or $2, $[[T0]], $[[T2]]
; 32-CMP-DAG: or $3, $[[T1]], $[[T3]]
; 64-CMOV: movz ${{[26]}}, $5, $[[R0]]
; 64-CMP-DAG: xori $[[R0:[0-9]+]], $4, 234
-; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $5, $[[R0]]
-; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $6, $[[R0]]
+; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $5, $[[R0]]
+; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $6, $[[R0]]
; 64-CMP-DAG: or $2, $[[T0]], $[[T1]]
define i64 @cmov4(i32 %a, i64 %b, i64 %c) nounwind readnone {
; 32-CMP-DAG: addiu $[[I5:[0-9]+]], $zero, 5
; 32-CMP-DAG: slti $[[R0:[0-9]+]], $4, 32767
; FIXME: We can do better than this by using selccz to choose between +0 and +2
-; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I3]], $[[R0]]
-; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[I5]], $[[R0]]
+; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[I3]], $[[R0]]
+; 32-CMP-DAG: selnez $[[T1:[0-9]+]], $[[I5]], $[[R0]]
; 32-CMP-DAG: or $2, $[[T0]], $[[T1]]
; 64-CMOV-DAG: addiu $[[I3:[0-9]+]], $zero, 3
; 64-CMP-DAG: addiu $[[I5:[0-9]+]], $zero, 5
; 64-CMP-DAG: slti $[[R0:[0-9]+]], $4, 32767
; FIXME: We can do better than this by using selccz to choose between +0 and +2
-; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I3]], $[[R0]]
-; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[I5]], $[[R0]]
+; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[I3]], $[[R0]]
+; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $[[I5]], $[[R0]]
; 64-CMP-DAG: or $2, $[[T0]], $[[T1]]
define i32 @slti0(i32 %a) {
; 32-CMP-DAG: addiu $[[I5:[0-9]+]], $zero, 5
; 32-CMP-DAG: slti $[[R0:[0-9]+]], $4, -32768
; FIXME: We can do better than this by using selccz to choose between +0 and +2
-; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I3]], $[[R0]]
-; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[I5]], $[[R0]]
+; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[I3]], $[[R0]]
+; 32-CMP-DAG: selnez $[[T1:[0-9]+]], $[[I5]], $[[R0]]
; 32-CMP-DAG: or $2, $[[T0]], $[[T1]]
; 64-CMOV-DAG: addiu $[[I3:[0-9]+]], $zero, 3
; 64-CMP-DAG: addiu $[[I5:[0-9]+]], $zero, 5
; 64-CMP-DAG: slti $[[R0:[0-9]+]], $4, -32768
; FIXME: We can do better than this by using selccz to choose between +0 and +2
-; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I3]], $[[R0]]
-; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[I5]], $[[R0]]
+; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[I3]], $[[R0]]
+; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $[[I5]], $[[R0]]
; 64-CMP-DAG: or $2, $[[T0]], $[[T1]]
define i32 @slti2(i32 %a) {
; 32-CMP-DAG: slt $[[CC0:[0-9]+]], $zero, $4
; 32-CMP-DAG: addiu $[[I32766:[0-9]+]], $zero, 32766
; 32-CMP-DAG: sltu $[[CC1:[0-9]+]], $[[I32766]], $5
-; 32-CMP-DAG: seleqz $[[CC2:[0-9]+]], $[[CC0]], $4
-; 32-CMP-DAG: selnez $[[CC3:[0-9]+]], $[[CC1]], $4
+; 32-CMP-DAG: selnez $[[CC2:[0-9]+]], $[[CC0]], $4
+; 32-CMP-DAG: seleqz $[[CC3:[0-9]+]], $[[CC1]], $4
; 32-CMP: or $[[CC:[0-9]+]], $[[CC3]], $[[CC2]]
; 32-CMP-DAG: addiu $[[I5:[0-9]+]], $zero, 5
; 32-CMP-DAG: addiu $[[I4:[0-9]+]], $zero, 4
; 64-CMP-DAG: slti $[[R0:[0-9]+]], $4, 32767
; FIXME: We can do better than this by adding/subtracting the result of slti
; to/from one of the constants.
-; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I5]], $[[R0]]
-; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[I4]], $[[R0]]
+; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[I5]], $[[R0]]
+; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $[[I4]], $[[R0]]
; 64-CMP-DAG: or $2, $[[T0]], $[[T1]]
define i64 @slti64_0(i64 %a) {
; 32-CMP-DAG: slt $[[CC0:[0-9]+]], $zero, $4
; 32-CMP-DAG: addiu $[[I32766:[0-9]+]], $zero, 32767
; 32-CMP-DAG: sltu $[[CC1:[0-9]+]], $[[I32766]], $5
-; 32-CMP-DAG: seleqz $[[CC2:[0-9]+]], $[[CC0]], $4
-; 32-CMP-DAG: selnez $[[CC3:[0-9]+]], $[[CC1]], $4
+; 32-CMP-DAG: selnez $[[CC2:[0-9]+]], $[[CC0]], $4
+; 32-CMP-DAG: seleqz $[[CC3:[0-9]+]], $[[CC1]], $4
; 32-CMP: or $[[CC:[0-9]+]], $[[CC3]], $[[CC2]]
; 32-CMP-DAG: addiu $[[I5:[0-9]+]], $zero, 5
; 32-CMP-DAG: addiu $[[I4:[0-9]+]], $zero, 4
; 64-CMP-DAG: slti $[[R0:[0-9]+]], $4, -32768
; FIXME: We can do better than this by adding/subtracting the result of slti
; to/from one of the constants.
-; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I3]], $[[R0]]
-; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[I4]], $[[R0]]
+; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[I3]], $[[R0]]
+; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $[[I4]], $[[R0]]
; 64-CMP-DAG: or $2, $[[T0]], $[[T1]]
define i64 @slti64_2(i64 %a) {
; 32-CMP-DAG: addiu $[[I5:[0-9]+]], $zero, 5
; 32-CMP-DAG: sltiu $[[R0:[0-9]+]], $4, 32767
; FIXME: We can do better than this by using selccz to choose between +0 and +2
-; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I3]], $[[R0]]
-; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[I5]], $[[R0]]
+; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[I3]], $[[R0]]
+; 32-CMP-DAG: selnez $[[T1:[0-9]+]], $[[I5]], $[[R0]]
; 32-CMP-DAG: or $2, $[[T0]], $[[T1]]
; 64-CMOV-DAG: addiu $[[I3:[0-9]+]], $zero, 3
; 64-CMP-DAG: addiu $[[I5:[0-9]+]], $zero, 5
; 64-CMP-DAG: sltiu $[[R0:[0-9]+]], $4, 32767
; FIXME: We can do better than this by using selccz to choose between +0 and +2
-; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I3]], $[[R0]]
-; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[I5]], $[[R0]]
+; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[I3]], $[[R0]]
+; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $[[I5]], $[[R0]]
; 64-CMP-DAG: or $2, $[[T0]], $[[T1]]
define i32 @sltiu0(i32 %a) {
; 32-CMP-DAG: addiu $[[I5:[0-9]+]], $zero, 5
; 32-CMP-DAG: sltiu $[[R0:[0-9]+]], $4, -32768
; FIXME: We can do better than this by using selccz to choose between +0 and +2
-; 32-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I3]], $[[R0]]
-; 32-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[I5]], $[[R0]]
+; 32-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[I3]], $[[R0]]
+; 32-CMP-DAG: selnez $[[T1:[0-9]+]], $[[I5]], $[[R0]]
; 32-CMP-DAG: or $2, $[[T0]], $[[T1]]
; 64-CMOV-DAG: addiu $[[I3:[0-9]+]], $zero, 3
; 64-CMP-DAG: addiu $[[I5:[0-9]+]], $zero, 5
; 64-CMP-DAG: sltiu $[[R0:[0-9]+]], $4, -32768
; FIXME: We can do better than this by using selccz to choose between +0 and +2
-; 64-CMP-DAG: selnez $[[T0:[0-9]+]], $[[I3]], $[[R0]]
-; 64-CMP-DAG: seleqz $[[T1:[0-9]+]], $[[I5]], $[[R0]]
+; 64-CMP-DAG: seleqz $[[T0:[0-9]+]], $[[I3]], $[[R0]]
+; 64-CMP-DAG: selnez $[[T1:[0-9]+]], $[[I5]], $[[R0]]
; 64-CMP-DAG: or $2, $[[T0]], $[[T1]]
define i32 @sltiu2(i32 %a) {
; 32R2: movn $5, $6, $4
; 32R2: move $2, $5
-; 32R6-DAG: selnez $[[T0:[0-9]+]], $5, $4
-; 32R6-DAG: seleqz $[[T1:[0-9]+]], $6, $4
-; 32R6: or $2, $[[T0]], $[[T1]]
+; 32R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
+; 32R6-DAG: selnez $[[T1:[0-9]+]], $6, $4
+; 32R6: or $2, $[[T1]], $[[T0]]
; 64: movn $5, $6, $4
; 64: move $2, $5
; 64R2: movn $5, $6, $4
; 64R2: move $2, $5
-; 64R6-DAG: selnez $[[T0:[0-9]+]], $5, $4
-; 64R6-DAG: seleqz $[[T1:[0-9]+]], $6, $4
-; 64R6: or $2, $[[T0]], $[[T1]]
+; 64R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
+; 64R6-DAG: selnez $[[T1:[0-9]+]], $6, $4
+; 64R6: or $2, $[[T1]], $[[T0]]
%tobool = icmp ne i32 %s, 0
%cond = select i1 %tobool, i32 %f1, i32 %f0
; 32R2: move $3, $7
; 32R6-DAG: lw $[[F1:[0-9]+]], 16($sp)
-; 32R6-DAG: selnez $[[T0:[0-9]+]], $6, $4
-; 32R6-DAG: seleqz $[[T1:[0-9]+]], $[[F1]], $4
-; 32R6: or $2, $[[T0]], $[[T1]]
+; 32R6-DAG: seleqz $[[T0:[0-9]+]], $6, $4
+; 32R6-DAG: selnez $[[T1:[0-9]+]], $[[F1]], $4
+; 32R6: or $2, $[[T1]], $[[T0]]
; 32R6-DAG: lw $[[F1H:[0-9]+]], 20($sp)
-; 32R6-DAG: selnez $[[T0:[0-9]+]], $7, $4
-; 32R6-DAG: seleqz $[[T1:[0-9]+]], $[[F1H]], $4
-; 32R6: or $3, $[[T0]], $[[T1]]
+; 32R6-DAG: seleqz $[[T0:[0-9]+]], $7, $4
+; 32R6-DAG: selnez $[[T1:[0-9]+]], $[[F1H]], $4
+; 32R6: or $3, $[[T1]], $[[T0]]
; 64: movn $5, $6, $4
; 64: move $2, $5
; (setcc's result is i32 so bits 32-63 are undefined). It's not really
; needed.
; 64R6-DAG: sll $[[CC:[0-9]+]], $4, 0
-; 64R6-DAG: selnez $[[T0:[0-9]+]], $5, $[[CC]]
-; 64R6-DAG: seleqz $[[T1:[0-9]+]], $6, $[[CC]]
-; 64R6: or $2, $[[T0]], $[[T1]]
+; 64R6-DAG: seleqz $[[T0:[0-9]+]], $5, $[[CC]]
+; 64R6-DAG: selnez $[[T1:[0-9]+]], $6, $[[CC]]
+; 64R6: or $2, $[[T1]], $[[T0]]
%tobool = icmp ne i32 %s, 0
%cond = select i1 %tobool, i64 %f1, i64 %f0
; 32R6-DAG: lw $[[F1:[0-9]+]], 16($sp)
; 32R6-DAG: or $[[T2:[0-9]+]], $4, $5
-; 32R6-DAG: selnez $[[T0:[0-9]+]], $6, $[[T2]]
-; 32R6-DAG: seleqz $[[T1:[0-9]+]], $[[F1]], $[[T2]]
-; 32R6: or $2, $[[T0]], $[[T1]]
+; 32R6-DAG: seleqz $[[T0:[0-9]+]], $6, $[[T2]]
+; 32R6-DAG: selnez $[[T1:[0-9]+]], $[[F1]], $[[T2]]
+; 32R6: or $2, $[[T1]], $[[T0]]
; 32R6-DAG: lw $[[F1H:[0-9]+]], 20($sp)
-; 32R6-DAG: selnez $[[T0:[0-9]+]], $7, $[[T2]]
-; 32R6-DAG: seleqz $[[T1:[0-9]+]], $[[F1H]], $[[T2]]
-; 32R6: or $3, $[[T0]], $[[T1]]
+; 32R6-DAG: seleqz $[[T0:[0-9]+]], $7, $[[T2]]
+; 32R6-DAG: selnez $[[T1:[0-9]+]], $[[F1H]], $[[T2]]
+; 32R6: or $3, $[[T1]], $[[T0]]
; 64: movn $5, $6, $4
; 64: move $2, $5
; 64R2: movn $5, $6, $4
; 64R2: move $2, $5
-; 64R6-DAG: selnez $[[T0:[0-9]+]], $5, $4
-; 64R6-DAG: seleqz $[[T1:[0-9]+]], $6, $4
-; 64R6: or $2, $[[T0]], $[[T1]]
+; 64R6-DAG: seleqz $[[T0:[0-9]+]], $5, $4
+; 64R6-DAG: selnez $[[T1:[0-9]+]], $6, $4
+; 64R6: or $2, $[[T1]], $[[T0]]
%tobool = icmp ne i64 %s, 0
%cond = select i1 %tobool, i64 %f1, i64 %f0