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MIPI: 1. update dts; 2. remove warnings
authorxjh <xujh@rock-chips.com>
Sat, 14 Jun 2014 12:06:01 +0000 (20:06 +0800)
committerxjh <xujh@rock-chips.com>
Sat, 14 Jun 2014 12:06:01 +0000 (20:06 +0800)
arch/arm/boot/dts/lcd-ld089wu1-mipi.dtsi patch | blob | history
arch/arm/boot/dts/lcd-lq070m1sx01-mipi.dtsi patch | blob | history
arch/arm/boot/dts/lcd-wqxga-mipi.dtsi patch | blob | history
drivers/video/rockchip/screen/lcd_mipi.c patch | blob | history
drivers/video/rockchip/transmitter/rk32_mipi_dsi.c patch | blob | history
drivers/video/rockchip/transmitter/rk32_mipi_dsi.h patch | blob | history

diff --git a/arch/arm/boot/dts/lcd-ld089wu1-mipi.dtsi b/arch/arm/boot/dts/lcd-ld089wu1-mipi.dtsi
index 9d2f1569bda6fbe7350989c131c181f124149bd2..241fa949b6b978ff8d9c822a2fff89b3a13044ca 100755 (executable)
--- a/arch/arm/boot/dts/lcd-ld089wu1-mipi.dtsi
+++ b/arch/arm/boot/dts/lcd-ld089wu1-mipi.dtsi
@@ -11,24 +11,30 @@
 / {
                /* about mipi */
                disp_mipi_init: mipi_dsi_init{
+                                       compatible = "rockchip,mipi_dsi_init";
                                        rockchip,screen_init    = <0>;
                                        rockchip,dsi_lane               = <4>;
-                                       rockchip,dsi_hs_clk             = <1020>;
+                                       rockchip,dsi_hs_clk             = <1000>;
                                        rockchip,mipi_dsi_num   = <1>;
                };
                disp_mipi_power_ctr: mipi_power_ctr {
+                                       compatible = "rockchip,mipi_power_ctr";
                                        /*mipi_lcd_rst:mipi_lcd_rst{
+                                                       compatible = "rockchip,lcd_rst";
                                                        rockchip,gpios = <&gpio2 GPIO_B7 GPIO_ACTIVE_LOW>;
                                                        rockchip,delay = <100>;
                                        };
                                        mipi_lcd_en:mipi_lcd_en {
+                                                       compatible = "rockchip,lcd_en";
                                                        rockchip,gpios = <&gpio0 GPIO_C1 GPIO_ACTIVE_HIGH>;
                                                        rockchip,delay = <100>;
                                        };*/
                };
                disp_mipi_init_cmds: screen-on-cmds {
+                                       compatible = "rockchip,screen-on-cmds";
                                        /*rockchip,cmd_debug = <1>;
                                        rockchip,on-cmds1 {
+                                                       compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <HSDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0xb0 0x02>;
@@ -40,6 +46,7 @@
 
                disp_timings: display-timings {
                         native-mode = <&timing0>;
+                        compatible = "rockchip,display-timings";
                         timing0: timing0 {
                                screen-type = <SCREEN_MIPI>;
                                lvds-format = <LVDS_8BIT_2>;
diff --git a/arch/arm/boot/dts/lcd-lq070m1sx01-mipi.dtsi b/arch/arm/boot/dts/lcd-lq070m1sx01-mipi.dtsi
index e76c595c8efc05cfd04ed53b23f9b50334889236..e2f4a525ee00cb9f44ed7736d670318b928756c6 100755 (executable)
--- a/arch/arm/boot/dts/lcd-lq070m1sx01-mipi.dtsi
+++ b/arch/arm/boot/dts/lcd-lq070m1sx01-mipi.dtsi
@@ -11,24 +11,30 @@
 / {
                /* about mipi */
                disp_mipi_init: mipi_dsi_init{
+                                       compatible = "rockchip,mipi_dsi_init";
                                        rockchip,screen_init    = <1>;
                                        rockchip,dsi_lane               = <2>;
                                        rockchip,dsi_hs_clk             = <1000>;
                                        rockchip,mipi_dsi_num   = <2>;
                };
                disp_mipi_power_ctr: mipi_power_ctr {
+                                       compatible = "rockchip,mipi_power_ctr";
                                        mipi_lcd_rst:mipi_lcd_rst{
+                                                       compatible = "rockchip,lcd_rst";
                                                        rockchip,gpios = <&gpio2 GPIO_B7 GPIO_ACTIVE_HIGH>;
                                                        rockchip,delay = <10>;
                                        };
                                        mipi_lcd_en:mipi_lcd_en {
+                                                       compatible = "rockchip,lcd_en";
                                                        rockchip,gpios = <&gpio0 GPIO_C1 GPIO_ACTIVE_HIGH>;
                                                        rockchip,delay = <10>;
                                        };
                };
                disp_mipi_init_cmds: screen-on-cmds {
                                        rockchip,cmd_debug = <0>;
+                                       compatible = "rockchip,screen-on-cmds";
                                        rockchip,on-cmds1 {
+                                                       compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x15 0xb0 0x02>;
@@ -36,48 +42,56 @@
                                        };
                                        
                                        rockchip,on-cmds2 {
+                                                       compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x15 0xb1 0x21>;
                                                        rockchip,cmd_delay = <0>;
                                        };
                                        rockchip,on-cmds3 {
+                                                       compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x15 0xb0 0x06>;
                                                        rockchip,cmd_delay = <0>;
                                        };
                                        rockchip,on-cmds4 {
+                                                       compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x15 0xb1 0x21>;
                                                        rockchip,cmd_delay = <0>;
                                        };
                                        rockchip,on-cmds5 {
+                                                       compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x15 0xb4 0x15>;
                                                        rockchip,cmd_delay = <0>;
                                        };
                                        rockchip,on-cmds6 {
+                                                       compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x15 0xb9 0x40>;
                                                        rockchip,cmd_delay = <0>;
                                        };
                                        rockchip,on-cmds7 {
+                                                       compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x15 0xb0 0x00>;
                                                        rockchip,cmd_delay = <0>;
                                        };
                                        rockchip,on-cmds8 {
+                                                       compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x05 dcs_set_display_on>;
                                                        rockchip,cmd_delay = <10>;
                                        };
                                        rockchip,on-cmds9 {
+                                                       compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,data_type = <DATA_TYPE_DCS>;
                                                        rockchip,dsi_id = <2>;
@@ -88,6 +102,7 @@
 
                disp_timings: display-timings {
                         native-mode = <&timing0>;
+                        compatible = "rockchip,display-timings";
                         timing0: timing0 {
                                screen-type = <SCREEN_DUAL_MIPI>;
                                lvds-format = <LVDS_8BIT_2>;
diff --git a/arch/arm/boot/dts/lcd-wqxga-mipi.dtsi b/arch/arm/boot/dts/lcd-wqxga-mipi.dtsi
index db842d217bd32bdf764bb4fe35b7a9156b38e301..28de4f152d84e46d22e602625816e3722d485c44 100755 (executable)
--- a/arch/arm/boot/dts/lcd-wqxga-mipi.dtsi
+++ b/arch/arm/boot/dts/lcd-wqxga-mipi.dtsi
@@ -14,7 +14,7 @@
                                        compatible = "rockchip,mipi_dsi_init";
                                        rockchip,screen_init    = <1>;
                                        rockchip,dsi_lane               = <4>;
-                                       rockchip,dsi_hs_clk             = <970>;
+                                       rockchip,dsi_hs_clk             = <940>;
                                        rockchip,mipi_dsi_num   = <2>;
                };
                disp_mipi_power_ctr: mipi_power_ctr {
@@ -22,18 +22,18 @@
                                        mipi_lcd_rst:mipi_lcd_rst{
                                                compatible = "rockchip,lcd_rst";
                                                        rockchip,gpios = <&gpio7 GPIO_B2 GPIO_ACTIVE_HIGH>;
-                                                       rockchip,delay = <20>;
+                                                       rockchip,delay = <10>;
                                        };
-                                       /*mipi_lcd_en:mipi_lcd_en {
+                                       mipi_lcd_en:mipi_lcd_en {
                                                compatible = "rockchip,lcd_en";
                                                        rockchip,gpios = <&gpio6 GPIO_A7 GPIO_ACTIVE_HIGH>;
                                                        rockchip,delay = <10>;
-                                       };*/
+                                       };
                };
                disp_mipi_init_cmds: screen-on-cmds {
                                        rockchip,cmd_debug = <0>;
                                        compatible = "rockchip,screen-on-cmds";
-                    rockchip,on-cmds1 {
+                                       rockchip,on-cmds1 {
                                                         compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
@@ -41,78 +41,85 @@
                                                        rockchip,cmd_delay = <10>;
                                        };
                                        
-                                       rockchip,on-cmds2 {
+                                       rockchip,on-cmds2 {
+                                                        compatible = "rockchip,on-cmds";
+                                                       rockchip,cmd_type = <LPDT>;
+                                                       rockchip,dsi_id = <2>;
+                                                       rockchip,cmd = <0x05 0x01>; //set soft reset
+                                                       rockchip,cmd_delay = <10>;
+                                       };
+                                       rockchip,on-cmds3 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x15 0x3a 0x77>;
                                                        rockchip,cmd_delay = <0>;
                                        };
-                                       rockchip,on-cmds3 {
+                                       rockchip,on-cmds4 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x39 0x2a 0x00 0x00 0x04 0xff>;
                                                        rockchip,cmd_delay = <0>;
                                        };
-                                       rockchip,on-cmds4 {
+                                       rockchip,on-cmds5 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x39 0x2b 0x00 0x00 0x06 0x3f>;
                                                        rockchip,cmd_delay = <0>;
                                        };
-                                       rockchip,on-cmds5 {
+                                       rockchip,on-cmds6 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
-                                                       rockchip,dsi_id = <1>;
+                                                       rockchip,dsi_id = <0>;
                                                        rockchip,cmd = <0x15 0x35 0x00>;
                                                        rockchip,cmd_delay = <0>;
                                        };
-                                       rockchip,on-cmds6 {
+                                       rockchip,on-cmds7 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
-                                                       rockchip,dsi_id = <1>;
+                                                       rockchip,dsi_id = <0>;
                                                        rockchip,cmd = <0x39 0x44 0x00 0x00>;
                                                        rockchip,cmd_delay = <0>;
                                        };
-                                       rockchip,on-cmds7 {
+                                       rockchip,on-cmds8 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x15 0x51 0xff>; //0xff
                                                        rockchip,cmd_delay = <0>;
                                        };
-                                       rockchip,on-cmds8 {
+                                       rockchip,on-cmds9 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
-                                                       rockchip,cmd = <0x15 0x53 0x24>;
+                                                       rockchip,cmd = <0x15 0x53 0x04>;
                                                        rockchip,cmd_delay = <0>;
                                        };
-                                       rockchip,on-cmds9 {
+                                       rockchip,on-cmds10 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x15 0x51 0xff>; //0xff
                                                        rockchip,cmd_delay = <0>;
                                        };
-                                       rockchip,on-cmds10 {
+                                       rockchip,on-cmds11 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
-                                                       rockchip,cmd = <0x15 0x53 0x24>;
+                                                       rockchip,cmd = <0x15 0x53 0x04>;
                                                        rockchip,cmd_delay = <0>;
                                        };
 
-                                       rockchip,on-cmds11 {
+                                       rockchip,on-cmds12 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
-                                                       rockchip,cmd = <0x15 0x55 0x03>;
+                                                       rockchip,cmd = <0x15 0x55 0x00>;
                                                        rockchip,cmd_delay = <0>;
                                        };                      
-                                       rockchip,on-cmds12 {
+                                       rockchip,on-cmds13 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
@@ -120,7 +127,7 @@
                                                        rockchip,cmd_delay = <120>;
                                        };
 
-                                       rockchip,on-cmds13 {
+                                       rockchip,on-cmds14 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
@@ -128,7 +135,7 @@
                                                        rockchip,cmd_delay = <0>;
                                        };
                                
-                                       rockchip,on-cmds14 { //video
+                                       rockchip,on-cmds15 { //video
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
@@ -136,21 +143,21 @@
                                                        rockchip,cmd_delay = <0>;
                                        };
                                                                
-                                       rockchip,on-cmds15 {
+                                       rockchip,on-cmds16 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x29 0xce 0x7d 0x40 0x48 0x56 0x67 0x78 0x88 0x98 0xa7 0xb5 0xc3 0xd1 0xde 0xe9 0xf2 0xfa 0xff 0x04 0x00>;
                                                        rockchip,cmd_delay = <0>;
                                        };
-                                       rockchip,on-cmds16 {
+                                       rockchip,on-cmds17 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
                                                        rockchip,cmd = <0x23 0xb0 0x03>;
                                                        rockchip,cmd_delay = <0>;
                                        };
-                                       rockchip,on-cmds17 {
+                                       rockchip,on-cmds18 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
@@ -158,7 +165,7 @@
                                                        rockchip,cmd_delay = <0>;
                                        };
 
-                                       rockchip,on-cmds18 {
+                                       rockchip,on-cmds19 {
                                                        compatible = "rockchip,on-cmds";
                                                        rockchip,cmd_type = <LPDT>;
                                                        rockchip,dsi_id = <2>;
@@ -175,13 +182,13 @@
                                screen-type = <SCREEN_DUAL_MIPI>;
                                lvds-format = <LVDS_8BIT_2>;
                                out-face    = <OUT_P888>;
-                               clock-frequency = <285000000>;
+                               clock-frequency = <265000000>;
                                hactive = <2560>;
                                vactive = <1600>;
                                
                                hsync-len = <38>;//19
-                               hback-porch = <80>;//40
-                               hfront-porch = <246>;//123
+                               hback-porch = <40>;//40
+                               hfront-porch = <108>;//123
                                
                                vsync-len = <4>;
                                vback-porch = <4>;
diff --git a/drivers/video/rockchip/screen/lcd_mipi.c b/drivers/video/rockchip/screen/lcd_mipi.c
index f304ace89d54cd9122d4196efd69ce3898030b26..c0813a8d7d6aa234fc95938bce378b514008933f 100755 (executable)
--- a/drivers/video/rockchip/screen/lcd_mipi.c
+++ b/drivers/video/rockchip/screen/lcd_mipi.c
@@ -71,6 +71,8 @@ static void rk_mipi_screen_pwr_disable(struct mipi_screen *screen)
 static void rk_mipi_screen_pwr_enable(struct mipi_screen *screen)
 {   
        if(screen->lcd_en_gpio != INVALID_GPIO){
+               gpio_direction_output(screen->lcd_en_gpio, !screen->lcd_en_atv_val);
+               msleep(screen->lcd_en_delay);
                gpio_direction_output(screen->lcd_en_gpio, screen->lcd_en_atv_val);
                msleep(screen->lcd_en_delay);
        }
diff --git a/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c b/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c
index 190b1205708a8cd55e713fc29fed3aab6dbabf95..8024a9eb15efb39f7b4b42fb5899673476ed22d3 100755 (executable)
--- a/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c
+++ b/drivers/video/rockchip/transmitter/rk32_mipi_dsi.c
@@ -195,7 +195,7 @@ static int rk32_dsi_set_bits(struct dsi *dsi, u32 data, u32 reg)
        
        return 0;
 }
-
+#if 0
 static int rk32_dwc_phy_test_rd(struct dsi *dsi, unsigned char test_code)
 {
        int val = 0;
@@ -212,7 +212,7 @@ static int rk32_dwc_phy_test_rd(struct dsi *dsi, unsigned char test_code)
 
        return val;
 }
-
+#endif
 static int rk32_dwc_phy_test_wr(struct dsi *dsi, unsigned char test_code, unsigned char *test_data, unsigned char size)
 {
        int i = 0;
@@ -1060,7 +1060,7 @@ int reg_proc_write(struct file *file, const char __user *buff, size_t count, lof
                                                MIPI_TRACE("payload entry is larger than 32\n");
                                                break;
                                        }       
-                                       sscanf(data, "%x,", str + i);   //-c 1,29,02,03,05,06,> pro
+                                       sscanf(data, "%x,", (unsigned int *)(str + i));   //-c 1,29,02,03,05,06,> pro
                                        data = strstr(data, ",");
                                        if(data == NULL)
                                                break;
@@ -1200,7 +1200,7 @@ int reg_proc_write1(struct file *file, const char __user *buff, size_t count, lo
                                                MIPI_TRACE("payload entry is larger than 32\n");
                                                break;
                                        }       
-                                       sscanf(data, "%x,", str + i);   //-c 1,29,02,03,05,06,> pro
+                                       sscanf(data, "%x,", (unsigned int *)(str + i));   //-c 1,29,02,03,05,06,> pro
                                        data = strstr(data, ",");
                                        if(data == NULL)
                                                break;
@@ -1267,7 +1267,7 @@ struct file_operations reg_proc_fops1 = {
        .read   = reg_proc_read1,
 };
 #endif
-#ifdef CONFIG_MIPI_DSI_LINUX
+#if 0//def CONFIG_MIPI_DSI_LINUX
 static irqreturn_t rk32_mipi_dsi_irq_handler(int irq, void *data)
 {
        printk("-------rk32_mipi_dsi_irq_handler-------\n");
@@ -1294,13 +1294,11 @@ int rk32_dsi_sync(void)
 }
 
 #endif
+#if 0
 static int dwc_phy_test_rd(struct dsi *dsi, unsigned char test_code)
 {
     int val = 0;
 
-
-
-     
     rk32_dsi_set_bits(dsi, 0x10000 | test_code, PHY_TEST_CTRL1);
     rk32_dsi_set_bits(dsi, 0x2, PHY_TEST_CTRL0);
     rk32_dsi_set_bits(dsi, 0x0, PHY_TEST_CTRL0);
@@ -1310,7 +1308,7 @@ static int dwc_phy_test_rd(struct dsi *dsi, unsigned char test_code)
 
     return val;
 }
-
+#endif
 static int rk32_dsi_enable(void)
 {
        MIPI_DBG("rk32_dsi_enable-------\n");
@@ -1524,7 +1522,7 @@ int rk32_mipi_enable(vidinfo_t *vid)
        
 }
 #endif
-int rk32_mipi_power_down_DDR()
+int rk32_mipi_power_down_DDR(void)
 {      
        dsi_is_enable(0, 0);    
        if (rk_mipi_get_dsi_num() ==2)      
@@ -1532,7 +1530,7 @@ int rk32_mipi_power_down_DDR()
        return 0;   
 }
 EXPORT_SYMBOL(rk32_mipi_power_down_DDR);
-int rk32_mipi_power_up_DDR()
+int rk32_mipi_power_up_DDR(void)
 {      
        dsi_is_enable(0, 0);    
        if (rk_mipi_get_dsi_num() ==2)      
diff --git a/drivers/video/rockchip/transmitter/rk32_mipi_dsi.h b/drivers/video/rockchip/transmitter/rk32_mipi_dsi.h
index 5504a1cf14c38dc99f47752301c7c1d2adfcad84..9c9c789014b707dbc700c4ddff0ce3455621e463 100755 (executable)
--- a/drivers/video/rockchip/transmitter/rk32_mipi_dsi.h
+++ b/drivers/video/rockchip/transmitter/rk32_mipi_dsi.h
@@ -239,5 +239,7 @@ struct dsi {
 int rk_mipi_get_dsi_clk(void);
 int rk_mipi_get_dsi_num(void);
 int rk_mipi_get_dsi_lane(void);
+int rk32_mipi_power_down_DDR(void);
+int rk32_mipi_power_up_DDR(void);
 
 #endif /* end of RK32_MIPI_DSI_H */
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