drm/rockchip: dw_hdmi: use crtc_clock as vpll clock rate

adjusted_mode.crtc_clock is the real pixel clock rate.

Change-Id: Iac242b89e3144bc53c40170c2cec0c0913ef6ee0
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>

diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
index 0a9121c461df97ccd3c7ece3a4a9ce786dba1d5f..a771b0d2471ee1ad40aace0b2ef4cd26d6c5bded 100644 (file)
--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
@@ -285,7 +285,9 @@ static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
 
        if (WARN_ON(!crtc || !crtc->state))
                return;
-       clk_set_rate(hdmi->vpll_clk, crtc->state->adjusted_mode.clock * 1000);
+
+       clk_set_rate(hdmi->vpll_clk,
+                    crtc->state->adjusted_mode.crtc_clock * 1000);
 
        switch (hdmi->dev_type) {
        case RK3288_HDMI: